File:  [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / dmp4 / chk_dbl_acc.c
Revision 1.1.1.1 (vendor branch): download - view: text, annotated - select for diffs
Sun Jul 28 12:30:21 2019 UTC (7 years ago) by root
Branches: bsd, MAIN
CVS tags: v121, HEAD
Power 6/32 Unix version 1.21


#include "dmp_defs.h"


/***********************************************************************
*
*	Verify double precision accumulator value
*
*  This code will verify the final accumulator value. The assumption is 
*  made that the PSL will not be modified by the instruction (with the
*  exception of the accumulator size bit with CVDF instructions).
*  The convert DBL to SGL instruction will be tested here because it's
*  easier, when an error occurrs, to do the printing here.
*  The operand, if any will, be in dbl_value_1.
*
*  The "no-fpp" firmware will not clear "bad 0" accumulators.
***********************************************************************/
chk_dbl_acc()
{
	exp_psl = init_psl;			/* get the initial PSL */
	exp_psl |= PSL_DBL;			/* set PSL's DBL AC bit */
	if( op_code == PUSHD_OP_CODE ) {
	    exp_psl &= 0xfffffff1;		/* strip off the flag bits */
	    if( dbl_expected.m & 0x80000000 )
	         exp_psl |= PSL_N;		/* set the NEGATIVE bit */
	    else if( !dbl_expected.m )
	         exp_psl |= PSL_Z;		/* set the ZERO bit */
	}
	if( op_code == CVDF_OP_CODE ) {
	    dbl_st_acc.l = dbl_expected.l;
	    exp_psl &= 0xffffff7f;		/* strip off PSL size bit */
	    psl_val &= 0xffffff7f;
	}
	if( (dbl_st_acc.m != dbl_expected.m) ||
	    (dbl_st_acc.l != dbl_expected.l) ) {  /* check for bad result */
	    errcnt++;
	    if( prt_error )
		 prt_d_acc_e( bad_result_msg );
	    if( halt_flg )
		 hlt_d_acc_e( 1 );		/* error code 1 */
	    if( loop_on_err )
		 force_loop = TRUE;		/* set loop flag */
	}
	else if( psl_val != exp_psl ) {		/* check for bad PSL */
	    errcnt++;
	    if( prt_error )
		 prt_d_acc_e( bad_psl_msg );
	    if( halt_flg )
		 hlt_d_acc_e( 2 );		/* error code 2 */
	    if( loop_on_err )
		 force_loop = TRUE;		/* set loop flag */
	}
	else if( no_page_faults != exp_page_faults ) {	/* check # pg faults */
	    errcnt++;
	    if( prt_error )
		 prt_d_acc_e( trans_flt_cnt_msg );
	    if( halt_flg )
		 hlt_d_acc_e( 3 );		/* error code 3 */
	    if( loop_on_err )
		 force_loop = TRUE;		/* set loop flag */
	} else {
	    reg_no = 0;
	    regs_ok = TRUE;
	    while( (reg_no <= 13) && (regs_ok) )  /* check 1st 13 regs */
		if( store_regs[ reg_no ] == exp_regs[ reg_no ] )
		    reg_no++;
		else
		    regs_ok = FALSE;
	    if( !regs_ok ) {			/* check register values */
	        errcnt++;
	        if( prt_error )
		     prt_d_acc_e( reg_modified_msg );
	        if( halt_flg )
		     hlt_d_acc_e( 4 );		/* error code 4 */
	        if( loop_on_err )
		     force_loop = TRUE;		/* set loop flag */
	    }
	}
}


/************************************************************************
*		PRINT AN ERROR MESSAGE OF THE FORM
*
* cycle: xx. DMP test xx. <inst>. <error message>, index = xx
* addressing mode: <addressing mode description>
* inst buf= xx xx xx xx xx xx xx xx xx xx xx -page faults on byte(s) 0, x 
* init Acc = xxxxxxxx xxxxxxxx, final Acc = xxxxxxxx xxxxxxxx,  xx pg faults
*  operand = xxxxxxxx xxxxxxxx,  expected = xxxxxxxx xxxxxxxx,  xx expected
* initial PSL = xxxxxxxx,  final PSL = xxxxxxxx,  expected PSL = xxxxxxxx
************************************************************************/
prt_d_acc_e( message )
char *message;
{
int sgl_operand;
	if( (op_code == LDFD_OP_CODE) || (op_code == CVLD_OP_CODE) )
	     sgl_operand = TRUE;
	else
	     sgl_operand = FALSE;
	prt_dmp_er_msg( message );		/* print the error header */
	writes("init Acc = ");
	write32h( dbl_ld_acc.m );		/* print Acc. loaded data */
	writec(' ');
	write32h( dbl_ld_acc.l );
	writes(",  final Acc = ");
	write32h( dbl_st_acc.m );		/* print Acc. stored data */
	if( op_code == CVDF_OP_CODE ) {
	    writes(",           ");
	} else {
	    writec(' ');
	    write32h( dbl_st_acc.l );		/* print the LS stored  */
	    writes(",  ");
	}
	writed( no_page_faults );		/* print page fault data */
	writes(" pg faults\n");
	if( no_ops )
	{
	    writes(" operand = ");
	    write32h( dbl_value_1.m );		/* print MS part of operand */
	    writec(' ');
	    if( sgl_operand )
	         writes("        ");
	    else
	         write32h( dbl_value_1.l );	/* print LS part of operand */
	    writec(',');
	}
	else
	    writes("                             ");
	writes("   expected = ");
	write32h( dbl_expected.m );
	if( op_code == CVDF_OP_CODE ) {
	    writes(",           ");
	} else {
	    writec(' ');
	    write32h( dbl_expected.l );
	    writes(",  ");
	}
	writed( exp_page_faults );
	writes(" expected\n");
	if( message == bad_psl_msg ) {		/* PSL was wrong */
	    writes("initial PSL = ");
	    write32h( init_psl );
	    writes(",   final PSL = ");
	    write32h( psl_val );
	    writes(",   expected PSL = ");
	    write32h( exp_psl );
	    writec('\n');
	}
	if( message == reg_modified_msg )	/* print modified register */
	    prt_reg_data();			/* print bad register      */
}



/**************************************************************************
*	Set up the registers and halt
**************************************************************************/
hlt_d_acc_e( code )
int code;
{
	sgl_dummy1 = code;
	asm("movl _test_no,r0");		/* r0  = test number       */
	asm("movl _addr_code,r1");		/* r1  = addr mode code    */
	asm("movl _sgl_dummy1,r2");		/* r2  = error code        */
	asm("movl _cycle,r3");			/* r3  = cycle count       */
	sgl_dummy1 = dbl_ld_acc.m;
	sgl_dummy2 = dbl_ld_acc.l;
	asm("movl _sgl_dummy1,r4");		/* r4  = initial Acc.      */
	asm("movl _sgl_dummy2,r5");
	sgl_dummy1 = dbl_st_acc.m;
	sgl_dummy2 = dbl_st_acc.l;
	asm("movl _sgl_dummy1,r6");		/* r6  = final Accumulator */
	asm("movl _sgl_dummy2,r7");
	if( no_ops ) {
	    sgl_dummy1 = dbl_value_1.m;
	    sgl_dummy2 = dbl_value_1.l;
	    asm("movl _sgl_dummy1,r8");		/* r8  = operand           */
	    asm("movl _sgl_dummy2,r9");;
	} else {
	    asm("clrl r8");			/* r8 = 0 */
	    asm("clrl r9");
	}
	if( code == 1 )	{			/* data error */
	    sgl_dummy1 = dbl_expected.m;
	    sgl_dummy2 = dbl_expected.l;
	    asm("movl _sgl_dummy1,r10");	/* r10 = expected results  */
	    asm("movl _sgl_dummy2,r11");;
	}
	 else if( code == 2 ) {			/* PSL error */
	    asm("movl _init_psl,r10");		/* r10 = initial psl       */
	    asm("movl _psl_val,r11");;		/* r11 = final psl value   */
	    asm("movl _init_psl,r12");		/* r12 = expected psl      */
	}
	 else if( code == 3 ) {			/* # faults error */
	    asm("movl _no_page_faults,r10");	/* r10 = # page faults     */
	    asm("movl _exp_page_faults,r11");;	/* r11 = # faults expected */
	}
	 else if( code == 4 ) {			/* register error */
	    asm("movl _reg_no,r10");		/* r10 = bad register #    */
	    asm("movl _store_regs[r10],r11");	/* r11 = final (bad) value */
	    asm("movl _exp_regs[r10],r12");;	/* r12 = expected value    */
	}
	asm(".globl _hlt_dbl_acc");
	asm("_hlt_dbl_acc:");
	asm("halt");
}



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