Return to chk_sgl_acc.c CVS log

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Power 6/32 Unix version 1.21

#include "dmp_defs.h"

/***********************************************************************
*
*	Verify final single precision accumulator value
*
*  This code makes the assumption that the PSL is unchanged by the 
*  instruction (specific PSL modifying instructions are checked elsewhere). 
*  The operand, if any will, be in sgl_value_1.
***********************************************************************/
chk_sgl_acc()
{
	sgl_ld_acc   = dbl_ld_acc.m;		/* move the data to    */
	sgl_st_acc   = dbl_st_acc.m;		/*   the sgl data      */
	sgl_expected = dbl_expected.m;		/*      operands       */
	sgl_value_1  = dbl_value_1.m;
	sgl_value_2  = dbl_value_2.m;
	exp_psl      = init_psl & 0xffffff7f;	/* clear PSL's DBL bit */
	if( sgl_st_acc != sgl_expected ) {
	    errcnt++;
	    if( prt_error )
		 prt_s_acc_e( bad_result_msg );
	    if( halt_flg )
		 hlt_s_acc_e( 1 );		/* error code 1 */
	    if( loop_on_err )
		 force_loop = TRUE;		/* set loop flag */
	}
	 else if( psl_val != exp_psl ) {	/* check the final PSL */
	    errcnt++;
	    if( prt_error )
		 prt_s_acc_e( bad_psl_msg );
	    if( halt_flg )
		 hlt_s_acc_e( 2 );		/* error code 2 */
	    if( loop_on_err )
		 force_loop = TRUE;		/* set loop flag */
	}
	 else if( no_page_faults != exp_page_faults ) {
	    errcnt++;
	    if( prt_error )
		 prt_s_acc_e( trans_flt_cnt_msg );
	    if( halt_flg )
		 hlt_s_acc_e( 3 );		/* error code 3 */
	    if( loop_on_err )
		 force_loop = TRUE;		/* set loop flag */
	}
	 else 				/* check for corrupted registers */
	{
	    reg_no = 0;
	    regs_ok = TRUE;
	    while( (reg_no <= 13) && (regs_ok) )  /* check 1st 13 regs */
		if( store_regs[ reg_no ] == exp_regs[ reg_no ] )
		    reg_no++;
		else
		    regs_ok = FALSE;
	    if( !regs_ok )
	    {
	        errcnt++;
	        if( prt_error )
		     prt_s_acc_e( reg_modified_msg );
	        if( halt_flg )
		     hlt_s_acc_e( 4 );	/* error code 4 */
	        if( loop_on_err )
		     force_loop = TRUE;		/* set loop flag */
	    }
	}
}



/************************************************************************
*		PRINT AN ERROR MESSAGE OF THE FORM
*
* cycle: xx. DMP test xx. <inst>. <error message>, index = xx
* addressing mode: <addressing mode description>
* inst buf= xx xx xx xx xx xx xx xx xx xx xx -page faults on byte(s) 0, x 
* initial Acc = xxxxxxxx,     final Acc = xxxxxxxx,   xx page faults occurred
*     operand = xxxxxxxx,  expected Acc = xxxxxxxx,   xx page faults expected
* initial PSL = xxxxxxxx,     final PSL = xxxxxxxx,   expected PSL = xxxxxxxx
************************************************************************/
prt_s_acc_e( message )
char *message;
{
	prt_dmp_er_msg( message );		/* print the error header */
	writes("initial Acc = ");
	write32h( sgl_ld_acc );			/* print initial Acc value */
	writes(",     final Acc = ");
	write32h( sgl_st_acc );			/* print final Acc value */
	writes(",   ");
	writed( no_page_faults );		/* print # page faults */
	writes(" page faults occurred\n");
	if( no_ops ) {
	    writes("    operand = ");
	    write32h( sgl_value_1 );		/* print the operand used */
	    writes(",  ");
	} else 
	    writes("                         "); /* align the expected Acc */
	writes("expected Acc = ");
	write32h( sgl_expected );		/* print the expected Acc */
	writes(",   ");
	writed( exp_page_faults );		/* print # faults expected */
	writes(" page faults expected\n");
	if( psl_val != exp_psl )
	{
	     writes("initial PSL = ");		/* print PSL data */
	     write32h( init_psl );
	     writes(",     final PSL = ");
	     write32h( psl_val );
	     writes(",   expected PSL = ");
	     write32h( exp_psl );
	     writec('\n');
	}
	if( message == reg_modified_msg )	/* print modified register */
	    prt_reg_data();			/* print bad register      */
}

 


/**************************************************************************
*	Set up the registers and halt
**************************************************************************/
hlt_s_acc_e( code )
int code;
{
	sgl_dummy1 = code;
	asm("movl _test_no,r0");		/* r0  = test number       */
	asm("movl _addr_code,r1");		/* r1  = addr mode code    */
	asm("movl _sgl_dummy1,r2");		/* r2  = error code        */
	asm("movl _cycle,r3");			/* r3  = cycle count       */
	asm("movl _sgl_ld_acc,r4");		/* r4  = initial Acc.      */
	asm("movl _sgl_st_acc,r5");		/* r5  = final Acc.        */
	if( !no_ops )
	    sgl_value_1 = 0;	
	asm("movl _sgl_value_1,r6");	        /* r6  = operand  (or 0)   */
	if( code == 1 )	{	/* data error? */
	    asm("movl _sgl_expected,r7");	/* r7  = expected Acc      */
	    asm("movl _index,r8");		/* r8  = data index        */
	}
	 else if( code == 2 ) {	/* PSL error? */
	    asm("movl _init_psl,r7");		/* r7  = initial PSL       */
	    asm("movl _psl_val,r8");		/* r8  = final PSL value   */
	    asm("movl _init_psl,r9");		/* r9  = expected PSL      */
	    asm("movl _index,r10");		/* r10 = data index        */
	}
	 else if( code == 3 ) {	/* page fault error? */
	    asm("movl _no_page_faults,r7");	/* r7  = # page faults     */
	    asm("movl _exp_page_faults,r8");	/* r8  = # faults expected */
	    asm("movl _index,r9");		/* r9  = data index        */
	}
	 else if( code == 4 ) {	/* register error? */
	    asm("movl _reg_no,r7");		/* r7  = bad register #    */
	    asm("movl _store_regs[r7],r8");	/* r8  = final (bad) value */
	    asm("movl _exp_regs[r7],r9");	/* r9  = expected value    */
	    asm("movl _index,r10");		/* r10 = data index        */
	}
	asm(".globl _hlt_sgl_acc");
	asm("_hlt_sgl_acc:");
	asm("halt");
}

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