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Return to chk_sgl_store.c CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / dmp4 |
1.1 root 1:
2: #include "dmp_defs.h"
3:
4:
5: /***********************************************************************
6: *
7: * Verify single precision results for a store type operation
8: *
9: * The operand is assumed to be in sgl_value_3. This test assumes that
10: * the flag bits of the PSL will be set by the operation. This test also
11: * assumes that the accumulator shouldn't be changed by the operation.
12: ***********************************************************************/
13: chk_sgl_s()
14: {
15: sgl_ld_acc = dbl_ld_acc.m; /* move the data to */
16: sgl_st_acc = dbl_st_acc.m; /* the sgl data */
17: sgl_expected = dbl_expected.m; /* operands */
18: sgl_value_1 = dbl_value_1.m;
19: sgl_value_2 = dbl_value_2.m;
20: sgl_value_3 = dbl_value_3.m;
21: if( sgl_ld_acc && 0x7f800000 ) /* get final ACC expected */
22: sgl_value_5 = sgl_ld_acc;
23: else
24: sgl_value_5 = 0;
25: exp_psl = init_psl & 0xffffff71; /* clear DBL & flag bits */
26: exp_psl |= PSL_C; /* set the CARRY bit */
27: if( sgl_expected < 0 )
28: exp_psl |= PSL_N; /* set the NEGATIVE bit */
29: else if( !sgl_expected )
30: exp_psl |= PSL_Z; /* set the ZERO bit */
31: if( sgl_value_3 != sgl_expected ) {
32: errcnt++;
33: if( prt_error )
34: prt_s_st_e( bad_result_msg );
35: if( halt_flg )
36: hlt_s_st_e( 1 ); /* error code 1 */
37: if( loop_on_err )
38: force_loop = TRUE; /* set loop flag */
39: }
40: else if( psl_val != exp_psl ) {
41: errcnt++;
42: if( prt_error )
43: prt_s_st_e( bad_psl_msg );
44: if( halt_flg )
45: hlt_s_st_e( 2 ); /* error code 2 */
46: if( loop_on_err )
47: force_loop = TRUE; /* set loop flag */
48: }
49: else if( no_page_faults != exp_page_faults ) {
50: errcnt++;
51: if( prt_error )
52: prt_s_st_e( trans_flt_cnt_msg );
53: if( halt_flg )
54: hlt_s_st_e( 3 ); /* error code 3 */
55: if( loop_on_err )
56: force_loop = TRUE; /* set loop flag */
57: }
58: else if( sgl_st_acc != sgl_value_5 ) {
59: errcnt++;
60: if( prt_error )
61: prt_s_st_e( acc_modified_msg );
62: if( halt_flg )
63: hlt_s_st_e( 5 ); /* error code 5 */
64: if( loop_on_err )
65: force_loop = TRUE; /* set loop flag */
66: }
67: else {
68: reg_no = 0;
69: regs_ok = TRUE;
70: while( (reg_no <= 13) && (regs_ok) ) /* check 1st 13 regs */
71: if( store_regs[ reg_no ] == exp_regs[ reg_no ] )
72: reg_no++;
73: else
74: regs_ok = FALSE;
75: if( !regs_ok ) {
76: errcnt++;
77: if( prt_error )
78: prt_s_st_e( reg_modified_msg );
79: if( halt_flg )
80: hlt_s_st_e( 4 ); /* error code 4 */
81: if( loop_on_err )
82: force_loop = TRUE; /* set loop flag */
83: }
84: }
85: }
86:
87:
88:
89: /************************************************************************
90: * PRINT AN ERROR MESSAGE
91: *
92: * cycle: xx. DMP test xx. <inst>. <error message>, index = xx
93: * addressing mode: <addressing mode description>
94: * inst buf= xx xx xx xx xx xx xx xx xx xx xx -page faults on byte(s) 0, x
95: *
96: * initial Acc = xxxxxxxx, stored = xxxxxxxx, xx page faults occurred
97: * final Acc = xxxxxxxx, expected = xxxxxxxx, xx page faults expected
98: * initial PSL = xxxxxxxx, final PSL = xxxxxxxx, expected PSL = xxxxxxxx
99: * or
100: * operand #1 = xxxxxxxx, stored = xxxxxxxx, xx page faults occurred
101: * operand #2 = xxxxxxxx, expected = xxxxxxxx, xx page faults expected
102: * initial Acc = xxxxxxxx, final Acc = xxxxxxxx, expected Acc = xxxxxxxx
103: * initial PSL = xxxxxxxx, final PSL = xxxxxxxx, expected PSL = xxxxxxxx
104: ************************************************************************/
105: prt_s_st_e( message )
106: char *message;
107: {
108: prt_dmp_er_msg( message ); /* print the error header */
109: if( no_ops == 1 ) {
110: writes("initial Acc = ");
111: write32h( sgl_ld_acc ); /* print accumulator data */
112: writes(", stored = ");
113: write32h( sgl_value_3 ); /* print the final result */
114: writes(", ");
115: writed( no_page_faults ); /* print page fault data */
116: writes(" page faults occurred\n");
117: writes(" final Acc = "); /* print final Acc vaule */
118: write32h( sgl_st_acc );
119: writes(", expected = "); /* print expected result */
120: write32h( sgl_expected );
121: writes(", ");
122: writed( exp_page_faults ); /* print exp # page faults */
123: writes(" page faults expected\n");
124: } else { /* MULL2 or MULL3 */
125: writes(" operand #1 = ");
126: write32h( sgl_value_1 ); /* print accumulator data */
127: writes(", stored = ");
128: write32h( sgl_value_3 ); /* print the final result */
129: writes(", ");
130: writed( no_page_faults ); /* print page fault data */
131: writes(" page faults occurred\n");
132: writes(" operand #2 = "); /* print final Acc vaule */
133: write32h( sgl_value_2 );
134: writes(", expected = "); /* print expected result */
135: write32h( sgl_expected );
136: writes(", ");
137: writed( exp_page_faults ); /* print exp # page faults */
138: writes(" page faults expected\n");
139: if( message == acc_modified_msg ) {
140: writes("initial Acc = ");
141: write32h( sgl_ld_acc ); /* print accumulator data */
142: writes(", final Acc = ");
143: write32h( sgl_st_acc ); /* print the final result */
144: writes(", expected Acc = ");
145: write32h( sgl_value_5 );
146: writec('\n');
147: }
148: }
149: if( message == bad_psl_msg ) {
150: writes("initial PSL = "); /* print PSL data */
151: write32h( init_psl );
152: writes(", final PSL = ");
153: write32h( psl_val );
154: writes(", expected PSL = ");
155: write32h( exp_psl );
156: writec('\n');
157: }
158: if( message == reg_modified_msg ) /* print modified register */
159: prt_reg_data(); /* print bad register */
160: }
161:
162:
163:
164: /**************************************************************************
165: * Set up the registers and halt
166: **************************************************************************/
167: hlt_s_st_e( code )
168: int code;
169: {
170: sgl_dummy1 = code;
171: asm("movl _test_no,r0"); /* r0 = test number */
172: asm("movl _addr_code,r1"); /* r1 = addressing mode */
173: asm("movl _sgl_dummy1,r2"); /* r2 = error code */
174: asm("movl _cycle,r3"); /* r3 = cycle count */
175: asm("movl _sgl_ld_acc,r4"); /* r4 = initial Acc. */
176: asm("movl _sgl_st_acc,r5"); /* r5 = final Acc. */
177: asm("movl _sgl_value_3,r6"); /* r6 = result stored */
178: asm("movl _sgl_expected,r7"); /* r7 = expected result */
179: asm("movl _addr_code,r8"); /* r8 = addr mode */
180: if( no_ops > 1 ) { /* MULL2 or MULL3 */
181: asm("movl _sgl_value_1,r9"); /* r9 = operand #1 */
182: asm("movl _sgl_value_1,r10"); /* r10 = operand #2 */
183: }
184: if( code == 2 ) {
185: asm("movl _init_psl,r11"); /* r11 = initial psl */
186: asm("movl _psl_val,r12"); /* r12 = final psl */
187: asm("movl _exp_psl,r13"); /* r13 = expected psl */
188: }
189: else if( code == 3 ) {
190: asm("movl _no_page_faults,r11"); /* r11 = # page faults */
191: asm("movl _exp_page_faults,r12"); /* r12 = # faults expected */
192: }
193: else if( code == 4 ) {
194: asm("movl _reg_no,r11"); /* r11 = bad register # */
195: asm("movl _store_regs[r11],r12"); /* r12 = final (bad) value */
196: asm("movl _exp_regs[r11],r13"); /* r13 = expected value */
197: }
198: asm(".globl _hlt_sgl_st");
199: asm("_hlt_sgl_st:");
200: asm("halt");
201: }
202:
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