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Power 6/32 Unix version 1.21

#include "dmp_defs.h"


/***********************************************************************
*
*	Verify single precision results for a store type operation
*
*  The operand is assumed to be in sgl_value_3. This test assumes that 
*  the flag bits of the PSL will be set by the operation. This test also 
*  assumes that the accumulator shouldn't be changed by the operation.
***********************************************************************/
chk_sgl_s()
{
	sgl_ld_acc   = dbl_ld_acc.m;		/* move the data to */
	sgl_st_acc   = dbl_st_acc.m;		/*   the sgl data   */
	sgl_expected = dbl_expected.m;		/*      operands    */
	sgl_value_1  = dbl_value_1.m;
	sgl_value_2  = dbl_value_2.m;
	sgl_value_3  = dbl_value_3.m;
	if( sgl_ld_acc && 0x7f800000 )		/* get final ACC expected */
	     sgl_value_5 = sgl_ld_acc;
	else
	     sgl_value_5 = 0;
	exp_psl = init_psl & 0xffffff71;	/* clear DBL & flag bits */
	exp_psl |= PSL_C;			/* set the CARRY bit */
	if( sgl_expected < 0 )
	     exp_psl |= PSL_N;			/* set the NEGATIVE bit */
	else if( !sgl_expected )
	     exp_psl |= PSL_Z;			/* set the ZERO bit */
	if( sgl_value_3 != sgl_expected ) {
	    errcnt++;
	    if( prt_error )
		 prt_s_st_e( bad_result_msg );
	    if( halt_flg )
		 hlt_s_st_e( 1 );		/* error code 1 */
	    if( loop_on_err )
		 force_loop = TRUE;		/* set loop flag */
	}
	 else if( psl_val != exp_psl ) {
	    errcnt++;
	    if( prt_error )
		 prt_s_st_e( bad_psl_msg );
	    if( halt_flg )
		 hlt_s_st_e( 2 );		/* error code 2 */
	    if( loop_on_err )
		 force_loop = TRUE;		/* set loop flag */
	}
	 else if( no_page_faults != exp_page_faults ) {
	    errcnt++;
	    if( prt_error )
		 prt_s_st_e( trans_flt_cnt_msg );
	    if( halt_flg )
		 hlt_s_st_e( 3 );		/* error code 3 */
	    if( loop_on_err )
		 force_loop = TRUE;		/* set loop flag */
	}
	 else if( sgl_st_acc != sgl_value_5 ) {
	    errcnt++;
	    if( prt_error )
		 prt_s_st_e( acc_modified_msg );
	    if( halt_flg )
		 hlt_s_st_e( 5 );		/* error code 5 */
	    if( loop_on_err )
		 force_loop = TRUE;		/* set loop flag */
	}
	 else {
	    reg_no = 0;
	    regs_ok = TRUE;
	    while( (reg_no <= 13) && (regs_ok) )  /* check 1st 13 regs */
		if( store_regs[ reg_no ] == exp_regs[ reg_no ] )
		    reg_no++;
		else
		    regs_ok = FALSE;
	    if( !regs_ok ) {
	        errcnt++;
	        if( prt_error )
		     prt_s_st_e( reg_modified_msg );
	        if( halt_flg )
		     hlt_s_st_e( 4 );		/* error code 4 */
	        if( loop_on_err )
		     force_loop = TRUE;		/* set loop flag */
	    }
	} 
}



/************************************************************************
*		PRINT AN ERROR MESSAGE
*
* cycle: xx. DMP test xx. <inst>. <error message>, index = xx
*  addressing mode: <addressing mode description>
*  inst buf= xx xx xx xx xx xx xx xx xx xx xx -page faults on byte(s) 0, x 
*
*  initial Acc = xxxxxxxx,      stored = xxxxxxxx,   xx page faults occurred
*    final Acc = xxxxxxxx,    expected = xxxxxxxx,   xx page faults expected
*  initial PSL = xxxxxxxx,   final PSL = xxxxxxxx,   expected PSL = xxxxxxxx
* or
*   operand #1 = xxxxxxxx,      stored = xxxxxxxx,   xx page faults occurred
*   operand #2 = xxxxxxxx,    expected = xxxxxxxx,   xx page faults expected
*  initial Acc = xxxxxxxx,   final Acc = xxxxxxxx,   expected Acc = xxxxxxxx
*  initial PSL = xxxxxxxx,   final PSL = xxxxxxxx,   expected PSL = xxxxxxxx
************************************************************************/
prt_s_st_e( message )
char *message;
{
	prt_dmp_er_msg( message );		/* print the error header */
	if( no_ops == 1 ) {
	     writes("initial Acc = ");
	     write32h( sgl_ld_acc );		/* print accumulator data */
	     writes(",      stored = ");
	     write32h( sgl_value_3 );		/* print the final result */
	     writes(",   ");
	     writed( no_page_faults );		/* print page fault data */
	     writes(" page faults occurred\n");
	     writes("  final Acc = ");		/* print final Acc vaule */
	     write32h( sgl_st_acc );
	     writes(",    expected = ");	/* print expected result */
	     write32h( sgl_expected );
	     writes(",   ");
	     writed( exp_page_faults );		/* print exp # page faults */
	     writes(" page faults expected\n");
	} else {				/* MULL2 or MULL3 */
	     writes(" operand #1 = ");
	     write32h( sgl_value_1 );		/* print accumulator data */
	     writes(",      stored = ");
	     write32h( sgl_value_3 );		/* print the final result */
	     writes(",   ");
	     writed( no_page_faults );		/* print page fault data */
	     writes(" page faults occurred\n");
	     writes(" operand #2 = ");		/* print final Acc vaule */
	     write32h( sgl_value_2 );
	     writes(",    expected = ");	/* print expected result */
	     write32h( sgl_expected );
	     writes(",   ");
	     writed( exp_page_faults );		/* print exp # page faults */
	     writes(" page faults expected\n");
	     if( message == acc_modified_msg ) {
	          writes("initial Acc = ");
	          write32h( sgl_ld_acc );	/* print accumulator data */
	          writes(",   final Acc = ");
	          write32h( sgl_st_acc );	/* print the final result */
	          writes(",   expected Acc = ");
	          write32h( sgl_value_5 );
	          writec('\n');
	     }
	}
	if( message == bad_psl_msg ) {
	     writes("initial PSL = ");		/* print PSL data */
	     write32h( init_psl );
	     writes(",   final PSL = ");
	     write32h( psl_val );
	     writes(",   expected PSL = ");
	     write32h( exp_psl );
	     writec('\n');
	}
	if( message == reg_modified_msg )	/* print modified register */
	    prt_reg_data();			/* print bad register      */
}



/**************************************************************************
*	Set up the registers and halt
**************************************************************************/
hlt_s_st_e( code )
int code;
{
	sgl_dummy1 = code;
	asm("movl _test_no,r0");		/* r0  = test number       */
	asm("movl _addr_code,r1");		/* r1  = addressing mode   */
	asm("movl _sgl_dummy1,r2");		/* r2  = error code        */
	asm("movl _cycle,r3");			/* r3  = cycle count       */
	asm("movl _sgl_ld_acc,r4");		/* r4  = initial Acc.      */
	asm("movl _sgl_st_acc,r5");		/* r5  = final Acc.        */
	asm("movl _sgl_value_3,r6");		/* r6  = result stored     */
	asm("movl _sgl_expected,r7");		/* r7  = expected result   */
	asm("movl _addr_code,r8"); 	        /* r8  = addr mode         */
	if( no_ops > 1 ) {  /* MULL2 or MULL3 */ 
	    asm("movl _sgl_value_1,r9");	/* r9  = operand #1        */
	    asm("movl _sgl_value_1,r10");	/* r10 = operand #2        */
	}
	if( code == 2 ) {
	    asm("movl _init_psl,r11");		/* r11 = initial psl       */
	    asm("movl _psl_val,r12");		/* r12 = final psl         */
	    asm("movl _exp_psl,r13");		/* r13 = expected psl      */
	}
	 else if( code == 3 ) {
	    asm("movl _no_page_faults,r11");	/* r11 = # page faults     */
	    asm("movl _exp_page_faults,r12");	/* r12 = # faults expected */
	}
	 else if( code == 4 ) {
	    asm("movl _reg_no,r11");		/* r11 = bad register #    */
	    asm("movl _store_regs[r11],r12");	/* r12 = final (bad) value */
	    asm("movl _exp_regs[r11],r13");	/* r13 = expected value    */
	}
	asm(".globl _hlt_sgl_st");
	asm("_hlt_sgl_st:");
	asm("halt");
}

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