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Power 6/32 Unix version 1.21

#include "dmp_defs.h"

/***********************************************************************
*
*	COMMON ROUTINES FOR THE DEMAND PAGING TESTS
*
***********************************************************************/



/************************************************************************
*		print a demand paging test error message
*
* The message will be of the form:
* cycle: xx. DMP test xx. <inst>. <error message>
* instruction cache {hit/miss},  data index = xx,  page faults on byte(s) 0, x
* addressing mode: <addressing mode description>
* { pipeline test #x. <instruction buffer description> }
* inst buf = xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx
************************************************************************/
prt_dmp_er_msg( msg )
char *msg;
{
int page_byte;
	if( !error )  {				/* 1st err. for this inst? */
	     error++;				/* set current error flg   */
	     writec('\n');			/* start a new line        */
	}
	writes("\ncycle: ");
	writed( cycle );			/* print the cycle #     */
	writes(". DMP test ");
	writeh( test_no );			/* print the test #      */
	writes(". ");
	writes( op_name );			/* print the inst name   */
	writes( msg );				/* print the error msg   */
	writes("\ninstruction cache ");
	if( i_cache_hit )
	     writes("hit");
	else
	     writes("miss");
	writes(",  data index = ");		/* print the data index  */
	writed( index );
	writes(",  page faults on inst. byte(s) 0");
	page_byte = 20 - shift_count;	  	/* get byte w/ page break */
	if( page_byte ) {
	    writes(", ");
	    writed( page_byte );
	}
	writec('\n');
	if( no_ops ) {				/* print the addressing mode */
	    writes("addressing mode: ");
	    writes( addressing_modes[ addr_mode ] );
	    writec('\n');
	}
	if( pipe_test ) {
	     writes("pipeline test #");
	     writed( pipe_test );		/* print the pipe test # */
	     writes(".  ");
	     if( pipe_inst1 == LDD_OP_CODE )
		   writes("LDD (initial acc), ");
	       else if( pipe_inst1 == LDF_OP_CODE )
		   writes("LDF (initial acc), ");
	       else if( pipe_inst1 == MULD_OP_CODE )
		   writes("MULD (1.0), ");
	       else if( pipe_inst1 == MULF_OP_CODE )
		   writes("MULF (1.0), ");
	     writes( op_name );
	     if( !(no_ops) )
		 writes(",  ");
	     else if( no_ops == 1 )
		 writes(" (operand),  ");
	     else if( no_ops == 2 )
		 writes(" (op #1, op #2),  ");
	     if( pipe_inst2 == MULD_OP_CODE )
		 writes("MULD (1.0)\n");
	     else
		 writes("MULF (1.0)\n");
	}
	print_inst_buf();		/* print the inst buf contents */
}



/********************************************************************
*	print the contents of the instruction buffer
* inst buf = xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx
********************************************************************/
print_inst_buf()
{
int page_byte;
	writes("inst buf =");
	write_lw_bytes( inst_buf[0] );	  /* print word 0 as bytes */
	write_lw_bytes( inst_buf[1] );	  /* print word 1 as bytes */
	write_lw_bytes( inst_buf[2] );	  /* print word 2 as bytes */
	write_lw_bytes( inst_buf[3] );	  /* print word 3 as bytes */
	write_lw_bytes( inst_buf[4] );	  /* print word 4 as bytes */
	writec('\n');
}




/********************************************************************
*	print a longword a byte at a time
********************************************************************/
write_lw_bytes( lw )
int lw;
{
	writec(' ');
	writeh( (lw >> 28) & 0xf );
	writeh( (lw >> 24) & 0xf );
	writec(' ');
	writeh( (lw >> 20) & 0xf );
	writeh( (lw >> 16) & 0xf );
	writec(' ');
	writeh( (lw >> 12) & 0xf );
	writeh( (lw >> 8) & 0xf );
	writec(' ');
	writeh( (lw >> 4) & 0xf );
	writeh( (lw & 0xf) );
}
		 


/********************************************************************
*	print the information for a bad register fault
********************************************************************/
prt_reg_data()
{
	    writes(" register ");
	    writed( reg_no );
	    writes(" = ");
	    write32h( store_regs[ reg_no ] );
	    writes(",  should be = ");
	    write32h( exp_regs[ reg_no ] );
	    writec('\n');
}



/*
 ***********************************************************************
 *	fill a register buffer with known patterns
 ***********************************************************************
*/
fill_reg_buf( buffer )
int *buffer;
{
	buffer[0]  = 0x10101010;	/* register '0' data */
	buffer[1]  = 0x11111111;
	buffer[2]  = 0x12121212;
	buffer[3]  = 0x13131313;
	buffer[4]  = 0x14141414;
	buffer[5]  = 0x15151515;
	buffer[6]  = 0x16161616;
	buffer[7]  = 0x17171717;
	buffer[8]  = 0x18181818;
	buffer[9]  = 0x19191919;
	buffer[10] = 0x1a1a1a1a;
	buffer[11] = 0x1b1b1b1b;
	buffer[12] = 0x1c1c1c1c;
	buffer[13] = 0x1d1d1d1d;
}

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