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Power 6/32 Unix version 1.21

/**************************************************************************
*
*		FLOATING POINT MACRO TEST GLOBAL VARIABLES
*
**************************************************************************/


filler:
	.align	2			/* longword align */
	.globl	_run_list
_run_list:
	.long	0			/* user entered test to execute */
	.align	2			/* longword align */
	
	.globl	_test_no
_test_no:
	.long	0			/* test # being executed */

	.globl	_subtest
_subtest:
	.long	0			/* subtest # being executed */

	.globl	_cycle
_cycle:
	.long	0			/* current test cycle            */

	.globl	_run_all
_run_all:
	.long	0			/* flag - if <> 0, run all tests */

	.align	2
	.globl	_Hardclk
_Hardclk:
	incl	_clk_cnt
	rei

	.align 	2
	.globl  _tstmsk
_tstmsk: .long	0		/* tests to run */
	.globl	_ss1
_ss1:	.long	0	/* If 1 then do not print heading messages */

	.globl	_zero		/* a known '0' data pattern */
_zero:
	.long 0

	.globl	_nonstop	/* continuous testing flag */
_nonstop:
	.long 0

	.globl	_OPTIONS	/* r1 options */
_OPTIONS:
	.long 0

	.globl _halt_flg	/* b(0) flag -halt on error */
_halt_flg:
	.long 0

	.globl	_loop_on_err	/* b(1) flag -loop on error */
_loop_on_err:
	.long 0

	.globl _prt_error	/* b(2) flag -print error messages */
_prt_error:
	.long 0

	.globl	_prt_hdrs	/* b(3) flag -print header messages */
_prt_hdrs:
	.long 0

	.globl	_en_data_cache	/* b(4) flag -enable the data cache */
_en_data_cache:
	.long 0

	.globl	_user_mode	/* b(5) flag -run DMP tests in user mode */
_user_mode:
	.long 0

	.globl	_evt_inst	/* R3 flag -instruction op-code to test */
_evt_inst:
	.long 0

	.globl	_no_fpp_wcs	/* flag -the NO-FPP WCS was loaded */
_no_fpp_wcs:
	.long 0

	.globl _emulated_inst	/* flag -instr is emulated w/ no-fpp wcs */
_emulated_inst:
	.long 0

	.globl _force_loop	/* flag -force loop after error if set */
_force_loop:
	.long 0

	.globl _clock_event	/* flag - a clock event occurred  */
_clock_event:
	.long 0

	.globl _test_event	/* flag - type of event under test */
_test_event:
	.long 0

	.globl _exp_event	/* flag - expect fpp event & type expected */
_exp_event:
	.long 0

	.globl _exp_code	/* flag - type of arithmetic fault expected */
_exp_code:
	.long 0

	.globl _evt_disabled	/* flag - event is disabled in the PSW */
_evt_disabled:
	.long 0

	.globl _disable_mask	/* mask to disable events in the PSW */
_disable_mask:
	.word 0
	.align 2

	.globl _nop_cnt		/* # of NOPs between test instructions */
_nop_cnt:
	.long 0

	.globl _pipe_test	/* flag - pipelineing test in progress */
_pipe_test:
	.long 0

	.globl _pipe_inst1	/* 1st instruction in pipelined test */
_pipe_inst1:
	.long 0

	.globl _pipe_inst2	/* last instruction in pipelined test */
_pipe_inst2:
	.long 0

	.globl _event_msg	/* pointer to event message  */
_event_msg:
	.long 0

	.globl _event_return	/* return address after fpp event */
_event_return:
	.long 0

	.globl _unexp_event_ret /* return address after unexpected event */
_unexp_event_ret:
	.long 0

	.globl _event_type	/* event type (arith, resop, etc.)  */
_event_type:
	.long 0

	.globl _event_code	/* arith fault type (ovfl, undfl,...) */
_event_code:
	.long 0

	.globl _fpm_trap_occurred	/* flag -got an FPM trap */
_fpm_trap_occurred:
	.long 0

	.globl _push_cnt	/* # longwords pushed on stack by an event */
_push_cnt:
	.long 0

	.globl _exp_push_cnt	/* # longwords expected to be pushed */
_exp_push_cnt:
	.long 0

	.globl _i_cache_hit	/* instruction cache hit flag */
_i_cache_hit:
	.long 0

	.globl _monitor_fp	/* the monitor's frame pointer */
_monitor_fp:
	.long 0

	.globl _monitor_sp	/* the monitor's stack pointer */
_monitor_sp:
	.long 0

	.globl _run_code_psl	/* "run_code"'s entry PSL */
_run_code_psl:
	.long 0

	.globl _event_pc	/* PC pushed on the stack by an event */
_event_pc:
	.long 0

	.globl _event_psl	/* PSL pushed on the stack by an event */
_event_psl:
	.long 0

	.globl _post_evt_acc	/* Accumulator value after an event */
_post_evt_acc:
	.long 0
	.long 0

	.globl _post_event_psl	/* PSL after an FPM event  */
_post_event_psl:
	.long 0

	.globl _pre_event_fp	/* frame pointer before an expected event */
_pre_event_fp:
	.long 0

	.globl _pre_event_sp	/* stack pointer before an expected event */
_pre_event_sp:
	.long 0
	
	.globl _post_event_sp	/* stack pointer after an fpp event */
_post_event_sp:
	.long 0

/* post_event_fp is with STORE_REG */

	.globl	_count		/* cycle count */
_count: .long 0

	.globl	_tmp_mcbr
_tmp_mcbr: .long 0
	.globl	_tmp_mear
_tmp_mear: .long 0



	.globl _dbl_value_1			/* 1st dbl test value      */
_dbl_value_1:
	.long 0
	.long 0

	.globl _dbl_value_2			/* 2nd dbl test value      */
_dbl_value_2:
	.long 0
	.long 0

	.globl _dbl_value_3			/* 3rd dbl test value      */
_dbl_value_3:
	.long 0
	.long 0

	.globl _dbl_expected			/* expected dbl data       */
_dbl_expected:
	.long  0
	.long  0
	
	.globl _dbl_ld_acc			/* load dbl acc. from here */
_dbl_ld_acc:
	.long  0
	.long  0
	
	.globl _dbl_st_acc			/* stored dbl accumulator  */
_dbl_st_acc:
	.long  0
	.long  0
	
	.globl _dbl_dummy1			/* dummy quad word         */
_dbl_dummy1:
	.long  0
	.long  0
	
	.globl _dbl_dummy2			/* ditto                   */
_dbl_dummy2:
	.long  0
	.long  0

	.globl _sgl_value_1			/* 1st sgl data value      */
_sgl_value_1:
	.long  0
	
	.globl _sgl_value_2			/* 2nd sgl data value      */
_sgl_value_2:
	.long  0
	
	.globl _sgl_value_3			/* 3rd sgl data value      */
_sgl_value_3:
	.long  0
	
	.globl _sgl_value_4			/* 4th sgl data value      */
_sgl_value_4:
	.long  0
	
	.globl _sgl_value_5			/* 5th sgl data value      */
_sgl_value_5:
	.long  0
	
	.globl _sgl_value_6			/* 6th sgl data value      */
_sgl_value_6:
	.long  0
	
	.globl _sgl_value_7			/* 7th sgl data value      */
_sgl_value_7:
	.long  0
	
	.globl _sgl_value_8			/* 8th sgl data value      */
_sgl_value_8:
	.long  0
	
	.globl _sgl_value_9			/* 9th sgl data value      */
_sgl_value_9:
	.long  0
	
	.globl _sgl_value_10			/* 10th sgl data value     */
_sgl_value_10:
	.long  0
	
	.globl _sgl_expected			/* expected sgl data       */
_sgl_expected:
	.long  0
	
	.globl _sgl_ld_acc			/* load sgl acc. from here */
_sgl_ld_acc:
	.long  0
	
	.globl _sgl_st_acc			/* stored sgl acc.         */
_sgl_st_acc:
	.long  0
	
	.globl _sgl_dummy1			/* a dummy variable        */
_sgl_dummy1:
	.long  0
	
	.globl _sgl_dummy2			/* a dummy variable, too   */
_sgl_dummy2:
	.long  0

	.globl _psl_val				/* PSL value                */
_psl_val:
	.long  0
	
	.globl _exp_psl				/* expected PSL value       */
_exp_psl:
	.long  0

	.globl _init_psl			/* initial PSL value        */
_init_psl:
	.long  0

	.globl _status_array			/* array of +, -, 0 data    */
_status_array:
	.long  255				/* + */
	.long  -15				/* - */
	.long  0				/* 0 */

	.globl _status_index			/* index to status array    */
_status_index:
	.long  0
	
	.globl _test_flags			/* condition flags seen     */
_test_flags:
	.long  0
	
	.globl _fpm_ms_op			/* MS op on stack -FPM trap */
_fpm_ms_op:
	.long  0
	
	.globl _fpm_ls_op			/* LS op on stack -FPM trap */
_fpm_ls_op:
	.long  0
	
	.globl _fpm_op_code			/* stack's op-code -FPM trap */
_fpm_op_code:
	.long  0
	
	.globl _fpm_pc 				/* stack's PC -FPM trap */
_fpm_pc:
	.long  0
	
	.globl _fpm_psl 			/* stack's PSL -FPM trap */
_fpm_psl:
	.long  0
	
	.globl _rtc_occurred 			/* flag -clock event seen   */
_rtc_occurred:
	.long  0
	
	.globl _clock_retrys 			/* # times to wait for clock */
_clock_retrys:
	.long  0
	
	.globl _pop_val_1			/* 1st popped stack data    */
_pop_val_1:
	.long  0
	
	.globl _pop_val_2			/* 2nd popped stack data    */
_pop_val_2:
	.long  0
	
	.globl _pop_val_3			/* 3rd popped stack data    */
_pop_val_3:
	.long  0
	
	.globl _pop_val_4			/* 4th popped stack data    */
_pop_val_4:
	.long  0
	
	.globl _pop_val_5			/* 5th popped stack data    */
_pop_val_5:
	.long  0
	
	.globl _pop_val_6			/* 6th popped stack data    */
_pop_val_6:
	.long  0

	.globl _exp_pc				/* expected PC              */
_exp_pc:
	.long  0
	
	.globl _act_pc				/* actual PC                */
_act_pc:
	.long  0
	
	.globl _op_code				/* op-code of the inst.     */
_op_code:
	.long  0

	.globl _op_name				/* instruction name         */
_op_name:
	.long  0
	
	.globl _precision			/* sgl / dbl precision inst */
_precision:
	.long  0
	
	.globl	_acc_ld_size			/* sgl or dbl acc. loaded  */
_acc_ld_size:
	.long 0

	.globl	_acc_st_size			/* sgl or dbl acc. stored  */
_acc_st_size:
	.long 0
	
	.globl _no_ops				/* # of operands needed     */
_no_ops:
	.long  0
	
	.globl _op_type				/* load / store operand     */
_op_type:
	.long  0
	
	.globl _load_type_inst			/* flag -inst loads the Acc */
_load_type_inst:
	.long  0
	
	.globl _sgl_op				/* inst has sgl operand(s)  */
_sgl_op:
	.long  0
	
	.globl _s_to_d				/* inst converts sgl to dbl */
_s_to_d:
	.long  0
	
	.globl _d_to_s				/* inst converts dbl to sgl */
_d_to_s:
	.long  0
	
	.globl _valid_test			/* flag -some tests were run */
_valid_test:
	.long  0
	
	.globl _insts_tested			/* # of instructions tested */
_insts_tested:
	.long  0
	
	.globl _force_sp			/* flag to set the SP value */
_force_sp:
	.long  0
	
	.globl _data_ptr			/* ptr to dmp test data tbl */
_data_ptr:
	.long  0
	
	.globl _test_ptr			/* ptr to result test func. */
_test_ptr:
	.long  0
	
	.globl _no_page_faults			/* # addr page faults found */
_no_page_faults:
	.long  0
	
	.globl _exp_page_faults			/* # addr page faults exp'd */
_exp_page_faults:
	.long  0

	.globl _trans_acc_error			/* flag -bad Acc after pg flt */
_trans_acc_error:
	.long  0

	.globl _trans_acc			/* Acc. after a page fault    */
_trans_acc:
	.long  0
	.long  0

	.globl _exp_trans_acc			/* Acc. expected after fault  */
_exp_trans_acc:
	.long  0
	.long  0

/*
 * OFFSETS FROM THE CODE BUFFER TO THE DMP DATA OPERANDS
*/
	.globl _os_b_op1			/* offset to byte operand 1 */
_os_b_op1:
	.long  _dmp_byte_op_1-DMP_PG_1

	.globl _os_b_op2			/* offset to byte operand 2 */
_os_b_op2:
	.long  _dmp_byte_op_2-DMP_PG_1

	.globl _os_b_op3			/* offset to byte operand 3 */
_os_b_op3:
	.long  _dmp_byte_op_3-DMP_PG_1

	.globl _os_op1				/* offset to word operand 1 */
_os_op1:
	.long  _dmp_op_1-DMP_PG_1

	.globl _os_op2				/* offset to word operand 2 */
_os_op2:
	.long  _dmp_op_2-DMP_PG_1

	.globl _os_op3				/* offset to word operand 3 */
_os_op3:
	.long  _dmp_op_3-DMP_PG_1

	.globl _os_ad_op1			/* offset to operand 1 ptr. */
_os_ad_op1:
	.long  _dmp_op_1_ptr-DMP_PG_1

	.globl _os_ad_op2			/* offset to operand 2 ptr. */
_os_ad_op2:
	.long  _dmp_op_2_ptr-DMP_PG_1

	.globl _os_ad_op3			/* offset to operand 3 ptr. */
_os_ad_op3:
	.long  _dmp_op_3_ptr-DMP_PG_1


/*
 * Pointers to the Demand Paging Data Operands
*/
	.globl	_adr_b_op1			/* byte operand 1's address */
_adr_b_op1:
	.long	_dmp_byte_op_1

	.globl	_adr_bop1_lsw			/* addr of byte op 1's LSW  */
_adr_bop1_lsw:
	.long	_dmp_byte_op_1+4

	.globl	_adr_b_op2			/* byte operand 2's address */
_adr_b_op2:
	.long	_dmp_byte_op_2

	.globl	_adr_bop2_lsw			/* addr of byte op 2's LSW  */
_adr_bop2_lsw:
	.long	_dmp_byte_op_2+4

	.globl	_adr_b_op3			/* byte operand 3's address */
_adr_b_op3:
	.long	_dmp_byte_op_3

	.globl	_adr_op1			/* operand 1's address */
_adr_op1:
	.long	_dmp_op_1

	.globl	_adr_op1_lsw			/* address of LSW of dbl op 1 */
_adr_op1_lsw:
	.long	_dmp_op_1+4

	.globl	_adr_op2			/* operand 2's address */
_adr_op2:
	.long	_dmp_op_2

	.globl	_adr_op2_lsw			/* address of LSW of dbl op 2 */
_adr_op2_lsw:
	.long	_dmp_op_2+4

	.globl	_adr_op3			/* operand 3's address */
_adr_op3:
	.long	_dmp_op_3

	.globl	_adr_op4			/* operand 4's address */
_adr_op4:
	.long	_dmp_op_4

	.globl	_adr_op5			/* operand 5's address */
_adr_op5:
	.long	_dmp_op_5

	.globl	_adr_op1_ptr			/* op. ptr 1's address */
_adr_op1_ptr:
	.long	_dmp_op_1_ptr

	.globl	_adr_op3_ptr			/* op. ptr 3's address */
_adr_op3_ptr:
	.long	_dmp_op_3_ptr

	.globl	_adr_op2_ptr			/* op. ptr 2's address */
_adr_op2_ptr:
	.long	_dmp_op_2_ptr

	.globl _reg_no				/* register being validated */
_reg_no:
	.long  0
	
	.globl _regs_ok				/* flag -no reg. miscompares*/
_regs_ok:
	.long  0
	
	.globl _exp_reg				/* expected reg. value      */
_exp_reg:
	.long  0
	
	.globl _act_reg				/* actual register value    */
_act_reg:
	.long  0
	
	.globl _test_index			/* test table index         */
_test_index:
	.long  0
	
	.globl _inst_index			/* instruction table index  */
_inst_index:
	.long  0
	
	.globl _index				/* test data index          */
_index:
	.long  0
	
	.globl _index2				/* test data index # 2      */
_index2:
	.long  0
	
	.globl _old_indx			/* test data index (-1)     */
_old_indx:
	.long  0
	
	.globl _max_index			/* maximum data index       */
_max_index:
	.long  0
	
	.globl _loop_val_1a			/* op_1 MSW for data swaps */
_loop_val_1a:
	.long  0x40800000
	
	.globl _loop_val_1b			/* op_1 MSW for data swaps */
_loop_val_1b: 
	.long  0x40800000
	
	.globl _loop_val_1c			/*op_1 LSW for data swaps */
_loop_val_1c: 
	.long  0x40800000
	
	.globl _loop_val_1d			/* op_1 LSW for data swaps */
_loop_val_1d: 
	.long  0x40800000
	
	.globl _loop_val_2a			/* op_2 MSW for data swaps */
_loop_val_2a:
	.long  0x40800000
	
	.globl _loop_val_2b			/* op_2 MSW for data swaps */
_loop_val_2b:
	.long  0x40800000
	
	.globl _loop_val_2c			/* op_2 LSW for data swaps */
_loop_val_2c:
	.long  0x40800000
	
	.globl _loop_val_2d			/* op_2 LSW for data swaps */
_loop_val_2d:
	.long  0x40800000
	
	.globl _error				/* an error exists flag     */
_error:
	.long 0

	.globl _err_code			/* code ( type ) of error   */
_err_code:
	.long 0

	.globl _subtest_message			/* pointer to test message  */
_subtest_message:
	.long 0

	.globl _error_message			/* pointer to error message */
_error_message:
	.long 0

	.globl _load_regs			/* load registers' buffer  */
_load_regs:
	.space (15*4)

	.globl _store_regs			/* store registers' buffer */
_store_regs:
	.space (15*4)

	.globl _exp_regs			/* expected register data  */
_exp_regs:
	.space (15*4)
	
	.globl _post_event_fp			/* frame pointer storage    */
_post_event_fp:					/*  (must follow store_reg */
	.long 0


	.globl _address_fault_expected		/* reserved-address fault? */
_address_fault_expected:
	.long 0

	.globl _loop_addr			/* for addr test looping   */
_loop_addr:
	.long 0

	.globl _next_addr			/* for address testing     */
_next_addr:
	.long 0

	.globl _addr_mode			/* current addressing mode */
_addr_mode:
	.long 0

	.globl _addr_code			/* code for addressing mode */
_addr_code:
	.long 0

	.globl _addr_code2			/* addr code for 2nd operand */
_addr_code2:
	.long 0

	.globl _addr_code3			/* addr code for 3rd operand */
_addr_code3:
	.long 0

	.globl _addr_codeB			/* 2nd adr code for indexing */
_addr_codeB:
	.long 0

	.globl _addr_code_p1			/* addr code for pipelines */
_addr_code_p1:
	.long 0

	.globl _addr_code_p2			/* addr code for pipelines */
_addr_code_p2:
	.long 0

	.globl _inst_size			/* # of bytes in instruction */
_inst_size:
	.long 0

	.globl _shift_count			/* inst_buf shift count     */
_shift_count:
	.long 0

	.globl _min_shift			/* minimum inst_buf shift   */
_min_shift:
	.long 0

	.globl _addr_size			/* size of addr specifier(s)*/
_addr_size:
	.long 0

	.globl _addr_1				/* address specifier # 1    */
_addr_1:
	.long 0

	.globl _addr_2				/* address specifier # 2    */
_addr_2:
	.long 0

	.globl _addr_3				/* address specifier # 3    */
_addr_3:
	.long 0

	.globl _inst_buf			/* instruction code buffer */
_inst_buf:
	.space 20 				/* 20 bytes (5 longwords) */
	.globl _end_of_inst_buf
_end_of_inst_buf:

	.globl _code_addr			/* start of test code */
_code_addr:
	.long 0




/*
 * exaustive test data
*/

	.globl _fudgeing_ok			/* +/- 1 answer is OK      */
_fudgeing_ok:
	.long 0

	.globl _not_done			/* keep testing flag       */
_not_done:
	.long 0

	.globl _use_ITT_data			/* use ITT type fractions  */
_use_ITT_data:
	.long 0

	.space (80*4)				/* room for 40 stack entries */
	.long 0
	.globl _pointer_data			/* point test FP / SP here */
_pointer_data:
	.long 0
	.globl _pointer_data_2			/* LSW for FP/SP addressing*/
_pointer_data_2:
	.long 0
	.space (10*4)				/* more buffer space       */

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