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1.1 root 1: # 1 "temp$.s"
2:
3:
4:
5:
6:
7: .set SBR,0
8: .set SLR,1
9: .set P0BR,2
10: .set P0LR,3
11: .set P1BR,4
12: .set P1LR,5
13: .set P2BR,6
14: .set P2LR,7
15: .set IPL,8
16: .set MME,9
17: .set TBIA,10
18:
19: .set TBIS,11
20:
21: .set DCK,12
22: .set CCK,13
23: .set PCBB,14
24: .set ISP,15
25: .set SIRR,16
26: .set SISR,17
27: .set SCBB,18
28: .set KSP,19
29: .set USP,20
30: .set DCB,21
31: .set PACC,23
32:
33: .set P1DC,24
34: .set PADC,25
35:
36: .set HISR,26
37: .set DCR,27
38: .set PDCS,28
39:
40:
41: #TAHOE program status longword
42:
43:
44: .set PSL_C,0x00000001
45: .set PSL_V,0x00000002
46: .set PSL_Z,0x00000004
47: .set Z,0x00000004
48: .set PSL_N,0x00000008
49: .set PSL_T,0x00000010
50: .set PSL_I,0x00000020
51: .set PSL_EN_OVFL,0x20
52: .set PSL_EN_UNDFL,0x40
53: .set PSL_DBL,0x80
54: .set PSL_IPL,0x001f0000
55: .set PSL_MOD,0x01000000
56: .set PSL_IS,0x04000000
57: .set PSL_TP,0x40000000
58:
59:
60: # TAHOE page table entry
61: #/
62: .set PG_V,0x8000000
63: .set PG_PROT,0x78000000
64: .set PG_M,0x04000000
65: .set PG_USED,0x02000000
66: .set PG_NC,0x01000000
67: .set PG_PFNUM,0x003fffff
68:
69: .set PG_NOACC,0
70: .set PG_KR,0x40000000
71: .set PG_KW,0x60000000
72: .set PG_URKR,0x50000000
73: .set PG_URKW,0x70000000
74: .set PG_UW,0x78000000
75:
76: #* PCB offsets & diagnostic extension to pcb */
77: #* PCB is at pcb0 */
78:
79:
80: .set PCB_SIZE, 24
81: .set PCB_KSP, 0
82: .set PCB_USP, 4
83: .set PCB_R0, 8
84: .set PCB_R1, 12
85: .set PCB_R2, 16
86: .set PCB_R3, 20
87: .set PCB_R4, 24
88: .set PCB_R5, 28
89: .set PCB_R6, 32
90: .set PCB_R7, 36
91: .set PCB_R8, 40
92: .set PCB_R9, 44
93: .set PCB_R10, 48
94: .set PCB_R11, 52
95: .set PCB_R12, 56
96: .set PCB_R13, 60
97: .set PCB_PC, 64
98: .set PCB_PSL, 68
99: .set PCB_P0BR, 72
100: .set PCB_P0LR, 76
101: .set PCB_P1BR, 80
102: .set PCB_P1LR, 84
103: .set PCB_P2BR, 88
104: .set PCB_P2LR, 92
105: .set PCB_ACCM, 96
106: .set PCB_ACCL, 100
107: #*
108: # Diagnostic pcb extension
109: #/
110: .set PCB_STAT, 104
111:
112:
113:
114: #* fundamental constants */
115:
116: #*
117: # fundamental constants of the implementation--
118: # cannot be changed easily.
119: #/
120:
121: .set NBPG,1024
122: .set PGOFSET,(NBPG-1)
123: .set PGSHIFT,10
124: .set HIGH,0x1f
125:
126:
127: #* SCB offsets */
128: #* SCB is at scb */
129:
130: .set PFVEC,1*4
131: .set PRVEC,2*4
132: .set CLOCKVEC,7*4
133: .set CRVEC,0xa*4
134: .set CXVEC,44
135: .set SIVEC1,0x1e*4
136:
137:
138: .set BEVEC,0x20*4
139: .set SYSVEC,0x2b*4
140: .set PINSTVEC,0x2c*4
141: .set PRIVSVEC,0x2c*4
142: .set ROVEC,0x2d*4
143: .set RAVEC,0x2e*4
144: .set PROTVEC,0x2f*4
145: .set TRANS,0x30
146: .set TRANSVEC,0x30*4
147: .set KSPVEC,0x31*4
148: .set TRACEVEC,0x32*4
149: .set BPTVEC,0x33*4
150: .set ARITHVEC,0x34*4
151: .set ALIGNVEC,0x35*4
152: .set FPMVEC,0x37*4
153: .set IO14VEC,256
154: .set IO15VEC,320
155: .set IO16VEC,384
156: .set IO17VEC,448
157:
158: #* SPT (system page table) offsets */
159: #* SPT is at Sysmap */
160:
161: .set SCBPTE,8
162: .set BUFPTE,12
163: .set ISPTE,16
164: .set IS1PTE,20
165: .set SPTPTE,20
166: .set SPT1PTE,20
167: .set IOMAPPTE,24
168: .set PCBPTE,28
169: .set U0P0PTE,32
170: .set U0P1PTE,36
171: .set U0P2PTE,40
172: .set U1P0PTE,44
173: .set U1P1PTE,48
174: .set U1P2PTE,52
175: .set U2P0PTE,56
176: .set U2P1PTE,60
177: .set U2P2PTE,64
178: .set U3P0PTE,68
179: .set U3P1PTE,72
180: .set U3P2PTE,76
181: .set U4P0PTE,80
182: .set U4P1PTE,84
183: .set U4P2PTE,88
184: .set U5P0PTE,92
185: .set U5P1PTE,96
186: .set U5P2PTE,100
187: .set U6P0PTE,104
188: .set U6P1PTE,108
189: .set U6P2PTE,112
190: .set U7P0PTE,116
191: .set U7P1PTE,120
192: .set U7P2PTE,124
193: .set IOB0PTE,128
194: .set IOB1PTE,132
195: .set IOB2PTE,136
196: .set IOB3PTE,140
197: .set IOB4PTE,144
198: .set IOB5PTE,148
199: .set IOB6PTE,152
200: .set IOB7PTE,156
201:
202:
203: #* trap.h 4.6 81/03/03 */
204:
205: #*
206: #* Trap type values
207: #/
208:
209: .set RESADFLT,0
210: .set PRIVINFLT,1
211: .set RESOPFLT,2
212: .set BPTFLT,3
213: .set ALIGNFLT,4
214: .set SYSCALL,5
215: .set ARITHTRAP,6
216: .set PROTFLT,7
217: .set TRCTRAP,8
218: .set TRANSFLT,9
219: .set DONE,255
220:
221:
222: # Event codes
223:
224: .set RTCLOCK_CODE,7
225: .set RESOP_CODE,0x2d
226: .set RESAD_CODE,0x2e
227: .set ARITH_CODE,0x34
228: .set FPM_CODE,0x37
229: .set INTEGER_OVERFLOW,1
230:
231:
232: # Arithmetic Event types
233:
234: .set INT_OVFL_CODE,1
235: .set INT_0_DIV_CODE,2
236: .set FLT_0_DIV_CODE,3
237: .set FLT_OVFL_CODE,4
238: .set FLT_UNDFL_CODE,5
239:
240:
241: # Floating Point Instruction Op-Codes
242:
243: .set LDF_OP_CODE,0x06
244: .set LDD_OP_CODE,0x07
245: .set LNF_OP_CODE,0x16
246: .set LND_OP_CODE,0x17
247: .set STF_OP_CODE,0x26
248: .set STD_OP_CODE,0x27
249: .set CMPF_OP_CODE,0x36
250: .set CMPD_OP_CODE,0x37
251: .set CMPF2_OP_CODE,0x46
252: .set CMPD2_OP_CODE,0x47
253: .set TSTF_OP_CODE,0x56
254: .set TSTD_OP_CODE,0x57
255: .set PUSHD_OP_CODE,0x67
256: .set CVLF_OP_CODE,0x76
257: .set CVLD_OP_CODE,0x77
258: .set CVFL_OP_CODE,0x86
259: .set CVDL_OP_CODE,0x87
260: .set LDFD_OP_CODE,0x97
261: .set CVDF_OP_CODE,0xa6
262: .set NEGF_OP_CODE,0xb6
263: .set NEGD_OP_CODE,0xb7
264: .set ADDF_OP_CODE,0xc6
265: .set ADDD_OP_CODE,0xc7
266: .set SUBF_OP_CODE,0xd6
267: .set SUBD_OP_CODE,0xd7
268: .set MULF_OP_CODE,0xe6
269: .set MULD_OP_CODE,0xe7
270: .set DIVF_OP_CODE,0xf6
271: .set DIVD_OP_CODE,0xf7
272: .set SINF_OP_CODE,0x05
273: .set COSF_OP_CODE,0x15
274: .set ATANF_OP_CODE,0x25
275: .set LOGF_OP_CODE,0x35
276: .set SQRTF_OP_CODE,0x45
277: .set EXPF_OP_CODE,0x55
278: .set MULL2_OP_CODE,0x4c
279: .set MULL3_OP_CODE,0x5c
280:
281:
282:
283: # Addressing test constants - These must agree with "fpp_defs.h"
284:
285: .set ADR_ABSOLUTE,1
286: .set ADR_LITERAL,2
287: .set ADR_IM_B,3
288: .set ADR_IM_W,4
289: .set ADR_IM_L,5
290: .set ADR_B_DSP,6
291: .set ADR_W_DSP,7
292: .set ADR_L_DSP,8
293: .set ADR_B_DSP_DEF,9
294: .set ADR_W_DSP_DEF,10
295: .set ADR_L_DSP_DEF,11
296: .set ADR_REG,12
297: .set ADR_REG_DEF,13
298: .set ADR_FP_DEF,14
299: .set ADR_SP_DEF,15
300: .set ADR_PUSH,16
301: .set ADR_POP,17
302: .set ADR_POP_DEF,18
303: .set ADR_REG_B,19
304: .set ADR_REG_W,20
305: .set ADR_REG_L,21
306: .set ADR_REG_B_DEF,22
307: .set ADR_REG_W_DEF,23
308: .set ADR_REG_L_DEF,24
309: .set ADR_I_FP_DEF,25
310: .set ADR_I_L,26
311:
312:
313: #*************************************************************************
314:
315: # Stuff for the Demand Paging , Events, & Addressing Tests
316:
317: #************************************************************************/
318: .set SGL,1
319: .set DBL,2
320: .set ENABLE_EVENTS,0x60
321: .set NONE,0
322: .set LOAD,1
323: .set STORE,2
324:
325: .set NO_EVT_HLT,1
326: .set EVT_MSK_HLT,2
327: .set BAD_PSL_HLT,3
328: .set PUSH_CNT_HLT,4
329: .set PUSH_PSL_HLT,5
330: .set PUSH_PC_HLT,6
331: .set BAD_REG_HLT,7
332: .set BAD_ACC_HLT,8
333:
334:
335: # set DMP_PG_0 to the 1st empty page
336:
337: .set DMP_PG_0,0x36000
338: .set DMP_PG_1,DMP_PG_0+0x400
339: .set DMP_PG_2,DMP_PG_1+0x400
340: .set DMP_PG_3,DMP_PG_2+0x400
341: .set DMP_PG_4,DMP_PG_3+0x400
342: .set DMP_PG_5,DMP_PG_4+0x400
343: .set DMP_PG_6,DMP_PG_5+0x400
344: .set DMP_PG_7,DMP_PG_6+0x400
345: .set DMP_PG_8,DMP_PG_7+0x400
346: .set DMP_PG_9,DMP_PG_8+0x400
347: .set DMP_PG_10,DMP_PG_9+0x400
348: .set DMP_PG_11,DMP_PG_10+0x400
349: .set DMP_PG_12,DMP_PG_11+0x400
350: .set DMP_PG_13,DMP_PG_12+0x400
351:
352:
353: # test code space for the address / demand page tests
354:
355: .set START_OF_CODE,DMP_PG_1-20
356: .set CODE_BUF_SIZE,40
357: .set END_OF_CODE,START_OF_CODE+CODE_BUF_SIZE
358:
359:
360: # data locations used by the event and demand page tests
361:
362: .set _dmp_byte_op_1,DMP_PG_1+0x30
363: .set _dmp_byte_op_2,DMP_PG_1+0x50
364: .set _dmp_byte_op_3,DMP_PG_1+0x70
365: .set _dmp_op_1,DMP_PG_3-4
366: .set _dmp_op_1_ptr,DMP_PG_4+0x30
367: .set _dmp_op_2_ptr,DMP_PG_5+0x30
368: .set _dmp_op_2,DMP_PG_7-4
369: .set _dmp_op_3,DMP_PG_8
370: .set _dmp_op_3_ptr,DMP_PG_9+0x30
371: .set _dmp_op_4,DMP_PG_10
372: .set _dmp_op_5,DMP_PG_11
373: .set _sp_minus,DMP_PG_13-4
374: .set _sp_page,DMP_PG_13
375: .set _sp_plus,DMP_PG_13+4
376:
377:
378:
379: # INIT.X for the Demand Pageing Tests
380:
381: # This file is a diagnostic version of locore.s.
382: # It contains the following:
383: # *system data area = scb, dump buffer, interrupt stack,
384: # *system page table,user page tables,pcbs,iomap, & io buffers.
385: #
386: # *system code = interrupt vectors, initialization of system data,
387: # *memory size calculation,initialization of SPT, zeroing of
388: # *unused memory, & loading of SBR & SLR.
389: # *
390: # *at the end of this code, you are ready to go to virtual mode.
391: # * --- GOOD LUCK!
392:
393: ##########################################################################
394:
395: # 6-Mar-85 : changed to user mode execution
396: # 11-Mar-85 : moved mode changeing from here to RUN_CODE
397: # 17-Jul-85 : added "mtpr" test for fpp/no-fpp wcs
398: ##########################################################################
399:
400:
401:
402:
403: # 1 "./prvreg.h"
404:
405:
406:
407:
408:
409:
410:
411: .set SBR,0
412: .set SLR,1
413: .set P0BR,2
414: .set P0LR,3
415: .set P1BR,4
416: .set P1LR,5
417: .set P2BR,6
418: .set P2LR,7
419: .set IPL,8
420: .set MME,9
421: .set TBIA,10
422:
423: .set TBIS,11
424:
425: .set DCK,12
426: .set CCK,13
427:
428:
429: .set PCBB,14
430: .set ISP,15
431: .set SIRR,16
432: .set SISR,17
433: .set SCBB,18
434: .set KSP,19
435: .set USP,20
436: .set DCB,21
437: .set PACC,23
438:
439: .set P1DC,24
440: .set PADC,25
441:
442: .set HISR,26
443: .set DCR,27
444: .set PDCS,28
445: # 402 "temp$.s"
446:
447:
448:
449: # 1 "./psl.h"
450:
451:
452:
453:
454:
455:
456:
457:
458:
459:
460:
461:
462:
463:
464:
465:
466:
467:
468:
469:
470:
471:
472:
473:
474:
475: # 405 "temp$.s"
476:
477:
478:
479: # 1 "./pte.h"
480:
481:
482:
483:
484:
485:
486:
487:
488:
489:
490:
491:
492:
493:
494:
495:
496:
497:
498:
499:
500:
501:
502:
503:
504:
505:
506:
507:
508:
509: # 408 "temp$.s"
510:
511:
512:
513: # 1 "./pcboffset.h"
514:
515:
516:
517:
518:
519: .set PCB_KSP, 0
520: .set PCB_USP, 4
521: .set PCB_R0, 8
522: .set PCB_R1, 12
523: .set PCB_R2, 16
524: .set PCB_R3, 20
525: .set PCB_R4, 24
526: .set PCB_R5, 28
527: .set PCB_R6, 32
528: .set PCB_R7, 36
529: .set PCB_R8, 40
530: .set PCB_R9, 44
531: .set PCB_R10, 48
532: .set PCB_R11, 52
533: .set PCB_R12, 56
534: .set PCB_R13, 60
535: .set PCB_PC, 64
536: .set PCB_PSL, 68
537: .set PCB_P0BR, 72
538: .set PCB_P0LR, 76
539: .set PCB_P1BR, 80
540: .set PCB_P1LR, 84
541: .set PCB_P2BR, 88
542: .set PCB_P2LR, 92
543:
544:
545:
546: .set PCB_STAT, 96
547:
548:
549: # 411 "temp$.s"
550:
551:
552:
553: # 1 "./const.h"
554:
555:
556:
557:
558:
559:
560:
561:
562:
563:
564:
565:
566:
567:
568:
569:
570:
571:
572:
573:
574:
575:
576:
577:
578:
579:
580:
581:
582:
583:
584:
585:
586:
587:
588:
589:
590:
591:
592:
593:
594:
595:
596:
597:
598:
599:
600:
601:
602:
603:
604: # 414 "temp$.s"
605:
606:
607:
608: # 1 "./scboffset.h"
609:
610:
611:
612:
613: .set PFVEC,4
614: .set CLOCKVEC,28
615: .set CRVEC,40
616: .set CXVEC,44
617: .set SIVEC1,120
618:
619:
620: .set BEVEC,128
621: .set SYSVEC,172
622: .set PINSTVEC,176
623: .set ROVEC,180
624: .set RAVEC,184
625: .set PROTVEC,188
626:
627: .set TRANS,0x30
628: .set TRANSVEC,192
629:
630: .set KSPVEC,196
631: .set TRACEVEC,200
632: .set BPTVEC,204
633: .set ARITHVEC,208
634: .set ALIGNVEC,212
635: .set FPMVEC,220
636: .set IO14VEC,256
637: .set IO15VEC,320
638: .set IO16VEC,384
639: .set IO17VEC,448
640:
641: # 417 "temp$.s"
642:
643:
644: # 1 "./sptoffset.h"
645:
646:
647:
648:
649:
650:
651:
652:
653: .set SCBPTE,8
654: .set BUFPTE,12
655: .set ISPTE,16
656: .set IS1PTE,20
657: .set SPTPTE,20
658: .set SPT1PTE,20
659: .set IOMAPPTE,24
660: .set PCBPTE,28
661: .set U0P0PTE,32
662: .set U0P1PTE,36
663: .set U0P2PTE,40
664: .set U1P0PTE,44
665: .set U1P1PTE,48
666: .set U1P2PTE,52
667: .set U2P0PTE,56
668: .set U2P1PTE,60
669: .set U2P2PTE,64
670: .set U3P0PTE,68
671: .set U3P1PTE,72
672: .set U3P2PTE,76
673: .set U4P0PTE,80
674: .set U4P1PTE,84
675: .set U4P2PTE,88
676: .set U5P0PTE,92
677: .set U5P1PTE,96
678: .set U5P2PTE,100
679: .set U6P0PTE,104
680: .set U6P1PTE,108
681: .set U6P2PTE,112
682: .set U7P0PTE,116
683: .set U7P1PTE,120
684: .set U7P2PTE,124
685: .set IOB0PTE,128
686: .set IOB1PTE,132
687: .set IOB2PTE,136
688: .set IOB3PTE,140
689: .set IOB4PTE,144
690: .set IOB5PTE,148
691: .set IOB6PTE,152
692: .set IOB7PTE,156
693:
694:
695: # 419 "temp$.s"
696:
697:
698:
699: # 1 "./trap.h"
700:
701:
702:
703:
704:
705:
706:
707:
708:
709:
710:
711:
712:
713:
714:
715:
716: # 422 "temp$.s"
717:
718:
719:
720:
721:
722: .set HIGH,0x1f
723: .set MCKVEC,4
724: .set NISP,2
725: .set DONE,255
726: .set TTRAP,0x32
727: .set PRIVS,0x2c
728:
729: .text
730:
731:
732:
733: # 1 "./pstorage.s"
734: #
735:
736:
737:
738:
739:
740:
741:
742:
743:
744:
745:
746:
747:
748:
749:
750:
751:
752:
753: _pstore:
754: .globl _pstore
755: .space 1024
756:
757: _pstore1:
758: .globl _pstore1
759:
760: _pcbb: .space 4
761: .globl _isp
762: _isp: .space 4
763: _sirr: .space 4
764: .globl _sisr
765: _sisr: .space 4
766:
767: .space 4
768: .space 4
769: .space 4
770:
771: _cpmdcb: .space 4
772: _cpfdcb: .space 4
773: _cpcdcb: .space 4
774: _cpidcb: .space 4
775: _cpstat: .space 4
776: _cpctl: .space 4
777:
778: .globl _hisr
779: _hisr: .space 4
780: _dcr: .space 4
781:
782: .space 4*48
783:
784: _pstemp:
785: .globl _pstemp
786:
787: _tr0: .space 16
788:
789: _tpc: .space 4
790: _tpsl: .space 4
791: _tsp: .space 4
792: _tksp: .space 4
793: _tusp: .space 4
794: _tcck: .space 4
795: _tdck: .space 4
796: _ttbk: .space 4
797: _tsbr: .space 4
798: _tslr: .space 4
799: _tp0br: .space 4
800: _tp0lr: .space 4
801: _tp1br: .space 4
802: _tp1lr: .space 4
803: _tp2br: .space 4
804: _tp2lr: .space 4
805: _tipl: .space 4
806: _tmme: .space 4
807: _ttbia: .space 4
808: _ttbis: .space 4
809:
810:
811: _tpcbb: .space 4
812: _tisp: .space 4
813: _tsirr: .space 4
814: _tsisr: .space 4
815: _tscbb: .space 4
816: _tp1cc: .space 4
817:
818: _tpacc: .space 4
819:
820: _tp1dc: .space 4
821: _tpadc: .space 4
822: _tcpmdcb:
823: .space 4
824: _tcpfdcb:
825: .space 4
826: _tcpcdcb:
827: .space 4
828: _tcpidcb:
829: .space 4
830: _tcpstat:
831: .space 4
832: _tcpctl:
833: .space 4
834:
835: _probflag:
836: .space 4
837: _inexcflg:
838: .space 4
839:
840: .space 4*10
841: _psend: .globl _psend
842: .set MM,(_psend - _pstore1)
843: .space 1024 - MM
844:
845:
846: #
847:
848:
849:
850:
851:
852: .set PCBB,0x400 #process control block base
853:
854: .globl INTSP
855: .set INTSP,0x404 #Interrupt stack pointer
856: .set SIRR,0x408 #Software interrupt request
857:
858: .globl SSR
859: .set SSR,0x40C #Software interrupt summary
860:
861: .globl HSR
862: .set HSR,0x410 #Hardware interrupt summary
863:
864: .set SBB,0x414 #Pointer to system control block base
865: .set TBCR,0x418 #Current value of hardware TBCR
866: .set CPMDCB,0x420 #pointer to CP master DCB
867: .set CPCTL,0x424 #CPU control word
868: .set CPREQ,0x428 #CPU request
869: .set CPRUN,0x42C #CPU run status (8 = step mode)
870: .set CPRSW,0x430 #CP interrupt request word
871: .set PSL,0x434 #Software Process Status Longword
872: .set TVAPR,0x5E8 #saved vapr register
873: .set TRA,0x5EC #
874: .set TLSP,0x5F0 #
875: .set TIAR,0x5F4 #
876: .set TLIA,0x5F8 #
877: .set TQ,0x5FC #
878: .set TR0,0x600 #decellerated processor registers
879: .set TR1,0x604 #decellerated processor registers
880: .set TR2,0x608 #decellerated processor registers
881: .set TR3,0x60C #decellerated processor registers
882: .set TR4,0x610 #decellerated processor registers
883: .set TR5,0x614 #decellerated processor registers
884: .set TR6,0x618 #decellerated processor registers
885: .set TR7,0x61C #decellerated processor registers
886: .set TR8,0x620 #decellerated processor registers
887: .set TR9,0x624 #decellerated processor registers
888: .set TR10,0x628 #decellerated processor registers
889: .set TR11,0x62C #decellerated processor registers
890: .set TR12,0x630 #decellerated processor registers
891: .set TR13,0x634 #decellerated processor registers
892: .set TR14,0x638 #decellerated processor registers
893: .set TR15,0x63C #decellerated processor registers
894: .set TPC,0x640 #decellerated program counter
895: .set TPSL,0x644 #decellerated process status longword
896: .set TSP,0x648 #decellerated stack pointer
897: .set TKSP,0x64C #decellerated kernel stack pointer
898: .set TUSP,0x650 #decellerated user stack pointer
899: .globl TCCK
900: .set TCCK,0x654 #decellerated Code cache key
901: .globl TDCK
902: .set TDCK,0x658 #decellerated data cache key
903: .set TTBK,0x65C #decellerated translation buffer key
904: .set TSBR,0x660 #decellerated System Base Register
905: .set TSLR,0x664 #decellerated System length register
906: .set TP0BR,0x668 #decellerated P0 base register
907: .set TP0LR,0x66C #decellerated P0 length register
908: .set TP1BR,0x670 #decellerated P1 base register
909: .set TP1LR,0x674 #decellerated P1 length register
910: .set TP2BR,0x678 #decellerated P2 base register
911: .set TP2LR,0x67C #decellerated P1 length register
912: .set TIPL,0x680 #decellerated Interrupt priority level
913: .set TMME,0x684 #decellerated Memory management enable
914: .set TTBIA,0x68C #decellerated translation buffer invalid
915: .set TTBIS,0x68C #decellerated transl buffer invalid single
916: .set TPCBB,0x690 #decellerated Process control block base
917: .set TISP,0x694 #decellerated Interrupt stack pointer
918: .set TSIRR,0x698 #decellerated Software interrupt request
919: .set TSISR,0x69C #decellerated Software interrupt summary
920: .set TSCBB,0x6A0 #decellerated System control block base
921: .set TP1CC,0x6A4 #decellerated
922: .set TPACC,0x6A8 #decellerated
923: .set TP1DC,0x6AC #decellerated
924: .set TPADC,0x6B0 #decellerated
925: .set TCPMDCB,0x6B4 #decellerated address of master DCB
926: .set PROBFLG,0x6B8 #decellerated
927: .set INEXCFLG,0x6BC #decellerated
928: .set PCTYPFLG,0x6C0 #
929: .set NOOFPARS,0x6C4 #
930: .set STKPAR1,0x6C8 #
931: .set STKPAR2,0x6CC #
932: .set JMPVEC,0x6D0 #
933: .set PSEND,0x7FC #
934: # 438 "temp$.s"
935:
936: .globl _Entry
937: _Entry:
938: jmp start
939: .space (1024-6)
940:
941:
942:
943:
944:
945:
946:
947: .set NLWU,35
948:
949:
950:
951: .globl _Codek
952: _Codek: .long 0
953:
954: .globl _restart
955: _restart:
956: .space 4
957:
958:
959:
960: .globl _maxmem
961: _maxmem:
962: .space 4
963:
964: .globl _maxpages
965: _maxpages:
966: .space 4
967:
968: .globl _lastadd
969: _lastadd:
970: .space 4
971:
972: .globl _unused
973: _unused:
974: .space 4
975:
976: .globl _ctlblk
977: _ctlblk:
978: .long 0
979:
980: .globl _savvec0
981: _savvec0:
982: .space 4
983:
984: .globl _savvec1
985: _savvec1:
986: .space 4
987:
988: .globl _savvec2
989: _savvec2:
990: .space 4
991:
992: .globl _savvec3
993: _savvec3:
994: .space 4
995:
996: .globl _savvec4
997: _savvec4:
998: .space 4
999:
1000: .globl _savvec5
1001: _savvec5:
1002: .space 4
1003: .globl _savvec6
1004: _savvec6:
1005: .space 4
1006: .globl _savvec7
1007: _savvec7:
1008: .space 4
1009:
1010: .globl _savvec8
1011: _savvec8:
1012: .space 4
1013:
1014: .globl _r_no
1015: _r_no:
1016: .long 0
1017: .globl _pt_base
1018: _pt_base:
1019: .long 0
1020: .globl _saved_psl
1021: _saved_psl:
1022: .long 0
1023: .globl _saved_sp
1024: _saved_sp:
1025: .long 0
1026: .globl _saved_fp
1027: _saved_fp:
1028: .long 0
1029: .globl _ret_adr
1030: _ret_adr:
1031: .long 0
1032: .globl _exp_par0
1033: _exp_par0:
1034: .long 0
1035: .globl _exp_par1
1036: _exp_par1:
1037: .long 0
1038: .globl _f_vaddr
1039: _f_vaddr:
1040: .long 0
1041:
1042: .globl _f_ptr
1043: _f_ptr:
1044: .long 0
1045: .globl _df_cnt
1046: _df_cnt:
1047: .long 0
1048:
1049: .globl _if_cnt
1050: _if_cnt:
1051: .long 0
1052:
1053: .globl _newepc
1054: _newepc:
1055: .long 0
1056:
1057: .globl _errcnt
1058: _errcnt:
1059: .long 0
1060:
1061: .globl _clk_cnt
1062: _clk_cnt:
1063: .long 0
1064:
1065: .globl _ttcnt
1066: _ttcnt:
1067: .long 0
1068: .globl _trcnt
1069: _trcnt:
1070: .long 0
1071:
1072: .globl _Ufpte
1073: _Ufpte: .long 0
1074: .globl _Ulpte
1075: _Ulpte: .long 0
1076:
1077: .globl _dbuf
1078: _dbuf:
1079: .space 1024 - (NLWU *4)
1080: edbuf:
1081:
1082:
1083: .globl _intstack
1084: _intstack:
1085: .space NISP* 1024
1086: eintstack:
1087:
1088:
1089: .set SYSPTSIZE,512
1090:
1091:
1092:
1093:
1094: .align 2
1095: .globl _Sysmap
1096: _Sysmap:
1097: .space SYSPTSIZE*4
1098: eSysmap:
1099: .globl _Syssize
1100: .set _Syssize,(eSysmap-_Sysmap)/4
1101:
1102: .globl _iomap
1103: _iomap: .space 1024
1104: .globl _eiomap
1105: _eiomap:
1106:
1107: .globl _pcb0
1108: _pcb0: .space 128
1109: .globl _pcb1
1110: _pcb1: .space 128
1111: .globl _pcb2
1112: _pcb2: .space 128
1113: .globl _pcb3
1114: _pcb3: .space 128
1115: .globl _pcb4
1116: _pcb4: .space 128
1117: .globl _pcb5
1118: _pcb5: .space 128
1119: .globl _pcb6
1120: _pcb6: .space 128
1121: .globl _pcb7
1122: _pcb7: .space 128
1123:
1124:
1125:
1126:
1127:
1128: .align 2
1129: .globl _u0p0pt
1130: _u0p0pt:
1131: .space 1024
1132: .globl _u0p1pt
1133: _u0p1pt:
1134: .space 1024
1135: .globl _u0p2pt
1136: _u0p2pt:
1137: .space 1020
1138: eu0p2pt:
1139: .space 4
1140:
1141:
1142:
1143:
1144:
1145: .align 2
1146: .globl _u1p0pt
1147: _u1p0pt:
1148: .space 1024
1149: .globl _u1p1pt
1150: _u1p1pt:
1151: .space 1024
1152: .globl _u1p2pt
1153: _u1p2pt:
1154: .space 1020
1155: eu1p2pt:
1156: .space 4
1157:
1158:
1159:
1160:
1161:
1162:
1163: .align 2
1164: .globl _u2p0pt
1165: _u2p0pt:
1166: .space 1024
1167: .globl _u2p1pt
1168: _u2p1pt:
1169: .space 1024
1170: .globl _u2p2pt
1171: _u2p2pt:
1172: .space 1020
1173: eu2p2pt:
1174: .space 4
1175:
1176:
1177:
1178:
1179:
1180:
1181: .align 2
1182: .globl _u3p0pt
1183: _u3p0pt:
1184: .space 1024
1185: .globl _u3p1pt
1186: _u3p1pt:
1187: .space 1024
1188: .globl _u3p2pt
1189: _u3p2pt:
1190: .space 1020
1191: eu3p2pt:
1192: .space 4
1193:
1194:
1195:
1196:
1197:
1198: .globl _u4p0pt
1199: _u4p0pt:
1200: .space (9* 1024) - 4
1201: eu6p2pt:
1202: .space 4
1203:
1204:
1205:
1206:
1207:
1208:
1209: .align 2
1210: .globl _Kstack
1211: _Kstack:
1212: .space 3* 1024
1213: .globl ekstack
1214: ekstack:
1215:
1216:
1217: .globl _iob0
1218: _iob0: .space 1024
1219: .globl _iob1
1220: _iob1: .space 1024
1221: .globl _iob2
1222: _iob2: .space 1024
1223: .globl _iob3
1224: _iob3: .space 1024
1225: .globl _iob4
1226: _iob4: .space 1024
1227: .globl _iob5
1228: _iob5: .space 1024
1229: .globl _iob6
1230: _iob6: .space 1024
1231: esysdata:
1232:
1233:
1234:
1235: # 1 "./scblock.s"
1236:
1237: #
1238:
1239:
1240: .align 2
1241: .globl _scb
1242: _scb:
1243:
1244:
1245:
1246:
1247:
1248:
1249:
1250: .long _Xunknown; .long _Xpowerfail;
1251: .long _Xunknown; .long _Xunknown;
1252: .long _Xunknown; .long _Xunknown;
1253: .long _Xunknown; .long _Xhardclock;
1254: .long _Xunknown; .long _Xunknown;
1255: .long _Xcnrint; .long _Xcnxint;
1256: .long _Xunknown; .long _Xunknown;
1257: .long _Xunknown; .long _Xunknown;
1258: .long _Xs15; .long _Xs14;
1259: .long _Xs13; .long _Xs12;
1260: .long _Xs11; .long _Xs10;
1261: .long _Xs9; .long _Xs8;
1262: .long _Xs7; .long _Xs6;
1263: .long _Xs5; .long _Xs4;
1264: .long _Xs3; .long _Xs2;
1265: .long _Xs1; .long _Xunknown;
1266: .long _Xbuserror; .long _Xunknown;
1267: .long _Xunknown; .long _Xunknown;
1268: .long _Xunknown; .long _Xunknown;
1269: .long _Xunknown; .long _Xunknown;
1270: .long _Xunknown; .long _Xunknown;
1271: .long _Xunknown; .long _Xkcall;
1272: .long _Xprvinflt; .long _Xresopflt;
1273: .long _Xresadflt; .long _Xprotflt;
1274: .long _Xtransflt; .long _Xkspnotval;
1275: .long _Xtracep; .long _Xbptflt;
1276: .long _Xarithtrap; .long _Xalignflt;
1277: .long _Xunknown; .long _Xfpp_emulate;
1278: .long _Xunknown; .long _Xunknown;
1279: .long _Xunknown; .long _Xunknown;
1280: .long _Xunknown; .long _Xunknown;
1281: .long _Xunknown; .long _Xunknown;
1282: .long _Xiovec14; .long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;
1283: .long _Xiovec15; .long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;
1284: .long _Xiovec16; .long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;
1285: .long _Xiovec17; .long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;.long _Xunknown;
1286:
1287: .space 512
1288:
1289:
1290: # 738 "temp$.s"
1291:
1292:
1293:
1294:
1295: # 1 "./evthandlers.s"
1296:
1297:
1298:
1299:
1300:
1301:
1302:
1303:
1304:
1305:
1306:
1307:
1308:
1309:
1310:
1311:
1312:
1313:
1314:
1315:
1316:
1317:
1318:
1319:
1320:
1321:
1322:
1323:
1324:
1325:
1326:
1327:
1328:
1329:
1330:
1331:
1332:
1333:
1334: .align 2 .globl _Xunknown _Xunknown:
1335: pushl $0
1336: callf $8,_XTrap
1337: halt
1338:
1339:
1340:
1341:
1342:
1343:
1344:
1345:
1346:
1347:
1348:
1349:
1350: .align 2 .globl _Xpowerfail _Xpowerfail:
1351: pushl $1
1352: callf $8,_XTrap
1353: halt
1354:
1355:
1356:
1357:
1358:
1359:
1360: .align 2 .globl _Xhardclock _Xhardclock:
1361: incl _clock_event
1362: rei
1363:
1364:
1365:
1366:
1367:
1368: .align 2 .globl _Xcnrint _Xcnrint:
1369: pushl $0xa
1370: callf $8,_XTrap
1371: halt
1372:
1373:
1374:
1375:
1376: .align 2 .globl _Xcnxint _Xcnxint:
1377: rei
1378:
1379:
1380:
1381:
1382: .align 2 .globl _Xs15 _Xs15:
1383: pushl $0x10
1384: callf $8,_XTrap
1385: halt
1386:
1387:
1388:
1389:
1390: .align 2 .globl _Xs14 _Xs14:
1391: pushl $0x11
1392: callf $8,_XTrap
1393: halt
1394:
1395:
1396:
1397:
1398: .align 2 .globl _Xs13 _Xs13:
1399: pushl $0x12
1400: callf $8,_XTrap
1401: halt
1402:
1403:
1404:
1405:
1406: .align 2 .globl _Xs12 _Xs12:
1407: pushl $0x13
1408: callf $8,_XTrap
1409: halt
1410:
1411:
1412:
1413:
1414: .align 2 .globl _Xs11 _Xs11:
1415: pushl $0x14
1416: callf $8,_XTrap
1417: halt
1418:
1419:
1420:
1421:
1422: .align 2 .globl _Xs10 _Xs10:
1423: pushl $0x15
1424: callf $8,_XTrap
1425: halt
1426:
1427:
1428:
1429:
1430: .align 2 .globl _Xs9 _Xs9:
1431: pushl $0x16
1432: callf $8,_XTrap
1433: halt
1434:
1435:
1436:
1437:
1438: .align 2 .globl _Xs8 _Xs8:
1439: pushl $0x17
1440: callf $8,_XTrap
1441: halt
1442:
1443:
1444:
1445:
1446: .align 2 .globl _Xs7 _Xs7:
1447: pushl $0x18
1448: callf $8,_XTrap
1449: halt
1450:
1451:
1452:
1453:
1454: .align 2 .globl _Xs6 _Xs6:
1455: pushl $0x19
1456: callf $8,_XTrap
1457: halt
1458:
1459:
1460:
1461:
1462: .align 2 .globl _Xs5 _Xs5:
1463: pushl $0x1a
1464: callf $8,_XTrap
1465: halt
1466:
1467:
1468:
1469:
1470: .align 2 .globl _Xs4 _Xs4:
1471: pushl $0x1b
1472: callf $8,_XTrap
1473: halt
1474:
1475:
1476:
1477:
1478: .align 2 .globl _Xs3 _Xs3:
1479: pushl $0x1c
1480: callf $8,_XTrap
1481: halt
1482:
1483:
1484:
1485:
1486: .align 2 .globl _Xs2 _Xs2:
1487: pushl $0x1d
1488: callf $8,_XTrap
1489: halt
1490:
1491:
1492:
1493:
1494: .align 2 .globl _Xs1 _Xs1:
1495: pushl $0x1e
1496: callf $8,_XTrap
1497: halt
1498:
1499:
1500:
1501:
1502:
1503: .align 2 .globl _Xiovec14 _Xiovec14:
1504: halt
1505: .align 2 .globl _Xiovec15 _Xiovec15:
1506: halt
1507: .align 2 .globl _Xiovec16 _Xiovec16:
1508: halt
1509: .align 2 .globl _Xiovec17 _Xiovec17:
1510: halt
1511:
1512:
1513:
1514:
1515:
1516:
1517:
1518:
1519:
1520:
1521:
1522:
1523:
1524:
1525:
1526:
1527:
1528:
1529: .align 2 .globl _Xbuserror _Xbuserror:
1530: pushl $0x20
1531: callf $8,_XTrap
1532: halt
1533:
1534:
1535:
1536:
1537:
1538:
1539:
1540:
1541:
1542:
1543:
1544: .align 2 .globl _Xkspnotval _Xkspnotval:
1545: pushl $0x31
1546: callf $8,_XTrap
1547: halt
1548:
1549:
1550:
1551:
1552:
1553: .align 2 .globl _Xprvinflt _Xprvinflt:
1554: movpsl _psl_val
1555: mtpr $0x1f,$IPL
1556: bitl $PSL_DBL,_psl_val
1557: beql 1f
1558: std _post_evt_acc
1559: brb 2f
1560: 1: stf _post_evt_acc
1561: 2: storer $0x1fff,_store_regs
1562: moval (r13),_post_event_fp
1563: moval (r14),_post_event_sp
1564: pushl $0x2c
1565: callf $8,_XTrap
1566: halt
1567:
1568:
1569:
1570:
1571:
1572:
1573: .align 2 .globl _Xresopflt _Xresopflt:
1574: mtpr $0x1f,$IPL
1575: movpsl _psl_val
1576: bitl $PSL_DBL,_psl_val
1577: beql 1f
1578: std _post_evt_acc
1579: brw 2f
1580: 1: stf _post_evt_acc
1581: clrl _post_evt_acc+4
1582: 2:
1583: storer $0x1fff,_store_regs
1584: moval (r13),_post_event_fp
1585: moval (r14),_post_event_sp
1586: pushl $0x2d
1587: callf $8,_XTrap
1588: halt
1589:
1590:
1591: .align 2 .globl _Xresadflt _Xresadflt:
1592: movpsl _psl_val
1593: mtpr $0x1f,$IPL
1594: bitl $PSL_DBL,_psl_val
1595: beql 1f
1596: std _post_evt_acc
1597: brb 2f
1598: 1: stf _post_evt_acc
1599: 2: storer $0x1fff,_store_regs
1600: moval (r13),_post_event_fp
1601: moval (r14),_post_event_sp
1602: pushl $0x2e
1603: callf $8,_XTrap
1604: halt
1605:
1606: .align 2 .globl _Xbptflt _Xbptflt:
1607: pushl $0x33
1608: callf $8,_XTrap
1609: halt
1610:
1611: .align 2 .globl _Xtracep _Xtracep:
1612: movpsl _psl_val
1613: mtpr $0x1f,$IPL
1614: bitl $PSL_DBL,_psl_val
1615: beql 1f
1616: std _post_evt_acc
1617: brb 2f
1618: 1: stf _post_evt_acc
1619: 2: storer $0x1fff,_store_regs
1620: pushl $0x32
1621: callf $8,_XTrap
1622: halt
1623:
1624:
1625:
1626:
1627:
1628:
1629: .align 2 .globl _Xarithtrap _Xarithtrap:
1630: mtpr $0x1f,$IPL
1631: movpsl _psl_val
1632: bitl $PSL_DBL,_psl_val
1633: beql 1f
1634: std _post_evt_acc
1635: brw 2f
1636: 1:
1637: stf _post_evt_acc
1638: clrl _post_evt_acc+4
1639: 2:
1640: storer $0x1fff,_store_regs
1641: moval (r13),_post_event_fp
1642: moval (r14),_post_event_sp
1643: pushl $0x34
1644: callf $8,_XTrap
1645: halt
1646:
1647:
1648: .align 2 .globl _Xprotflt _Xprotflt:
1649: movpsl _psl_val
1650: moval (r14),_post_event_sp
1651: pushl $0x2f
1652: callf $8,_XTrap
1653: halt
1654: .align 2 .globl _Xtransflt _Xtransflt:
1655: pushl $0x30
1656: callf $8,_XTrap
1657: halt
1658: .align 2 .globl _Xalignflt _Xalignflt:
1659: movpsl _psl_val
1660: mtpr $0x1f,$IPL
1661: bitl $PSL_DBL,_psl_val
1662: beql 1f
1663: std _post_evt_acc
1664: brb 2f
1665: 1: stf _post_evt_acc
1666: 2: storer $0x1fff,_store_regs
1667: pushl $0x35
1668: callf $8,_XTrap
1669: halt
1670: .align 2 .globl _Xfpp_emulate _Xfpp_emulate:
1671: movpsl _psl_val
1672: movl _psl_val,_post_event_psl
1673: storer $0x1fff,_store_regs
1674: moval (r13),_post_event_fp
1675: moval (r14),_post_event_sp
1676: movl (sp),_fpm_ms_op
1677: movl 4(sp),_fpm_ls_op
1678: movl 8(sp),_fpm_op_code
1679: movl 12(sp),_fpm_pc
1680: movl 16(sp),_fpm_psl
1681: bitl $PSL_DBL,_psl_val
1682: beql 1f
1683: std _post_evt_acc
1684: brb 2f
1685: 1: stf _post_evt_acc
1686: clrl _post_evt_acc+4
1687: 2:
1688: pushl $0x37
1689: callf $8,_XTrap
1690: halt
1691:
1692: alltraps:
1693: halt
1694:
1695: .align 2 .globl _Xkcall _Xkcall:
1696: pushl $0x2b
1697: callf $8,_XTrap
1698: halt
1699:
1700:
1701: # 742 "temp$.s"
1702:
1703:
1704:
1705:
1706:
1707: # *INITIALIZATION CODE
1708: # *
1709: # * MME off; mode = k; IPL = 31; IS = 1
1710: # *
1711:
1712:
1713: .globl start
1714: start:
1715: mtpr $0,$MME
1716: movl r0,_run_list
1717: movl r1,_OPTIONS
1718: clrl _nonstop
1719: movl r2,_count
1720: bneq 1f
1721: movl $1,_count
1722: 1: bgeq 1f
1723: movl $1,_nonstop
1724: 1:
1725: mtpr $0x400,$DCR
1726: tstl r1
1727: bneq 1f
1728: movl $1,_no_fpp_wcs
1729: 1:
1730: movab _scb,r0
1731: andl2 $0x3ffffc00,r0
1732: mtpr r0,$SCBB
1733: mtpr $0x1f,$IPL
1734:
1735: andl3 $4,r11,_ss1
1736:
1737:
1738: # clear the option flags
1739:
1740: clrl _halt_flg
1741: clrl _loop_on_err
1742: movl $1,_prt_error
1743: movl $1,_prt_hdrs
1744: movl $1,_en_data_cache
1745: movl $1,_user_mode
1746: clrl _exp_event
1747: clrl _event_return
1748: clrl _unexp_event_ret
1749:
1750:
1751: # set the option flags as needed
1752:
1753: bitl $1,_OPTIONS
1754: beql 1f
1755: movl $1,_halt_flg
1756: 1:
1757: bitl $2,_OPTIONS
1758: beql 1f
1759: movl $1,_loop_on_err
1760: 1:
1761: bitl $4,_OPTIONS
1762: beql 1f
1763: clrl _prt_error
1764: 1:
1765: bitl $8,_OPTIONS
1766: beql 1f
1767: clrl _prt_hdrs
1768: 1:
1769: bitl $16,_OPTIONS
1770: beql 1f
1771: clrl _en_data_cache
1772: 1:
1773: bitl $32,_OPTIONS
1774: beql 1f
1775: clrl _user_mode
1776: 1:
1777: movpsl r1
1778: andl2 $0xffffff00,r1
1779: cmpl r1,$0x041f0000
1780: beql 1f
1781: 2: movl $1,r0
1782: movl $0x041f0000,r2
1783: halt
1784: 1:
1785: movl $_intstack+NISP* 1024,r0
1786: andl2 $0x3fffffff,r0
1787: mtpr r0,$ISP
1788: movl r0,sp
1789: movab (sp),fp
1790:
1791: # Clear system data area all the way upto system code
1792: # this includes dump buffer,interrupt stack,spt,iomap,pcbs,user
1793: # page tables, & io buffer area.
1794:
1795: 3:
1796: movab esysdata,r7
1797: movab _restart,r6
1798: 1: clrl (r6)
1799: addl2 $4,r6; cmpl r6,r7; bleq 1b;
1800:
1801: # Initialize System Page Table
1802:
1803: 5:
1804: clrl r2
1805: movab esysdata,r1
1806: andl2 $0x3fffffff,r1
1807: shar $ 10 ,r1,r1
1808:
1809: 1:
1810: orl3 $ 0x80000000| 0x60000000,r2,_Sysmap[r2]
1811: aoblss r1,r2,1b
1812:
1813:
1814: # Map system text area 1 to 1, Kernel read/write.
1815: # For this to work, the label _etext must exist at the end
1816: # of system code; Add in 4 more pages for data area used in C
1817:
1818: movab _Esys,r1
1819: andl2 $0x3fffffff,r1
1820: shar $ 10 ,r1,r1
1821: 1:
1822: orl3 $ 0x80000000| 0x60000000,r2,_Sysmap[r2]
1823: aobleq r1,r2,1b
1824:
1825: # Map from here to last page used by user :
1826: # invalid, User access, & virtual = physical
1827:
1828: movl r2,_unused
1829: movl r2,_Ufpte
1830: movl $0x80000,r1
1831: shar $ 10 ,r1,r1
1832: movl r1,_Ulpte
1833:
1834: 1:
1835: orl3 $ 0x80000000| 0x78000000,r2,_Sysmap[r2]
1836: aoblss r1,r2,1b
1837:
1838:
1839: # Initialize SBR, SLR
1840:
1841: sysrdy:
1842: mtpr $_Sysmap,$SBR
1843: mtpr $_Syssize,$SLR
1844: mtpr $64,$DCR
1845:
1846: # GO TO VIRTUAL MODE
1847: # Double map the kernel into user addresses :
1848: # This will enable system to go to virtual mode the 1st time !!
1849:
1850:
1851: orl3 $0xc0000000,$_Sysmap,r0
1852: mtpr r0,$P0BR
1853: mtpr $_Syssize,$P0LR
1854: mtpr $1,$PADC
1855: mtpr $1,$TBIA
1856:
1857: mfpr $SCBB,r0
1858: movab _Trans,TRANSVEC(r0)
1859: movab _Prvis,PRIVSVEC(r0)
1860: moval _FPM_handler,FPMVEC(r0)
1861: mtpr $_pcb0,$0xe
1862:
1863: movab _pcb0,r0
1864: movab ekstack,PCB_KSP(r0)
1865: movab eustack,PCB_USP(r0)
1866: mfpr $P0BR,PCB_P0BR(r0)
1867: mfpr $P0LR,PCB_P0LR(r0)
1868: movl $0x001f000,PCB_PSL(r0)
1869: ldpctx
1870:
1871: mtpr $1,$PACC
1872: movl $1,_Codek
1873: mtpr _Codek,$CCK
1874:
1875: callf $4,_monitor
1876:
1877:
1878:
1879: # 1 "./fault_handlers.s"
1880:
1881:
1882:
1883:
1884:
1885:
1886:
1887:
1888:
1889:
1890:
1891:
1892:
1893:
1894:
1895:
1896:
1897:
1898:
1899:
1900:
1901:
1902:
1903:
1904:
1905:
1906:
1907:
1908:
1909:
1910:
1911:
1912:
1913:
1914:
1915:
1916:
1917:
1918:
1919: .align 2
1920: .globl _Trans
1921: _Trans:
1922: mtpr $0x1f,$IPL
1923: movl r0,_trans_r0
1924: movl (sp)+,r0
1925: movl (sp)+,_f_vaddr
1926: incl _no_page_faults
1927: tstl _pipe_test
1928: bneq 1f
1929: cmpl (sp),_code_addr
1930: beql 1f
1931: movl r0,_pop_val_1
1932: movl _f_vaddr,_pop_val_2
1933: movl (sp),_pop_val_3
1934: movl (sp)+,_pop_val_3
1935: callf $4,_bad_trans_stack
1936: 1: nop
1937: shar $ 10 ,_f_vaddr,r0
1938: orl2 $0x80000000,_Sysmap[r0]
1939: mtpr _f_vaddr,$TBIS
1940:
1941:
1942:
1943: movl _no_page_faults,r0
1944: cmpl $1,r0
1945: bneq 1f
1946: brb 2f
1947: 1: cmpl $2,r0
1948: bneq 1f
1949: nop
1950: nop
1951: brb 2f
1952: 1: cmpl $3,r0
1953: bneq 1f
1954: nop
1955: nop
1956: brb 2f
1957: 1: cmpl $4,r0
1958: bneq 1f
1959: nop
1960: nop
1961: brb 2f
1962: 1: cmpl $5,r0
1963: bneq 1f
1964: nop
1965: nop
1966: brb 2f
1967: 1: cmpl $6,r0
1968: bneq 1f
1969: nop
1970: nop
1971: brb 2f
1972: 1: cmpl $7,r0
1973: bneq 1f
1974: nop
1975: nop
1976: brb 2f
1977: 1: cmpl $8,r0
1978: bneq 1f
1979: nop
1980: nop
1981: brb 2f
1982: 1: cmpl $9,r0
1983: bneq 1f
1984: nop
1985: nop
1986: brb 2f
1987: nop
1988: nop
1989: 2:
1990:
1991:
1992:
1993: tstl _pipe_test
1994: bneq 1f
1995: tstl _load_type_inst
1996: bneq 1f
1997: tstl _force_loop
1998: bneq 1f
1999: tstl _trans_acc_error
2000: bneq 1f
2001: callf $4,_chk_trans_acc
2002: 1:
2003:
2004:
2005:
2006: tstl _i_cache_hit
2007: bneq 2f
2008: incl _Codek
2009: cmpl _Codek,$255
2010: jlss 1f
2011: movl $1,_Codek
2012: mtpr $1,$PACC
2013: 1:
2014: mtpr _Codek,$CCK
2015: 2:
2016: nop
2017: movl _trans_r0,r0
2018: rei
2019:
2020: .align 2
2021: _trans_r0:
2022: .long 0
2023:
2024:
2025:
2026:
2027:
2028:
2029:
2030:
2031:
2032:
2033:
2034:
2035:
2036:
2037:
2038: .align 2
2039: .globl _Prvis
2040: _Prvis:
2041: mtpr $0x1f,$IPL
2042: movl (sp)+,_act_pc
2043: movl (sp)+,_f_ptr
2044: cmpl _act_pc,$_run_code_mtpr
2045: bneq 1f
2046: pushl _run_code_psl
2047: pushl $_run_code_mtpr
2048: rei
2049: 1:
2050: pushl _f_ptr
2051: pushl _act_pc
2052: pushl $0x2c
2053: callf $8,_XTrap
2054:
2055:
2056:
2057:
2058:
2059:
2060:
2061:
2062:
2063:
2064:
2065:
2066:
2067:
2068:
2069:
2070:
2071:
2072:
2073:
2074:
2075:
2076:
2077:
2078:
2079:
2080:
2081: .align 2
2082: .globl _FPM_handler
2083: _FPM_handler:
2084: movpsl _psl_val
2085: mtpr $0x1f,$IPL
2086: movl _psl_val,_post_event_psl
2087: storer $0x1fff,_store_regs
2088: moval (r13),_post_event_fp
2089: moval (r14),_post_event_sp
2090: movl $1,_fpm_trap_occurred
2091: tstl _emulated_inst
2092: bneq 1f
2093: pushl $FPM_CODE
2094: callf $8,_XTrap
2095: halt
2096: 1:
2097: cmpl _acc_st_size,$DBL
2098: beql 1f
2099: stf _dbl_st_acc
2100: brb 2f
2101: 1: std _dbl_st_acc
2102: 2:
2103: movl (sp)+,_fpm_ms_op
2104: movl (sp)+,_fpm_ls_op
2105: movl (sp)+,_fpm_op_code
2106: movl (sp)+,_fpm_pc
2107: movl (sp)+,_fpm_psl
2108: bitl $PSL_DBL,_psl_val
2109: beql 1f
2110: std _post_evt_acc
2111: brb 2f
2112: 1: stf _post_evt_acc
2113: clrl _post_evt_acc+4
2114: 2:
2115: pushl _run_code_psl
2116: pushl _event_return
2117: rei
2118:
2119: # 919 "temp$.s"
2120:
2121:
2122: #
2123:
2124:
2125:
2126: .globl _Esys
2127: _Esys:
2128: .space 1024
2129:
2130: .globl _Ustack
2131: _Ustack:
2132: .space (2* 1024)-4
2133: .globl eustack
2134: eustack:
2135: .long 0
2136:
2137: .globl U_area
2138: U_area:
2139:
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