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1.1 root 1: #define disp_error error
2:
3: /* constants definition for SBWC instruction */
4: /* */
5: /* */
6:
7: #define SBWC 0x9d /*opcode */
8:
9: asm(".set PSWMASK,0xf");
10:
11: #define MAX_PATTERNS 10
12:
13: extern long scoplp;
14: extern long force_lp;
15:
16: #define DIF1 0x7fffffff /*initial value of dif */
17: #define DIF2 0x7fffffff
18: #define DIF3 0x80000000
19: #define DIF4 0x80000000
20: #define DIF5 0
21: #define DIF6 0
22: #define DIF7 -1
23: #define DIF8 0x80000000
24: #define DIF9 0
25: #define DIF10 0x7fffffff
26:
27: #define SUB1 0x80000002 /*initial values for sub*/
28: #define SUB2 0x80000001
29: #define SUB3 -1
30: #define SUB4 -1
31: #define SUB5 1
32: #define SUB6 -1
33: #define SUB7 1
34: #define SUB8 1
35: #define SUB9 0x80000000
36: #define SUB10 -1
37:
38:
39: #define EXP1 0xfffffffd /*expected result */
40: #define EXP2 0xfffffffd
41: #define EXP3 0x80000000
42: #define EXP4 0x80000001
43: #define EXP5 0xfffffffe
44: #define EXP6 1
45: #define EXP7 0xfffffffe
46: #define EXP8 0x7ffffffe
47: #define EXP9 0x80000000
48: #define EXP10 0x7fffffff
49:
50: #define IPSW1 5 /*initial psw */
51: #define IPSW2 4
52: #define IPSW3 6
53: #define IPSW4 7
54: #define IPSW5 6
55: #define IPSW6 11
56: #define IPSW7 11
57: #define IPSW8 12
58: #define IPSW9 13
59: #define IPSW10 4
60:
61: /* EXPECTED PSW */
62:
63: #define EPSW1 2
64: #define EPSW2 2
65: #define EPSW3 8
66: #define EPSW4 8
67: #define EPSW5 8
68: #define EPSW6 0
69: #define EPSW7 9
70: #define EPSW8 11
71: #define EPSW9 2
72: #define EPSW10 0
73:
74: #define ERROR1 1 /*error definitions */
75: #define ERROR2 2
76: #define ERROR3 3
77:
78:
79: #define EM1 "difference not equal to expected \n"
80: #define EM2 "subtrahend operand altered \n"
81: #define EM3 "psw not equal to expected \n"
82:
83:
84: /* standard definition file */
85: /* for 'C' diagnostic porgrams. */
86: /* */
87: /* */
88: #define HIGH 31
89: #define IPL 8
90: #define PSWMASK 0xf
91: #define T 16
92: #define IV 32
93: #define FU 64
94: #define DV 128
95: #define FLAGS 0x0000000f
96:
97:
98:
99:
100:
101:
102:
103: /* Global variables for subtract with carry test */
104: /* */
105: /* */
106:
107: static short index = 0;
108: static long dif = 0; /* destination location */
109: static long sub = 0; /*subtrahend location */
110: static long psw; /*processor status word */
111: static long error_count = 0;
112:
113: /*initial flag values */
114: static long i_psw[MAX_PATTERNS] = {IPSW1,IPSW2,IPSW3,IPSW4,IPSW5,IPSW6,
115: IPSW7,IPSW8,IPSW9,IPSW10};
116: /*expected flag values */
117: static long exp_psw[MAX_PATTERNS] = {EPSW1,EPSW2,EPSW3,EPSW4,EPSW5,EPSW6,
118: EPSW7,EPSW8,EPSW9,EPSW10};
119: /* expected destination */
120: static long exp[MAX_PATTERNS] = {EXP1,EXP2,EXP3,EXP4,EXP5,EXP6,EXP7,
121: EXP8,EXP9,EXP10};
122: /*dif values */
123: static long d[MAX_PATTERNS] = {DIF1,DIF2,DIF3,DIF4,DIF5,DIF6,DIF7,
124: DIF8,DIF9,DIF10};
125: /*sub values */
126: static long s[MAX_PATTERNS] = {SUB1,SUB2,SUB3,SUB4,SUB5,SUB6,SUB7,
127: SUB8,SUB9,SUB10};
128: static long savvec4;
129: static long old_psw;
130:
131: sbwc()
132: {
133: asm("movl $2,_no_opr");
134: for (index = 0; index < MAX_PATTERNS; index++) t_sbwc();
135: asm("jmp *return");
136: }
137:
138: static t_sbwc()
139: {
140:
141: long ix;
142: for (ix=1;ix<5;ix++)
143:
144: if (ix==1){
145: setjmp();
146: asm("s1: movab s1,_stpc");
147: asm("movl $1,_subtst");
148: dif = d[index]; /*initialize dif, subtrahend, & psw */
149: sub = s[index];
150: asm("movw _index,r11");
151: asm("shll $16,_i_psw[r11],_savvec4");
152: asm("bicpsw $PSWMASK");
153: asm("bispsw _savvec4");
154: asm("movpsl _old_psw");
155: /*execute sbwc instruction */
156: asm("sbwc _sub,_dif"); /* mem to mem */
157: asm("movpsl _psw"); /*save psw */
158: psw &= FLAGS; /*mask out all bits except flag bits */
159: }
160: if (ix==2){
161: setjmp();
162: asm("s2: movab s2,_stpc");
163: asm("movl $2,_subtst");
164: dif = d[index]; /*initialize dif, subtrahend, & psw */
165: sub = s[index];
166: asm("movw _index,r11");
167: asm("shll $16,_i_psw[r11],_savvec4");
168: asm("movl _sub,r6"); /* load source reg */
169: asm("movl _dif,r7"); /* load dest reg */
170: asm("bicpsw $PSWMASK");
171: asm("bispsw _savvec4");
172: asm("movpsl _old_psw");
173: /*execute sbwc instruction */
174: asm("sbwc r6,r7"); /* reg to reg */
175: asm("movpsl _psw"); /*save psw */
176: asm("movl r7,_dif"); /* load dest reg */
177: psw &= FLAGS; /*mask out all bits except flag bits */
178: }
179: if (ix==3){
180: setjmp();
181: asm("s3: movab s3,_stpc");
182: asm("movl $3,_subtst");
183: dif = d[index]; /*initialize dif, subtrahend, & psw */
184: sub = s[index];
185: asm("movw _index,r11");
186: asm("movl _sub,r6"); /* load source reg */
187: asm("shll $16,_i_psw[r11],_savvec4");
188: asm("bicpsw $PSWMASK");
189: asm("bispsw _savvec4");
190: asm("movpsl _old_psw");
191: /*execute sbwc instruction */
192: asm("sbwc r6,_dif"); /* reg to memory */
193: asm("movpsl _psw"); /*save psw */
194: psw &= FLAGS; /*mask out all bits except flag bits */
195: }
196: if (ix==4){
197: setjmp();
198: asm("s4: movab s4,_stpc");
199: asm("movl $4,_subtst");
200: dif = d[index]; /*initialize dif, subtrahend, & psw */
201: sub = s[index];
202: asm("movw _index,r11");
203: asm("movl _dif,r7"); /* load dest reg */
204: asm("shll $16,_i_psw[r11],_savvec4");
205: asm("bicpsw $PSWMASK");
206: asm("bispsw _savvec4");
207: asm("movpsl _old_psw");
208: /*execute sbwc instruction */
209: asm("sbwc _sub,r7");/* mem to reg */
210: asm("movpsl _psw"); /*save psw */
211: asm("movl r7,_dif"); /* load dest reg */
212: psw &= FLAGS; /*mask out all bits except flag bits */
213: }
214: if (dif != exp[index])
215: {
216: asm("movl $1,_ercode");
217: if (scoplp) longjmp();
218: disp_error(dif,exp[index],s[index],d[index]);
219: }
220: if (sub != s[index])
221: {
222: asm("movl $3,_ercode");
223: if (scoplp) longjmp();
224: disp_error(sub,s[index],s[index],d[index]);
225: }
226: if (psw != exp_psw[index])
227: {
228: asm("movl $2,_ercode");
229: if (scoplp) longjmp();
230: disp_error(psw,exp_psw[index],s[index],d[index]);
231: }
232: else
233: if (force_lp) longjmp();
234: return(0); /*no error exit*/
235: }
236:
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