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1.1 root 1: /* PROCESSOR STORAGE
2: *
3: *This is the first two K bytes of physical main memory to
4: *be used by hardware/firmware. Software should never use
5: *this area.
6: *physical locations = 0x00000000 to 0x000007ff
7: *virtual locations = 0xc0000000 to 0xc00007ff
8: *physical = virtual; kernel read/write access
9: *
10: *divided into three areas:
11: *(1) WCS load area (0x00000000 - 0x000003fc)
12: label = _pstore:
13: *(2) Architecturally defined privileged registers (not
14: label = _pstore1:
15: * provided in CPU hardware (0x00000400 - 0x000005fc)
16: *(3) Temporary area for firmware (0x00000600 - 0x00007fc)
17: label = _pstemp: = _tr0:
18: *
19: */
20: /* .org 0xc00000000 */
21: _pstore:
22: .globl _pstore
23: .space NBPG /*Reserved for WCS loading */
24:
25: _pstore1: /*architecturally defined */
26: .globl _pstore1 /*privileged registers area */
27:
28: _pcbb: .space 4 /*process control block base reg*/
29: _isp: .space 4 /*interrupt stack pointer */
30: _sirr: .space 4 /*software interrupt request reg*/
31: _sisr: .space 4 /*software interrupt summary reg*/
32:
33: .space 4 /*RESERVED*/
34: .space 4
35: .space 4
36:
37: _cpmdcb: .space 4 /*console processor registers */
38: _cpfdcb: .space 4
39: _cpcdcb: .space 4
40: _cpidcb: .space 4
41: _cpstat: .space 4
42: _cpctl: .space 4
43:
44: _hisr: .space 4 /*hardware interrupt summary reg*/
45: _dcr: .space 4 /*diagnostic control register */
46:
47: .space 4*48 /*RESERVED - 48 unused longwords*/
48:
49: _pstemp:
50: .globl _pstemp /*temporary storage area for */
51: /*firmware */
52: _tr0: .space 16 /*temporary storage for general */
53: /*registers 0 thru 15 */
54: _tpc: .space 4 /*program counter */
55: _tpsl: .space 4 /*program status long word */
56: _tsp: .space 4 /*stack pointer */
57: _tksp: .space 4 /*kernel stack pointer */
58: _tusp: .space 4 /*user stack pointer */
59: _tcck: .space 4 /*code cache key */
60: _tdck: .space 4 /*data cache key */
61: _ttbk: .space 4 /*translation buffer key */
62: _tsbr: .space 4 /*system base register */
63: _tslr: .space 4 /*system length register */
64: _tp0br: .space 4 /*p0 base register */
65: _tp0lr: .space 4 /*p0 length register */
66: _tp1br: .space 4 /*p1 base register */
67: _tp1lr: .space 4 /*p1 length register */
68: _tp2br: .space 4 /*p2 base register */
69: _tp2lr: .space 4 /*p2 length register */
70: _tipl: .space 4 /*interrupt priority level */
71: _tmme: .space 4 /*memory mgmt enable */
72: _ttbia: .space 4 /*trans buffer invalidate all */
73: _ttbis: .space 4 /*trans buffer invalidate single*/
74: /*the last two probably will */
75: /*never be used */
76: _tpcbb: .space 4 /*process control block base */
77: _tisp: .space 4 /*interrupt stack pointer */
78: _tsirr: .space 4 /*software int request reg */
79: _tsisr: .space 4 /*software int summary reg */
80: _tscbb: .space 4 /*system control block base */
81: _tp1cc: .space 4 /*invalidate 1 page of process */
82: /*code cache */
83: _tpacc: .space 4 /*invalidate all process pages */
84: /*in code cache */
85: _tp1dc: .space 4 /*inval. 1 pg of proc data cache*/
86: _tpadc: .space 4 /*inval. all pgs of proc data ch*/
87: _tcpmdcb:
88: .space 4 /*temporary area for cp regs */
89: _tcpfdcb:
90: .space 4
91: _tcpcdcb:
92: .space 4
93: _tcpidcb:
94: .space 4
95: _tcpstat:
96: .space 4
97: _tcpctl:
98: .space 4
99:
100: _probflag:
101: .space 4 /*flag for probe instr */
102: _inexcflg:
103: .space 4 /*in exception flag */
104:
105: .space 4*10 /*RESERVED - unused */
106: _psend: .globl _psend /* End of processor storage area*/
107: .set MM,(_psend - _pstore1)
108: .space 1024 - MM
109:
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.