Annotation of cci/d/ether/veiu.h, revision 1.1.1.1

1.1       root        1: /*                                                             */
                      2: /*     ACC ethernet controller definitions, VERSAbus version   */
                      3: /*     product name V/EIU, unix name ACE                       */
                      4: /*                                                             */
                      5: 
                      6: /*                                                             */
                      7: /*     register definitions                                    */
                      8: /*                                                             */
                      9: struct acedevice{
                     10:        struct rx_addr_ram  {         /* receive address match ram.     */
                     11:          short station_addr[6];     /* Ethernet Station Addr  */
                     12:          short broadcast_en[2];     /* Broadcast Reception OK */
                     13:          short mcast_hash_code[8];  /* Multicast Hash Code    */
                     14:        }       rar;      
                     15:        short   csr;            /* hardwired control and status register */
                     16:        short   tseg;           /* active transmit segment #             */
                     17:        short   rseg;           /* active receive  segment #             */
                     18:        short   segb;           /* segment boundary register             */
                     19:        short   lrf;            /* lost receive frame counter            */
                     20:        short   ivct;           /* interrupt vector register.            */
                     21:        short   nada0;          /*  -- reserved for future use --        */
                     22:        short   fcoll;          /* force collision register.             */
                     23: };
                     24: 
                     25: /*
                     26: The following two structure define the format of "transmit and receive
                     27: segments" in the V/EIU's Dual-Ported Memory.  Each segment is 2KBytes
                     28: long and buffers either an outgoing (transmit segment) or incoming 
                     29: (receive segment) Ethernet Frame.
                     30: */
                     31: 
                     32: struct tx_segment {
                     33:           short        tx_csr;         /* control and status register */
                     34:           char         tx_data[2014];  /* frame buffer area           */
                     35:           short        tx_backoff[16]; /* control and status register */
                     36:           };
                     37: 
                     38: struct rx_segment {
                     39:           short        rx_csr;         /* control and status register */
                     40:           char         rx_data[2046];  /* frame buffer area           */
                     41:           };
                     42: 
                     43: /*
                     44: The following two structures define the descriptors used to represent a logical
                     45: queue of Ethernet frames.  The structure supports a FIFO queue mechanism.
                     46: For each queue there is a general control structure that tracks the location
                     47: of the first and last elements of the queue.  Each element contains infromation
                     48: relating to the location of the Ethernet frame & the # of bytes it contains,
                     49: and the location of the next element in the queue.
                     50: */
                     51: 
                     52: struct ace_element {
                     53:        struct  ace_element *pNext;  /* ptr to the next element of the queue  */
                     54:        char    *pFrame;        /* ptr to Ethernet frame assoc w/ elem.  */
                     55:      };
                     56: 
                     57: 
                     58: struct ace_queue {
                     59:      struct ace_element* phead;       /* ptr to first element of queue */
                     60:      struct ace_element* ptail;       /* ptr to last element of queue  */
                     61:      };
                     62: 
                     63: /*
                     64: The following structure defines the format of Ethernet Station Address and
                     65: the format of the Hash Code used by the V/EIU do filter receipt of multicast
                     66: datagram incoming from the Ethernet.
                     67: */ 
                     68: 
                     69: struct station_addr {
                     70:             char           esa[6];          /* 6 byte field in address */
                     71:        };
                     72: 
                     73: struct hash_code    {
                     74:             char           mhc[8];          /* 8 byte field in hash code */
                     75:        };
                     76: 
                     77: 
                     78:  /*
                     79: V/EIU CONTROL/STATUS REGISTER BIT DEFINITIONS
                     80: =============================================
                     81: 
                     82: The following defines the bits in the V/EIU's "Control/Status Register".
                     83: Each bit definition is followed by a brief description which includes 
                     84: a reference to its read/write capabilities as well as it's active state
                     85: if appropriate.  "r/w" := read/write, "r" := read only, and "w" := write 
                     86: only.  "aL" := active LOW and "aH" := active high".  The first three letters 
                     87: of the bits' names, "CSR", indicate definition for the "CSR register" only.
                     88: */
                     89: 
                     90: #define  CSR_UNUSED      0xFD00 /* unused bits                       "??_??" */
                     91: #define  CSR_ENXMITODD   0x0200 /* Enable Odd # byte transmission    "rw_aH" */
                     92: #define  CSR_ACTIVE      0x0080 /* V/EIU is active & running         "r _aH" */
                     93: #define  CSR_RESET       0x0040 /* V/EIU reset control line          " w_aH" */
                     94: #define  CSR_PROMISCUOUS 0x0020 /* Enable "promiscous mode" operation"rw_aH" */
                     95: #define  CSR_NOXMITCRC   0x0010 /* Disable CRC generation & checking "rw_aH" */
                     96: #define  CSR_LOOP3       0x0008 /* Enable MODE 3 LOOPBACK mode       "rw_aH" */
                     97: #define  CSR_LOOP2       0x0004 /* Enable MODE 2 LOOPBACK mode       "rw_aH" */
                     98: #define  CSR_ENINT       0x0002 /* Enable Interrupts to VERSAbus     "rw_aH" */
                     99: #define  CSR_GO          0x0001 /* Enable V/EIU operations           " w_aH" */
                    100: 
                    101: /*
                    102: V/EIU VALID BIT MASKS
                    103: =====================
                    104: 
                    105: The following defines the valid bits of "short" fields contained in
                    106: the V/EIU's "Receive Address Match Ram".  The first three letters
                    107: of the masks' names indicate definition for the following:
                    108:    RAR ==> Receive Address Ram          IVC ==> Interrupt Vector Register
                    109:    LRF ==> Lost Receive Frame Counter   FCL ==> Force Collision Register
                    110: */
                    111: 
                    112: #define  RAR_VALID       0x00FF /* Valid bits in Receive Address Ram fields  */
                    113: #define  LRF_VALID       0x000F /* Valid bits in Lost Receive Frame register */
                    114: #define  IVC_VALID       0x00F8 /* Valid bits in Interrupt Vector register   */
                    115: #define  FCL_VALID       0xFFFF /* Valid bits in Force Collision register    */
                    116: 
                    117: /*
                    118: V/EIU TRANSMIT SEGMENT CONTROL/STATUS BIT DEFINITIONS
                    119: =====================================================
                    120: 
                    121: The following defines the bit-fields in the "Control/Status Field" of a 
                    122: Transmit Segment in the V/EIU's Dual-Ported Memory.  There are two 
                    123: types of bit-fields it this field, those that produce a response by the 
                    124: V/EIU ("command") and those that indicate the response ("status")
                    125: The first three letters of the bits' names, "TCS", indicate definition 
                    126: for the "Tx segment CSr" only.
                    127: */
                    128: 
                    129: /* commands */
                    130: #define  TCS_TBFULL     (short)0x8000 /*   Tx Bfr Full so send it           */
                    131: #define  TCS_TBC         (short)0x07FF /*   Tx Byte Count                    */
                    132: /* status */
                    133: #define  TCS_TBMT        (short)0x8000 /*   Tx Buffer Empty   (avail for Tx) */
                    134: #define  TCS_RTFAIL      (short)0x4000 /*   Tx Retries Failed (frame dropped)*/
                    135: #define  TCS_RTC         (short)0x000F /*   Tx # Retries which collided      */
                    136: 
                    137: /*
                    138: V/EIU RECEIVE SEGMENT CONTROL/STATUS BIT DEFINITIONS
                    139: ====================================================
                    140: 
                    141: The following defines the bit-fields in the "Control/Status Field" of a 
                    142: Receive Segment in the V/EIU's Dual-Ported Memory.  There are two 
                    143: types of bit-fields it this field, those that produce a response by the 
                    144: V/EIU ("command") and those that indicate the response ("status")
                    145: The first three letters of the bits' names, "RCS", indicate definition 
                    146: for the "Rx segment CSr" only.
                    147: */
                    148: 
                    149: #define  RCS_RBMT        0x8000 /* command:  Rx Bfr Empty      (avail for Rx) */
                    150: #define  RCS_RBFULL      0x8000 /* status :  Rx Bfr Full       (frame Rx'd)   */
                    151: #define  RCS_ROVRN       0x4000 /*        :  Rx Bfr Overrun Error (too long)  */
                    152: #define  RCS_RCRC        0x2000 /*        :  Rx Bfr CRC Error  (bad data)     */
                    153: #define  RCS_RODD        0x1000 /*        :  Rx Bfr Alignment Error (odd cnt) */
                    154: #define  RCS_RBC         0x07FF /*        :  Rx Bfr Byte Count                */
                    155: 
                    156: /*
                    157: V/EIU SPECIAL FUNCTION CODE DEFINITIONS
                    158: =======================================
                    159: 
                    160: The following define the valid functions codes available for use with
                    161: the "spfun ()" entry point into this driver.
                    162: */
                    163: 
                    164: #define  ACE_INIT      0x0001     /* V/EIU Initialize command        */
                    165: #define  ACE_RESP      0x0002     /* V/EIU Initialize response       */
                    166: #define  ACE_STATS     0x0003     /* V/EIU Statistics query          */
                    167: #define  ACE_ECMAP     0x0004     /* V/EIU Event counter map request */
                    168: #define  ACE_IOPORTS   0x0005     /* V/EIU I/O Ports Dump            */
                    169: #define  ACE_UCBSTATS  0x0006     /* V/EIU UCB contents Dump         */
                    170: 
                    171: /*
                    172: V/EIU RETURNED ERROR CODES
                    173: ==========================
                    174: 
                    175: The following define the range of error codes which may be returned by
                    176: this driver to calling user processes.  The first letter of the error code's 
                    177: names, "E", indicates definition for "returned error codes" only.
                    178: */
                    179: 
                    180: #define  E_BADDEV        (-100)    /* illegal minor device                   */
                    181: #define  E_OFFLINE       (-101)    /* requested unit is not on-line          */
                    182: #define  E_LOSTSYNC      (-102)    /* driver syncronization lost w/ hardware */
                    183: #define  E_SIGNALED      (-103)    /* I/O request terminated due to signal() */
                    184: #define  E_2BIG          (-104)    /* transmit request for oversize frame    */
                    185: #define  E_2SMALL        (-105)    /* receive request for undersize frame    */
                    186: #define  E_BADCALL       (-106)    /* illegal "spfun()" call                 */
                    187: #define  E_RESET         (-107)    /* unit reset while waiting for i/o to end*/
                    188: 
                    189: /*
                    190: V/EIU MISCELLANEOUS DEFINTIIONS
                    191: ===============================
                    192: 
                    193: The following are miscellaneous constant definitions and come from
                    194: a number of places for a number of different reasons.
                    195: */
                    196: 
                    197: #define  ACE_OFFLINE   0         /* off-line unit status                   */
                    198: #define  ACE_ONLINE    0         /* on-line unit status                    */
                    199: #define  CRC_SIZE        4         /* number of bytes in a rx seg's CRC      */
                    200: #define  RCW_SIZE        2         /* number of bytes in a rx seg's csr      */
                    201: #define  M_READ          "read"    /* read diagnostic string                 */
                    202: #define  M_WRITE         "write"   /* write diagnostic string                */
                    203: #define  SEG_MAX         15        /* largest valid V/EIU segment number     */
                    204: #define  MXRXPKTSZ       1516      /* max. size of allowed rx/tx frames +RCW */
                    205: #define  ET_MINLEN       64        /* min. size of allowed rx/tx frames      */
                    206: #define  ET_MAXLEN       1514      /* max. size of rx/tx frames w/o CRC & RCW*/
                    207: #define  EC_ARRIVED      42        /* EC mapping number for "rx_arrived EC   */
                    208: #define  EC_PROCESSED    43        /* EC mapping number for "rx_processed EC */
                    209: #define  RX_ARVD_EC      42        /* Select code for rx_arrived EC mapping  */
                    210: #define  RX_PRCD_EC      43        /* Select code for rx_processed EC mapping*/
                    211: 

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