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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / event|
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1.1 root 1:
2: #
3: # *bus error event test
4: #
5: #
6: # *non_existent memory (done)
7: # *versabus timeout (done)
8: # *uncorrectable memory error (not done)
9: # *versabus error (not done)
10: # *versabus parity error (not done)
11: #
12: # R4 : PC that failed
13: # R5 : type of fault is testing
14: # 1 - Non existence memory
15: # 2 - Versabus time out
16: # R0 : error code
17: # 1 - expected fault didnot happen
18: # R1 : memory address
19: # 2 - error in SP after taking fault
20: # R1 : actual , R2 : expected
21: # 3 - error in PSL after taking fault
22: # R1 : actual , R2 : expected
23: # 4 - error in Versabus type pushed on stack
24: # R1 : actual , R2 : expected
25: # 5 - error in error code pushed on stack
26: # R1 : actual , R2 : expected
27: # 6 - error in PC pushed on stack
28: # R1 : actual , R2 : expected
29: # 7 - error in PSL pushed on stack
30: # R1 : actual , R2 : expected
31: #
32: # constants -- errorcodes from versabus (not final yet)
33:
34: .set NON_EXIST_MEM,6
35: .set VB_TOUT,4
36:
37: .globl _be_evt
38: _be_evt:
39: .word 0x1fff
40: mtpr $0x1c,$IPL
41: movl $0,*$HSR /* Clear HISR, SISR */
42: movl $0,*$SSR
43: movab (sp),_savvec0 /* Save current SP */
44: mtpr _savvec0,$ISP /* Init. ISP */
45: movpsl _savvec1 /* Save current PSL */
46: movl _scb+BEVEC,_savvec2 /* Save bus error vector */
47: movab 9f,_scb+BEVEC /* Set new vector for Bus error */
48: movl $1,bloop
49: _b2:
50: movl $2,r11 /* R11 = counter */
51:
52: # Non_existent memory error
53:
54: berr:
55: movl $1,r5 /* R5 = 1; Non_existence memory */
56: movl $0x03fffff0,r1 /* R1 = Non_existence memory address */
57: movpsl r6 /* R6 = saved expected PSL */
58: cmpl $1,r11
59: jeql exp_pc2
60: exp_pc1:
61: movab epc1,r4
62: epc1: tstl (r1) /* Should cause Non_existence memory fault */
63: movl $1,r0 /* R0 = 1; error code : Expected fault did */
64: jmp *badrtn /* not happen. R1 = memory address */
65: exp_pc2:
66: movab epc2,r4
67: epc2: clrl (r1) /* Should cause Non_existence memory fault */
68: movl $1,r0 /* R0 = 1; error code : Expected fault did */
69: jmp *badrtn /* not happen. R1 = memory address */
70: #
71: # Bus error event handler
72: #
73: .align 2
74: 9: movab (sp),r1
75: movl _savvec0,r2 /* Check current SP = ISP - 16 */
76: subl2 $16,r2 /* PC,PSL and 2 params should be on stack */
77: cmpl r1,r2
78: beql 1f
79: 2: movl $2,r0 /* R0 = 2; error in SP after taking fault */
80: jmp *badrtn /* SP not decremented by 16 after Bus error */
81: 1:
82: movpsl r1 /* Check current PSL_MODE */
83: andl3 $0x04000000,r1,r3 /* Expected PSL_MODE = Kernel */
84: bneq 1f
85: 2: movl $3,r0 /* R0 = 3; PSL not set correct */
86: movl $0x041d0000,r2 /* after taking Bus error exception */
87: jmp *badrtn
88: 1: andl3 $0x01000000,r1,r3 /* Check current PSL_IS */
89: bneq 2b /* Expected PSL_IS = 1 */
90: andl3 $0x001d0000,r1,r3 /* Check PSL_IPL = 0x1d */
91: cmpl $0x001d0000,r3
92: bneq 2b
93: #
94: # Check parameters pushed on SP
95: #
96: movl (sp)+,r3 /* R3 = Versabus type pushed on stack */
97: andl3 $0,r3,r1 /* For now , don't care */
98: movl $0,r2 /* R2 = expected type (don't care) */
99: cmpl r1,r2
100: beql 1f
101: movl $4,r0 /* R0 = 4; incorrect error code */
102: jmp *badrtn /* pushed on the stack */
103:
104: 1: movl (sp)+,r1 /* R1 = error code pushed on stack */
105: andl2 $0x7,r1 /* Only check the last byte */
106: movl $NON_EXIST_MEM,r2 /* R2 = expected error code */
107: cmpl r1,r2
108: beql 1f
109: movl $5,r0 /* R0 = 4; incorrect error code */
110: jmp *badrtn /* pushed on the stack */
111:
112: 1: movl (sp)+,r1 /* Check PC pushed on the stack */
113: movl exp_pc,r2
114: cmpl r1,r2
115: beql 1f
116: jmp 1f /* For now, PC is not checked !! */
117: movl $6,r0 /* R0 = 6; error in PC on stack */
118: jmp *badrtn /* R1 = actual; R2 = expected */
119:
120: 1: movl (sp)+,r1 /* Check PSL pushed on the stack */
121: andl2 $0xfffffff0,r1
122: movl r6,r2 /* R6 = saved PSL before exception */
123: andl2 $0xfffffff0,r2
124: cmpl r1,r2
125: beql 1f
126: movl $7,r0 /* R0 = 7; error in PSL pushed on stack */
127: jmp *badrtn /* R1 = actual; R2 = expected */
128:
129: 1:
130: decl r11
131: jneq berr /* do again */
132: #
133: # VERSABUS timeout error
134: #
135: movl $2,r5 /* R5 = 2; Versabus time out */
136: movab exp_pc3,r4
137: mtpr $0x1c,$IPL /* Set IPL = 0x1c */
138: movab 9f,_scb+BEVEC /* Set new vector to handle Bus error */
139: movl $0xffff8ff0,r1 /* R1 = Vesrabus non_existence address */
140: movab (sp),_savvec0
141: bispsw $15 /* Set PSW flags */
142: movpsl r6 /* Save PSL in R6 */
143: exp_pc3:
144: movb $255,(r1) /* Should cause Versabus time out exception */
145:
146: movl $1,r0 /* R0 = 8; Expected Versabus time out */
147: jmp *badrtn /* exception did not occur. R1 = Versabus adr */
148:
149: .align 2 /* New handler for Versabus time out exception */
150: 9: movab (sp),r1 /* Check current SP = ISP - 16 */
151: movl _savvec0,r2 /* R1 = actual SP */
152: subl2 $16,r2 /* R2 = expected SP */
153: cmpl r1,r2
154: beql 1f
155: movl $2,r0 /* R0 = 9; error in SP after taking Versabus */
156: jmp *badrtn /* timeout exception. */
157: 1:
158: movpsl r1 /* Check current PSL_IS */
159: andl3 $0x04000000,r1,r3 /* Expected PSL_IS = 1 */
160: bneq 1f
161: 2: movl $3,r0 /* R0 = 10; error in current PSL */
162: movl $0x041f0000,r2 /* R1 = actual; R2 = expected */
163: jmp *badrtn
164:
165: 1: andl3 $0x01000000,r1,r3 /* Check PSL_MODE */
166: bneq 2b /* Expected PSL_MODE = Kernel */
167:
168: andl3 $0x001f0000,r1,r3 /* Check PSL_IPL */
169: cmpl $0x001d0000,r3 /* Expected PSL_IPL = 0x1d */
170: bneq 2b
171: #
172: # Check paramters pushed on the stack
173: #
174: movl (sp)+,r3 /* R3 = Versabus type pushed on stack */
175: andl2 $0,r1 /* Don't care for now */
176: movl $0,r2 /* R2 = expected type */
177: cmpl r1,r2
178: beql 1f
179: movl $4,r0 /* R0 = 4; incorrect error code */
180: jmp *badrtn /* pushed on the stack */
181:
182: 1:
183: movl (sp)+,r3 /* R3 = error code pushed on SP */
184: andl3 $0x7,r3,r1 /* Only check the last 3 bits */
185: movl $VB_TOUT,r2 /* R2 = expected error code */
186: cmpl r1,r2
187: beql 1f
188: movl $5,r0 /* R0 = 5; incorrect error code pushed on SP */
189: jmp *badrtn
190: 1:
191: movl (sp)+,r1 /* R1 = PC pushed on stack */
192: movab exp_pc3,r2 /* R2 = expected PC */
193: cmpl r1,r2
194: beql 1f
195: jmp 1f /* For now, PC is not checked !! */
196: movl $6,r0 /* R0 = 6; incorrect PC pushed on SP */
197: jmp *badrtn
198: 1:
199: movl (sp)+,r1 /* R1 = PSL pushed on SP */
200: andl2 $0xfffffff0,r1
201: movl r6,r2 /* R2 = expected PSL */
202: andl2 $0xfffffff0,r2
203: cmpl r1,r2
204: beql 1f
205: movl $7,r0 /* R0 = 7; incorrect PSL pushed on SP */
206: jmp *badrtn
207: 1:
208: decl bloop
209: jeql 1f
210: jmp _b2 /* Try again this time code is in */
211: /* instruction cache */
212: 1:
213: movl _savvec2,_scb+BEVEC /* Restore original bus error vector */
214: movl _savvec0,sp /* Restore current SP */
215: mtpr $31,$IPL /* Set IPL = HIGH */
216: mtpr $1,$PADC /* Slow it down to loop */
217: ret
218:
219: .align 2
220: exp_pc: .long 0
221: bloop: .long 1
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