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Power 6/32 Unix version 1.2b

#define ALINE   80	/* 80 char maximun in aline		*/
#define SPACE   ' '
#define CR	'\n'
#define MINUS	'-'
#define COMMA   ','
#define EQUAL   '='
#define ATYPE   'h'
#define NTYPE   'h'
#define HEX     'h'
#define DEC     'd'
#define NOBYTES 13
#define NULL	'\0'



/*	TAHOE PRIVILEGE REGISTERS	*/

asm("	.set SBR,0");
asm("	.set SLR,1");
asm("	.set P0BR,2");
asm("	.set P0LR,3");
asm("	.set P1BR,4");
asm("	.set P1LR,5");
asm("	.set P2BR,6");
asm("	.set P2LR,7");
asm("	.set IPL,8");
asm("	.set MAPEN,9");
asm("	.set MME,9");
asm("	.set TBIA,10");
asm("	.set TBIS,11");
asm("	.set DCK,12");
asm("	.set CCK,13");
asm("	.set PCBB,14");
asm("	.set KSP,19");
asm("	.set USP,20");
asm("	.set CPMDCB,21");
asm("	.set PADC,25");
asm("	.set DCR,27");		/* Diagnostic control register */
asm("	.set DC_ON,1");		/* DCR opcode of Enable data cache  */
asm("	.set DC_OFF,2");	/* DCR opcode of Disable data cache */

#define SBR	0
#define SLR	1
#define P0BR	2
#define P0LR	3
#define P1BR	4
#define P1LR	5
#define P2BR	6
#define P2LR	7
#define IPL	8
#define MME	9
#define MAPEN	9
#define TBIA	10
#define TBIS	11
#define DCK	12
#define CCK	13
#define PCBB	14
#define KSP	19
#define USP	20
#define PADC	25
#define DCR	27		/* Diagnostic control register */
#define SCB	0x800		/* address of SCB is at page 2 */




/*	offsets to elements in PCB	*/

#define PCB_KSP		0
#define PCB_USP		1*4
#define PCB_R0		2*4
#define PCB_R1		3*4
#define PCB_R2		4*4
#define PCB_R3		5*4
#define PCB_R4		6*4

#define PCB_PC    	16*4	/* Offset to PC in Process Control Block */
#define PCB_PSL   	17*4
#define PCB_P0BR  	18*4
#define PCB_P0LR  	19*4
#define PCB_P1BR  	20*4
#define PCB_P1LR  	21*4
#define PCB_P2BR  	22*4
#define PCB_P2LR  	23*4


/*	Offsets to vectors in SCB	*/

#define CHMK_VEC  	0x2b	/* Offset to System call vector in SCB */
#define KCALL_VEC  	0x2b	/* Offset to System call vector in SCB */
#define PROT_VEC  	0x2f	/*           Protection fault vector   */
#define TRANS_VEC 	0x30	/*           Translation fault vector  */
#define RESV_INST 	0x2c	/*           Reserved opcode 		*/
#define RESV_ADRM	0x2e	/*           Reserved addr. mode	*/	
#define ALIGN_FLT	0x35	/*           Data alignment fault	*/	

/*	PSL 		*/
#define PSL_TP		0x40000000
#define PSL_IS		0x4000000
#define PSL_USR		0x1000000



#define NBPG		1024
#define PGSHIFT 	10
#define ENDVMEM 	0xc01fffff	/* max system virtual mem : 2 meg */
#define WRITE		1
#define READ		0
#define TRUE		1
#define FALSE		0
#define USER		1
#define KERNEL		0
#define LENGTH		1
#define VALID		0

#define	PTE_V		0x80000000	/*             Valid bit	 */
#define PTE_PROT	0x78000000	/* Access bits in PTE            */
#define	PTE_UC		0x1000000	/*             Uncachable bit	 */
#define	PTE_M		0x800000 	/* position of Modify bit in PTE */
#define PTE_U		0x400000 	/*             Used bit		 */
#define PTE_PFN		0x3fffff	/* Page frame number in PTE      */

#define PTE_NOACC	0		/* No access 			 */
#define	PTE_KR		0x40000000	/* Kernel read 			 */
#define	PTE_KW		0x60000000	/* Kernel read/write 		 */
#define	PTE_URKR	0x50000000	/* User/Kernel read 		 */
#define	PTE_URKW	0x70000000	/* User read, Kernel read/write	 */
#define	PTE_UW		0x78000000	/* User/Kernel read/write 	 */

#define SADDR   	0xc0000000	/* Bit 30-31 of System, P0, P1, P2 */
#define P0ADDR  	0		/* virtual address   */
#define P1ADDR  	0x40000000
#define P2ADDR  	0x80000000



/*	CONSTANT USED IN MEMORY MANAGEMENT TEST		*/

#define IOB0	(((unsigned)(&iob0) & 0x3ffffc00) >> PGSHIFT) & 0xfffff		
#define IOB1	(((unsigned)(&iob1) & 0x3ffffc00) >> PGSHIFT) & 0xfffff		
#define IOB2	(((unsigned)(&iob2) & 0x3ffffc00) >> PGSHIFT) & 0xfffff		
#define IOB3	(((unsigned)(&iob3) & 0x3ffffc00) >> PGSHIFT) & 0xfffff		
#define U0_P0PT	(((unsigned)(&u0p0pt) & 0x3ffffc00) >> PGSHIFT) & 0xfffff
#define U0_P1PT	(((unsigned)(&u0p1pt) & 0x3ffffc00) >> PGSHIFT) & 0xfffff

#define TEST_PTESYS 	unused		/*  PTE no. used to test SBR  */
#define TEST_PTEP0 	68		/* PTE no. used to test P0PT */
#define TEST_PTEP1 	0		/* PTE no. used to test P1PT */
#define TST0_PTEP2 	LAST_VPGNO	/* PTE no. used to test P2PT */
#define TST1_PTEP2 	LAST_VPGNO-1	/* PTE no. used to test P2PT */
#define LAST_VPGNO 	0xfffff		/* Last virtual page no in subspaces */


#define	TEST_PG		(IOB1)
#define LAST_P0PTE 	99		
#define LAST_P1PTE 	9
#define FIRST_P2PTE 	0		
#define MAX_P0PTE	100		
#define MAX_P1PTE	10
#define MAX_P2PTE	10			

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