--- cci/d/event/mulevt.s	2019/07/28 12:24:19	1.1.1.1
+++ cci/d/event/mulevt.s	2019/07/28 12:30:54	1.1.1.2
@@ -12,7 +12,7 @@
 _mulevt:
 	.word	0x1fff
 
-	mtpr	$17,$IPL		/* allow clock interrupt */
+	mtpr	$18,$IPL		/* do not allow clock interrupt */
 	mtpr	$_Sysmap,$P0BR
 	mtpr	$_Syssize,$P0LR
 	clrl	_Udata
@@ -28,8 +28,6 @@ _mulevt:
 	orl2	$0xf8000000,(r0)[r1]	/* Set User READ/WRITE */
 	mtpr	$1,$TBIA
 					
-	mtpr	$0xc,$IPL		/* Set IPL to 12		*/
-	mtpr	$0xb,$SIRR		/* Request soft int#11 		*/
 
 	andl3	$_pcb0,$0x3fffffff,r1	/* Initialize PCB slightly	*/
 	mtpr	r1,$PCBB		/* Set PCBB			*/
@@ -46,8 +44,10 @@ _mulevt:
 
 	movab	_Ucode,_exp_pc
 	movl	_exp_pc,PCB_PC(r1)	/* Set PCB_PC */
+	mtpr	$0xb,$SIRR		/* Request soft int#11 		*/
 	ldpctx				/* Switch to Kernel SP, push PSL,PC */
 mrei:
+	mtpr	$0xc,$IPL		/* Set IPL to 12		*/
 	rei				/* Should get soft int.#11 ! */
 
 fini:
@@ -61,6 +61,7 @@ fini:
 	.align	2			/* SFE exception handler	*/
 sfehdlr:				/* **************************** */
 	movpsl	r10			/* R10 = PSL after exception	*/
+	mtpr	$18,$IPL		/* Disable clock during handler */
 	andl3	$0x101f0000,r10,r1	/* R1 = IS,IPL after exception 	*/
 	clrl	r2			/* R2 = Expected IS,IPL		*/
 	cmpl	r1,r2
@@ -101,12 +102,15 @@ sfehdlr:				/* *************************
 	movl	$TTVEC,r1
 	movl	_scb[r1],_savvec6	/* Save TRACE trap vector	*/
 	movab	tt_hdlr,_scb[r1]	/* Set new TRACE vector : Just REI */
+	mtpr	$0,$IPL			/* restore IPL (enable clock)	*/
 	rei				/* Should take Trace trap 	*/
 #
 #
 #					/* **************************** */
 	.align	2			/* TRACE trap handler		*/
 tt_hdlr:				/* **************************** */
+	movpsl	r10			/* R10 = PSL after exception	*/
+	mtpr	$0x1f,$IPL
 	movl	_Udata,r1		/* Check if 1 inst. executed 	*/
 	clrl	r2			/* when REI from SFE handler.. 	*/
 	cmpl	r1,r2
@@ -114,7 +118,6 @@ tt_hdlr:				/* *************************
 	movl	$11,r0			/* Error : did not get Trace trap */
 	jmp	*badrtn			/* when PSL_TP and PSL_T were set */
 1:
-	movpsl	r10			/* R10 = PSL after exception	*/
 	andl3	$0x101f0000,r10,r1	/* R1 = IS,IPL after exception 	*/
 	clrl	r2			/* R2 = Expected IS,IPL		*/
 	cmpl	r1,r2
@@ -160,6 +163,7 @@ tt_hdlr:				/* *************************
 	.align	2			/* Soft Int.#11 handler		*/
 si11_hdr:				/* **************************** */
 	movpsl	r10			/* R10 : PSL after taken soft int */
+	mtpr	$18,$IPL		/* Disable clock during handler */
 	andl3	$0x1f0000,r10,r1	/* R1 : Actual IPL after int.   */
 	movl	$0x0b0000,r2		/* R2 : Expected IPL		*/
 	cmpl	r1,r2
@@ -204,6 +208,7 @@ si11_hdr:				/* ************************
 	movl	$SFEVEC,r1
 	movl	_scb[r1],_savvec7	/* Save SFE original vector	*/
 	movab	sfehdlr,_scb[r1]	/* Set new SFE handler		*/
+	mtpr	$0xb,$IPL		/* restore IPL (enable clock)	*/
 	rei				/* Should take SFE exception	*/
 	halt