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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / event|
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1.1 root 1: #
2: # Multiple events tests :
3: # Check out the order of servicing multiple events
4: #
5:
6:
7: .set SFEVEC,0x36 /* Vector no. for SFE */
8: .set TTVEC,0x32 /* Vector no. for Trace trap */
9: .set SINT11,0x14 /* Vector no. for Soft int#11 */
10:
11: .globl _mulevt
12: _mulevt:
13: .word 0x1fff
14:
15: mtpr $17,$IPL /* allow clock interrupt */
16: mtpr $_Sysmap,$P0BR
17: mtpr $_Syssize,$P0LR
18: clrl _Udata
19: movl fp,_saved_fp /* Save FP */
20:
21: movl $SINT11,r1
22: movl _scb[r1],_savvec5 /* Save SOFTINT#11 vector */
23: movab si11_hdr,_scb[r1] /* Set new Soft int#11 vector */
24: /* Make User area User accessible */
25: mfpr $P0BR,r0
26: andl3 $0x3fffffff,$_Ucode,r1
27: shar $PGSHIFT,r1,r1 /* Get Page no */
28: orl2 $0xf8000000,(r0)[r1] /* Set User READ/WRITE */
29: mtpr $1,$TBIA
30:
31: mtpr $0xc,$IPL /* Set IPL to 12 */
32: mtpr $0xb,$SIRR /* Request soft int#11 */
33:
34: andl3 $_pcb0,$0x3fffffff,r1 /* Initialize PCB slightly */
35: mtpr r1,$PCBB /* Set PCBB */
36: orl2 $0xc0000000,r1
37: movab (sp),r7
38: subl3 $8,r7,_exp_isp /* Set expected ISP */
39: subl3 $40,r7,PCB_KSP(r1) /* Set PCB_KSP to (SP-40) */
40: movl PCB_KSP(r1),_exp_ksp /* Set expected SP after except. */
41: subl3 $80,r7,PCB_USP(r1) /* Set PCB_USP to (SP-80) */
42: mfpr $P0BR,PCB_P0BR(r1) /* Set PCB_P0BR */
43: mfpr $P0LR,PCB_P0LR(r1) /* Set PCB_P0BR */
44: movl $0x41000110,_exp_psl /* Set PCB_PSL : U_mode, */
45: movl _exp_psl,PCB_PSL(r1) /* SFE set, T_bit and TP_bit set */
46:
47: movab _Ucode,_exp_pc
48: movl _exp_pc,PCB_PC(r1) /* Set PCB_PC */
49: ldpctx /* Switch to Kernel SP, push PSL,PC */
50: mrei:
51: rei /* Should get soft int.#11 ! */
52:
53: fini:
54: movl _saved_fp,fp /* Restore FP */
55: ret /* Done with this sucker !! */
56: #
57: # **************
58: # Event Handlers
59: # **************
60: # /* **************************** */
61: .align 2 /* SFE exception handler */
62: sfehdlr: /* **************************** */
63: movpsl r10 /* R10 = PSL after exception */
64: andl3 $0x101f0000,r10,r1 /* R1 = IS,IPL after exception */
65: clrl r2 /* R2 = Expected IS,IPL */
66: cmpl r1,r2
67: jeql 1f
68: movl $6,r0 /* Error : IPL not correct after */
69: jmp *badrtn /* SFE exception. R0 = error code */
70: 1:
71: movab (sp),r1 /* R1 : KSP after exception */
72: movl _exp_ksp,r2 /* R2 : Expected KSP */
73: cmpl r1,r2
74: beql 1f
75: movl $7,r0 /* Error : SP not correct after */
76: jmp *badrtn /* SFE exception */
77: 1:
78: movab (sp),r9
79: movl (r9),r1 /* R1 : PC on SP after exception */
80: movl _exp_pc,r2 /* R2 : expected PC */
81: cmpl r1,r2
82: beql 1f
83: movl $8,r0 /* Error : PC on SP not correct after */
84: jmp *badrtn /* SFE exception */
85: 1:
86: movl 4(r9),r1 /* R1 : PSL on SP after exception */
87: movl _exp_psl,r2 /* R2 : Expected PSL */
88: cmpl r1,r2
89: beql 1f
90: movl $9,r0 /* Error : PSL on SP incorrect after */
91: jmp *badrtn /* SFE exception */
92: 1:
93: andl3 $0xbfffffff,_exp_psl,_exp_psl /* Clear PSL_TP */
94: mfpr $ISP,r1 /* R1 : Expected ISP */
95: movl _exp_isp,r2 /* R2 : Expected ISP */
96: cmpl r1,r2
97: beql 1f
98: movl $10,r0 /* Error : PSL on SP incorrect after */
99: jmp *badrtn /* SFE exception */
100: 1:
101: movl $TTVEC,r1
102: movl _scb[r1],_savvec6 /* Save TRACE trap vector */
103: movab tt_hdlr,_scb[r1] /* Set new TRACE vector : Just REI */
104: rei /* Should take Trace trap */
105: #
106: #
107: # /* **************************** */
108: .align 2 /* TRACE trap handler */
109: tt_hdlr: /* **************************** */
110: movl _Udata,r1 /* Check if 1 inst. executed */
111: clrl r2 /* when REI from SFE handler.. */
112: cmpl r1,r2
113: jeql 1f
114: movl $11,r0 /* Error : did not get Trace trap */
115: jmp *badrtn /* when PSL_TP and PSL_T were set */
116: 1:
117: movpsl r10 /* R10 = PSL after exception */
118: andl3 $0x101f0000,r10,r1 /* R1 = IS,IPL after exception */
119: clrl r2 /* R2 = Expected IS,IPL */
120: cmpl r1,r2
121: jeql 1f
122: movl $12,r0 /* Error : IPL not correct after */
123: jmp *badrtn /* SFE exception. R0 = error code */
124: 1:
125: movab (sp),r1 /* R1 : KSP after exception */
126: movl _exp_ksp,r2 /* R2 : Expected KSP */
127: cmpl r1,r2
128: beql 1f
129: movl $13,r0 /* Error : SP not correct after */
130: jmp *badrtn /* Trace trap exception */
131: 1:
132: movab (sp),r9
133: movl (r9),r1 /* R1 : PC on SP after exception */
134: movl _exp_pc,r2 /* R2 : expected PC */
135: cmpl r1,r2
136: beql 1f
137: movl $14,r0 /* Error : PC on SP not correct after */
138: jmp *badrtn /* Trace trap exception */
139: 1:
140: movl 4(r9),r1 /* R1 : PSL on SP after exception */
141: movl _exp_psl,r2 /* R2 : Expected PSL */
142: cmpl r1,r2
143: beql 1f
144: movl $15,r0 /* Error : PSL on SP incorrect after */
145: jmp *badrtn /* Trace trap exception */
146: 1:
147: mfpr $ISP,r1 /* R1 : Expected ISP */
148: movl _exp_isp,r2 /* R2 : Expected ISP */
149: cmpl r1,r2
150: beql 1f
151: movl $16,r0 /* Error : PSL on SP incorrect */
152: jmp *badrtn
153: 1:
154: svpctx /* Switch to ISP */
155: mtpr $0x1f,$IPL
156: jmp fini
157: #
158: #
159: # /* **************************** */
160: .align 2 /* Soft Int.#11 handler */
161: si11_hdr: /* **************************** */
162: movpsl r10 /* R10 : PSL after taken soft int */
163: andl3 $0x1f0000,r10,r1 /* R1 : Actual IPL after int. */
164: movl $0x0b0000,r2 /* R2 : Expected IPL */
165: cmpl r1,r2
166: beql 1f
167: movl $1,r0 /* Error : in IPL after taken int. */
168: jmp *badrtn
169: 1:
170: movab (sp),r7 /* R7 : current ISP */
171: movl r7,r1
172: movl _exp_isp,r2 /* R2 : expected ISP */
173: cmpl r1,r2
174: beql 1f
175: movl $2,r0 /* Error : in ISP after taken int. */
176: jmp *badrtn
177: 1:
178: addl3 $8,r7,_exp_isp /* Expected ISP after SFE exception */
179: movl (r7),r1 /* R1 : User PC on stack */
180: movl _exp_pc,r2 /* R2 : expected PC */
181: cmpl r1,r2
182: beql 1f
183: movl $3,r0 /* Error : PC on SP not correct after */
184: jmp *badrtn /* taking software int.#11 */
185: 1:
186: movl 4(r7),r1 /* R1 : User PSL on SP */
187: movl _exp_psl,r2 /* R2 : Expected PSL */
188: cmpl r1,r2
189: beql 1f
190: movl $4,r0 /* Error : PSL on SP incorrect after */
191: jmp *badrtn /* taking software int.#11 */
192: 1:
193: andl3 $0xfffffeff,_exp_psl,_exp_psl /* Mask out SFE bit */
194: mfpr $PCBB,r3
195: orl2 $0xc0000000,r3 /* VA of PCBB */
196: movl (r3),r1 /* R1 : Actual KSP */
197: movl _exp_ksp,r2 /* R2 : Expected KSP */
198: cmpl r1,r2
199: beql 1f
200: movl $5,r0 /* Error : PCBB_KSP incorrect after */
201: jmp *badrtn /* taking software int.#11 */
202: 1:
203: subl3 $8,r1,_exp_ksp /* Expected KSP after SFE exception */
204: movl $SFEVEC,r1
205: movl _scb[r1],_savvec7 /* Save SFE original vector */
206: movab sfehdlr,_scb[r1] /* Set new SFE handler */
207: rei /* Should take SFE exception */
208: halt
209:
210: #
211: # Data area
212: #
213: .align 2
214: _exp_pc:
215: .long 0
216: _exp_psl:
217: .long 0
218: _exp_ksp:
219: .long 0
220: _exp_isp:
221: .long 0
222: #
223: # User code area
224: #
225: .set PATERN,0xabababab
226: _Ucode:
227: movl $PATERN,_Udata /* Since the TP bit is on, this */
228: halt /* instr. will not be executed, goto Trace handler */
229: .align 2
230: _Udata :
231: .long 0
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