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File:  [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / event / mulevt.s
Revision 1.1.1.2 (vendor branch): download - view: text, annotated - select for diffs
Sun Jul 28 12:30:54 2019 UTC (6 years, 11 months ago) by root
Branches: bsd, MAIN
CVS tags: v121, HEAD
Power 6/32 Unix version 1.21

 #
 #	Multiple events tests :
 #	Check out the order of servicing multiple events
 #


	.set	SFEVEC,0x36		/* Vector no. for SFE */
	.set	TTVEC,0x32		/* Vector no. for Trace trap */
	.set	SINT11,0x14		/* Vector no. for Soft int#11 */

	.globl	_mulevt
_mulevt:
	.word	0x1fff

	mtpr	$18,$IPL		/* do not allow clock interrupt */
	mtpr	$_Sysmap,$P0BR
	mtpr	$_Syssize,$P0LR
	clrl	_Udata
	movl	fp,_saved_fp		/* Save FP */

	movl	$SINT11,r1
	movl	_scb[r1],_savvec5	/* Save SOFTINT#11  vector	*/
	movab	si11_hdr,_scb[r1]	/* Set new Soft int#11 vector   */
					/* Make User area User accessible */
	mfpr	$P0BR,r0
	andl3	$0x3fffffff,$_Ucode,r1
	shar	$PGSHIFT,r1,r1		/* Get Page no */
	orl2	$0xf8000000,(r0)[r1]	/* Set User READ/WRITE */
	mtpr	$1,$TBIA
					

	andl3	$_pcb0,$0x3fffffff,r1	/* Initialize PCB slightly	*/
	mtpr	r1,$PCBB		/* Set PCBB			*/
	orl2	$0xc0000000,r1
	movab	(sp),r7	
	subl3	$8,r7,_exp_isp		/* Set expected ISP		*/
	subl3	$40,r7,PCB_KSP(r1)	/* Set PCB_KSP to (SP-40)	*/
	movl	PCB_KSP(r1),_exp_ksp	/* Set expected SP after except. */
	subl3	$80,r7,PCB_USP(r1)	/* Set PCB_USP to (SP-80)	*/
	mfpr	$P0BR,PCB_P0BR(r1)	/* Set PCB_P0BR			*/
	mfpr	$P0LR,PCB_P0LR(r1)	/* Set PCB_P0BR			*/
	movl	$0x41000110,_exp_psl  	/* Set PCB_PSL  : U_mode, 	*/
	movl	_exp_psl,PCB_PSL(r1)  	/* SFE set, T_bit and TP_bit set */

	movab	_Ucode,_exp_pc
	movl	_exp_pc,PCB_PC(r1)	/* Set PCB_PC */
	mtpr	$0xb,$SIRR		/* Request soft int#11 		*/
	ldpctx				/* Switch to Kernel SP, push PSL,PC */
mrei:
	mtpr	$0xc,$IPL		/* Set IPL to 12		*/
	rei				/* Should get soft int.#11 ! */

fini:
	movl	_saved_fp,fp		/* Restore FP */
	ret				/* Done with this sucker !!	*/
#
#	**************
#	Event Handlers
#	**************
#					/* **************************** */
	.align	2			/* SFE exception handler	*/
sfehdlr:				/* **************************** */
	movpsl	r10			/* R10 = PSL after exception	*/
	mtpr	$18,$IPL		/* Disable clock during handler */
	andl3	$0x101f0000,r10,r1	/* R1 = IS,IPL after exception 	*/
	clrl	r2			/* R2 = Expected IS,IPL		*/
	cmpl	r1,r2
	jeql	1f
	movl	$6,r0			/* Error : IPL not correct after */
	jmp	*badrtn			/* SFE exception. R0 = error code */
1:
	movab	(sp),r1			/* R1 : KSP after exception	*/
	movl	_exp_ksp,r2		/* R2 : Expected KSP		*/
	cmpl	r1,r2
	beql	1f
	movl	$7,r0			/* Error : SP not correct after */
	jmp	*badrtn			/* SFE exception		*/
1:
	movab	(sp),r9
	movl	(r9),r1			/* R1 : PC on SP after exception */
	movl	_exp_pc,r2		/* R2 : expected PC		*/
	cmpl	r1,r2
	beql	1f
	movl	$8,r0			/* Error : PC on SP not correct after */
	jmp	*badrtn			/* SFE exception		*/
1:
	movl	4(r9),r1		/* R1 : PSL on SP after exception */
	movl	_exp_psl,r2		/* R2 : Expected PSL 		*/
	cmpl	r1,r2
	beql	1f
	movl	$9,r0			/* Error : PSL on SP incorrect after */
	jmp	*badrtn			/* SFE exception		*/
1:
	andl3	$0xbfffffff,_exp_psl,_exp_psl	/* Clear PSL_TP */
	mfpr	$ISP,r1			/* R1 : Expected ISP */
	movl	_exp_isp,r2		/* R2 : Expected ISP 		*/
	cmpl	r1,r2
	beql	1f
	movl	$10,r0			/* Error : PSL on SP incorrect after */
	jmp	*badrtn			/* SFE exception		*/
1:
	movl	$TTVEC,r1
	movl	_scb[r1],_savvec6	/* Save TRACE trap vector	*/
	movab	tt_hdlr,_scb[r1]	/* Set new TRACE vector : Just REI */
	mtpr	$0,$IPL			/* restore IPL (enable clock)	*/
	rei				/* Should take Trace trap 	*/
#
#
#					/* **************************** */
	.align	2			/* TRACE trap handler		*/
tt_hdlr:				/* **************************** */
	movpsl	r10			/* R10 = PSL after exception	*/
	mtpr	$0x1f,$IPL
	movl	_Udata,r1		/* Check if 1 inst. executed 	*/
	clrl	r2			/* when REI from SFE handler.. 	*/
	cmpl	r1,r2
	jeql	1f
	movl	$11,r0			/* Error : did not get Trace trap */
	jmp	*badrtn			/* when PSL_TP and PSL_T were set */
1:
	andl3	$0x101f0000,r10,r1	/* R1 = IS,IPL after exception 	*/
	clrl	r2			/* R2 = Expected IS,IPL		*/
	cmpl	r1,r2
	jeql	1f
	movl	$12,r0			/* Error : IPL not correct after */
	jmp	*badrtn			/* SFE exception. R0 = error code */
1:
	movab	(sp),r1			/* R1 : KSP after exception	*/
	movl	_exp_ksp,r2		/* R2 : Expected KSP		*/
	cmpl	r1,r2
	beql	1f
	movl	$13,r0			/* Error : SP not correct after */
	jmp	*badrtn			/* Trace trap exception		*/
1:
	movab	(sp),r9
	movl	(r9),r1			/* R1 : PC on SP after exception */
	movl	_exp_pc,r2		/* R2 : expected PC		*/
	cmpl	r1,r2
	beql	1f
	movl	$14,r0			/* Error : PC on SP not correct after */
	jmp	*badrtn			/* Trace trap exception		*/
1:
	movl	4(r9),r1		/* R1 : PSL on SP after exception */
	movl	_exp_psl,r2		/* R2 : Expected PSL 		*/
	cmpl	r1,r2
	beql	1f
	movl	$15,r0			/* Error : PSL on SP incorrect after */
	jmp	*badrtn			/* Trace trap exception		*/
1:
	mfpr	$ISP,r1			/* R1 : Expected ISP */
	movl	_exp_isp,r2		/* R2 : Expected ISP 		*/
	cmpl	r1,r2
	beql	1f
	movl	$16,r0			/* Error : PSL on SP incorrect  */
	jmp	*badrtn
1:
	svpctx				/* Switch to ISP */
	mtpr	$0x1f,$IPL
	jmp	fini
#
#
#					/* **************************** */
	.align	2			/* Soft Int.#11 handler		*/
si11_hdr:				/* **************************** */
	movpsl	r10			/* R10 : PSL after taken soft int */
	mtpr	$18,$IPL		/* Disable clock during handler */
	andl3	$0x1f0000,r10,r1	/* R1 : Actual IPL after int.   */
	movl	$0x0b0000,r2		/* R2 : Expected IPL		*/
	cmpl	r1,r2
	beql	1f
	movl	$1,r0			/* Error : in IPL after taken int. */
	jmp	*badrtn
1:
	movab	(sp),r7			/* R7 : current ISP		*/
	movl	r7,r1
	movl	_exp_isp,r2		/* R2 : expected ISP		*/
	cmpl	r1,r2
	beql	1f
	movl	$2,r0			/* Error : in ISP after taken int. */
	jmp	*badrtn
1:
	addl3	$8,r7,_exp_isp		/* Expected ISP after SFE exception */
	movl	(r7),r1			/* R1 : User PC on stack	*/
	movl	_exp_pc,r2		/* R2 : expected PC		*/
	cmpl	r1,r2
	beql	1f
	movl	$3,r0			/* Error : PC on SP not correct after */
	jmp	*badrtn			/* taking software int.#11	*/
1:
	movl	4(r7),r1		/* R1 : User PSL on SP		*/
	movl	_exp_psl,r2		/* R2 : Expected PSL 		*/
	cmpl	r1,r2
	beql	1f
	movl	$4,r0			/* Error : PSL on SP incorrect after */
	jmp	*badrtn			/* taking software int.#11	*/
1:
	andl3	$0xfffffeff,_exp_psl,_exp_psl 	/* Mask out SFE bit */
	mfpr	$PCBB,r3
	orl2	$0xc0000000,r3		/* VA of PCBB */
	movl	(r3),r1			/* R1 : Actual KSP		*/
	movl	_exp_ksp,r2		/* R2 : Expected KSP 		*/
	cmpl	r1,r2
	beql	1f
	movl	$5,r0			/* Error : PCBB_KSP incorrect after */
	jmp	*badrtn			/* taking software int.#11	*/
1:
	subl3	$8,r1,_exp_ksp		/* Expected KSP after SFE exception */
	movl	$SFEVEC,r1
	movl	_scb[r1],_savvec7	/* Save SFE original vector	*/
	movab	sfehdlr,_scb[r1]	/* Set new SFE handler		*/
	mtpr	$0xb,$IPL		/* restore IPL (enable clock)	*/
	rei				/* Should take SFE exception	*/
	halt

#
#	Data area
#
	.align	2
_exp_pc:
	.long 	0
_exp_psl:
	.long 	0
_exp_ksp:
	.long	0
_exp_isp:
	.long	0
#
#	User code area
#
	.set	PATERN,0xabababab
_Ucode:
	movl	$PATERN,_Udata		/* Since the TP bit is on, this */
	halt		/* instr. will not be executed, goto Trace handler */
	.align	2
_Udata :
	.long	0
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