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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / event|
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1.1 ! root 1: # ! 2: # Privileged instructions tests ! 3: ! 4: # LDPCTX : load process context ! 5: # SVPCTX : save process context ! 6: # REI : return from interrupt ! 7: # ! 8: # R0 = error codes ! 9: # 1 : LDPCTX fail to load general registers ! 10: # 2 : LDPCTX fail to load Memory Management Regsiters ! 11: # r3 = reg. no of register in error ! 12: # r1 = actual value ! 13: # r2 = expected value ! 14: # 3 : SP not loaded correctly by LDPCTX ! 15: # 4 : LDPCTX did not put PC correctly on stack ! 16: # 5 : LDPCTX did not put PSL correctly on stack ! 17: # 6 : PSL_IS is not reset when LDPCTX from ISP to KSP ! 18: # 7 : Interrupt stack is not saved when LDPCTX from ISP to KSP ! 19: # 8 : PSL_IS is not set when SVPCTX executed ! 20: # 9 : Stack is not switched to ISP after SVPCTX executed ! 21: # 10 : SP is not saved in PCB_KSP correctly by SVPCTX ! 22: # 11 : SVPCTX did not saved general registers correctly. ! 23: # R3 = PCB entry no in error ! 24: # R1 = actual value ! 25: # R2 = expected value ! 26: # 12 : SVPCTX did not saved PC correctly. ! 27: # R1 = actual value ! 28: # R2 = expected value ! 29: # 13 : SVPCTX did not saved PSL correctly. ! 30: # R1 = actual value ! 31: # R2 = expected value ! 32: # 14 : REI fell thru to next instruction... ! 33: # R3 = address of REI instruction ! 34: # 15 : PSL not loaded correctly by REI ! 35: # R1 = actual, R2 = expected ! 36: # R3 = address of REI instruction ! 37: # 16 : SP not loaded correctly by REI ! 38: # R1 = actual, R2 = expected ! 39: # R3 = address of REI instruction ! 40: # 17 : SP was not saved into ISP when REI with PSL_IS = 1 ! 41: # R1 = actual, R2 = expected ! 42: # R3 = address of REI instruction ! 43: # 18 : REI took pending interrupt IPL#14 in HISR while PSL_IPL was 1b ! 44: # R3 = address of REI instruction ! 45: # 19 : REI took pending interrupt IPL#7 in SISR while PSL_IPL was 1b ! 46: # R3 = address of REI instruction ! 47: # 20 : REI did not take pending interrupt IPL#0x14 in HISR while ! 48: # PSL_IPL was 0x13 ! 49: # R3 = address of REI instruction ! 50: # 21 : REI did not clear bit in HISR corresponding to IPL#14 after ! 51: # taking the pending interrupt ! 52: # R1 = actual, R2 = expected ! 53: # R3 = address of REI instruction ! 54: # 22 : REI did not set current PSL correctly after taking the pending ! 55: # interrupt IPL#14 in HISR ! 56: # R1 = actual, R2 = expected ! 57: # R3 = address of REI instruction ! 58: # 23 : SP error after taking pending interrupt in HISR at IPL#0x14 ! 59: # R1 = actual, R2 = expected ! 60: # R3 = address of REI instruction ! 61: # 24 : REI did not leave correct PC on the stack after taking pending ! 62: # interrupt in HISR #0x14 ! 63: # R1 = actual, R2 = expected ! 64: # R3 = address of REI instruction ! 65: # 25 : REI did not leave correct PSL on the stack after taking pending ! 66: # interrupt in HISR #0x14 ! 67: # R1 = actual, R2 = expected ! 68: # R3 = address of REI instruction ! 69: # 26 : REI did not take pending interrupt IPL#7 in SISR while ! 70: # REI to IPL #6 ! 71: # R3 = address of REI instruction ! 72: # 27 : REI did not clear bit in SISR corresponding to IPL#7 after ! 73: # taking the pending interrupt ! 74: # R1 = actual, R2 = expected ! 75: # R3 = address of REI instruction ! 76: # 28 : REI did not set current PSL correctly after taking the pending ! 77: # interrupt IPL#7 in SISR ! 78: # R1 = actual, R2 = expected ! 79: # R3 = address of REI instruction ! 80: # 29 : PSL does not have correct mode after REI from Kernel to User ! 81: # R1 = actual, R2 = expected ! 82: # R3 = address of REI instruction ! 83: # 30 : SP is not loaded from PCB_USP after REI from Kernel to User ! 84: # R1 = actual, R2 = expected ! 85: # R3 = address of REI instruction ! 86: # 31 : Previous SP is not saved into ISP after REI from Kernel ! 87: # to User with previous PSL_IS = 1 ! 88: # R1 = actual, R2 = expected ! 89: # R3 = address of REI instruction ! 90: # 32 : PSL does not have correct mode after REI from User to User ! 91: # R1 = actual, R2 = expected ! 92: # R3 = address of REI instruction ! 93: # 33 : SP is not loaded from PCB_USP after REI from User to User ! 94: # R1 = actual, R2 = expected ! 95: # R3 = address of REI instruction ! 96: # 34 : REI did not take pending software int. #2 while REI to IPL 0 ! 97: # R3 = address of REI instruction ! 98: # 35 : PCB_USP is not supposed to change by SVPCTX but it is. ! 99: # 36 : LDPCTX did not load the single precision floating point ! 100: # accumulator correctly. ! 101: # R1 = actual, R2 = expected ! 102: # 37 : LDPCTX did not load the double precision floating point ! 103: # accumulator correctly. ! 104: # R1 / R2 = actual, R3 / R4 = expected ! 105: # 38 : SVPCTX did not save the single precision floating point ! 106: # accumulator correctly. ! 107: # R1 = actual, R2 = expected ! 108: # 39 : SVPCTX did not save the double precision floating point ! 109: # accumulator correctly. ! 110: # R1 / R2 = actual, R3 / R4 = expected ! 111: # ! 112: .globl _prvinstr ! 113: _prvinstr: ! 114: .word 0x1fff ! 115: mtpr $HIGH,$IPL /* IPL = HIGH */ ! 116: bicpsw $0x3f /* Clear all flag */ ! 117: movab (sp),_savvec0 /* Save current SP */ ! 118: movpsl _savvec1 /* Save current PSL */ ! 119: movl fp,_savvec2 /* Save current FP */ ! 120: ! 121: mtpr $0,$ISP /* Init ISP to 0 */ ! 122: movab _pcb0,r1 /* Init PCB0 */ ! 123: mtpr r1,$PCBB /* Set PCBB to pcb0 */ ! 124: ! 125: movl _savvec0,PCB_KSP(r1) /* PCB_KSP = current SP */ ! 126: movl $-1,PCB_USP(r1) /* PCB_USP = -1 */ ! 127: movl $0,PCB_R0(r1) ! 128: movl $0x11111111,PCB_R1(r1) ! 129: movl $0x22222222,PCB_R2(r1) ! 130: movl $0x33333333,PCB_R3(r1) ! 131: movl $0x44444444,PCB_R4(r1) ! 132: movl $0x55555555,PCB_R5(r1) ! 133: movl $0x66666666,PCB_R6(r1) ! 134: movl $0x77777777,PCB_R7(r1) ! 135: movl $0x88888888,PCB_R8(r1) ! 136: movl $0x99999999,PCB_R9(r1) ! 137: movl $0xaaaaaaaa,PCB_R10(r1) ! 138: movl $0xbbbbbbbb,PCB_R11(r1) ! 139: movl $0xcccccccc,PCB_R12(r1) ! 140: movl $0xdddddddd,PCB_R13(r1) ! 141: movl $0x1a1a1a1a,PCB_ACCM(r1) /* set MS of fpp's acc. */ ! 142: movl $0x2b2b2b2b,PCB_ACCL(r1) /* set LS of fpp's acc. */ ! 143: ! 144: movab nxts,r5 ! 145: andl2 $0x3fffffff,r5 ! 146: movl r5,PCB_PC(r1) /* Set PCB_PC */ ! 147: movl $0x00100000,PCB_PSL(r1) /* PCB_IPL = 0x10; K mode; SGL Acc */ ! 148: movl $0x12121212,PCB_P0BR(r1) ! 149: movl $0x01212121,PCB_P0LR(r1) ! 150: movl $0x23232323,PCB_P1BR(r1) ! 151: movl $0x02323232,PCB_P1LR(r1) ! 152: movl $0x34343434,PCB_P2BR(r1) ! 153: movl $0x03434343,PCB_P2LR(r1) ! 154: movab s2msg1,_Errmsg ! 155: ldpctx /* Do load process context */ ! 156: rtnld: ! 157: cmpl r0,$0 /* Verify general registers */ ! 158: beql 1f ! 159: 2: movl $1,r0 /*error code = 1*/ ! 160: jmp *badrtn /*error- ldpctx did not load gen reg */ ! 161: ! 162: 1: movl $1,r0 /*error code = 1 for ldpctx & gen regs */ ! 163: cmpl r1,$0x11111111 ! 164: beql 1f ! 165: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 166: /*properly; PCBB = phys addr of _pcb0 */ ! 167: 1: cmpl r2,$0x22222222 ! 168: beql 1f ! 169: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 170: /*properly; PCBB = phys addr of _pcb0 */ ! 171: 1: cmpl r3,$0x33333333 ! 172: beql 1f ! 173: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 174: /*properly; PCBB = phys addr of _pcb0 */ ! 175: 1: cmpl r4,$0x44444444 ! 176: beql 1f ! 177: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 178: /*properly; PCBB = phys addr of _pcb0 */ ! 179: 1: cmpl r5,$0x55555555 ! 180: beql 1f ! 181: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 182: /*properly; PCBB = phys addr of _pcb0 */ ! 183: 1: cmpl r6,$0x66666666 ! 184: beql 1f ! 185: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 186: /*properly; PCBB = phys addr of _pcb0 */ ! 187: 1: cmpl r7,$0x77777777 ! 188: beql 1f ! 189: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 190: /*properly; PCBB = phys addr of _pcb0 */ ! 191: 1: cmpl r8,$0x88888888 ! 192: beql 1f ! 193: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 194: /*properly; PCBB = phys addr of _pcb0 */ ! 195: 1: cmpl r9,$0x99999999 ! 196: beql 1f ! 197: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 198: /*properly; PCBB = phys addr of _pcb0 */ ! 199: 1: cmpl r10,$0xaaaaaaaa ! 200: beql 1f ! 201: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 202: /*properly; PCBB = phys addr of _pcb0 */ ! 203: 1: cmpl r11,$0xbbbbbbbb ! 204: beql 1f ! 205: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 206: /*properly; PCBB = phys addr of _pcb0 */ ! 207: 1: cmpl r12,$0xcccccccc ! 208: beql 1f ! 209: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 210: /*properly; PCBB = phys addr of _pcb0 */ ! 211: 1: cmpl r13,$0xdddddddd ! 212: beql 1f ! 213: 2: jmp *badrtn /*error - ldpctx did not load gen reg */ ! 214: /*properly; PCBB = phys addr of _pcb0 */ ! 215: ! 216: #/* Check the single precision accumulator */ ! 217: 1: ! 218: stf r1 /* store the accumulator */ ! 219: movl $0x1a1a1a1a,r2 /* set the expected value */ ! 220: cmpl r1,r2 ! 221: beql 1f ! 222: movl $36,r0 /* ERROR!! r0 = 36 = error code */ ! 223: jmp *badrtn /*error - ldpctx did not load the Acc */ ! 224: ! 225: #/* Check Memory Management Registers */ ! 226: ! 227: 1: ! 228: movl $2,r0 /*r0 = 2 = errorcode */ ! 229: mfpr $P0BR,r1 ! 230: movl _pcb0+PCB_P0BR,r2 ! 231: cmpl r1,r2 ! 232: beql 1f ! 233: movl $P0BR,r3 /*r3 = reg no in error */ ! 234: jmp *badrtn /*ldpctx did not load memory mgmt */ ! 235: /*register properly; */ ! 236: /*r1 = observed; r2 = expected */ ! 237: 1: mfpr $P1BR,r1 ! 238: movl _pcb0+PCB_P1BR,r2 ! 239: cmpl r1,r2 ! 240: beql 1f ! 241: movl $P1BR,r3 /*r3 = reg no in error */ ! 242: jmp *badrtn /*ldpctx did not load memory mgmt */ ! 243: /*register properly; */ ! 244: /*r1 = observed; r2 = expected */ ! 245: 1: mfpr $P2BR,r1 ! 246: movl _pcb0+PCB_P2BR,r2 ! 247: cmpl r1,r2 ! 248: beql 1f ! 249: movl $P2BR,r3 /*r3 = reg no in error */ ! 250: jmp *badrtn /*ldpctx did not load memory mgmt */ ! 251: /*register properly; */ ! 252: /*r1 = observed; r2 = expected */ ! 253: 1: mfpr $P0LR,r1 ! 254: movl _pcb0+PCB_P0LR,r2 ! 255: cmpl r1,r2 ! 256: beql 1f ! 257: movl $P0LR,r3 /*r3 = reg no in error */ ! 258: jmp *badrtn /*ldpctx did not load memory mgmt */ ! 259: /*register properly; */ ! 260: /*r1 = observed; r2 = expected */ ! 261: 1: mfpr $P1LR,r1 ! 262: movl _pcb0+PCB_P1LR,r2 ! 263: cmpl r1,r2 ! 264: beql 1f ! 265: movl $P1LR,r3 /*r3 = reg no in error */ ! 266: jmp *badrtn /*ldpctx did not load memory mgmt */ ! 267: /*register properly; */ ! 268: /*r1 = observed; r2 = expected */ ! 269: 1: mfpr $P2LR,r1 ! 270: movl _pcb0+PCB_P2LR,r2 ! 271: cmpl r1,r2 ! 272: beql 1f ! 273: movl $P2LR,r3 /*r3 = reg no in error */ ! 274: jmp *badrtn /*ldpctx did not load memory mgmt */ ! 275: /*register properly; */ ! 276: /*r1 = observed; r2 = expected */ ! 277: # ! 278: # Check if SP loaded by LDPCTX correctly ! 279: # ! 280: 1: ! 281: movab (sp),r1 /* R1 = current SP */ ! 282: movl _pcb0+PCB_KSP,r2 /* R2 = expected SP from PCB0 */ ! 283: subl2 $8,r2 /* Decrement 2 lwords for PC,PSL */ ! 284: cmpl r2,r1 ! 285: beql 1f ! 286: 2: movl $3,r0 /*error code = r0 = 3 */ ! 287: jmp *badrtn /*sp not correct after ldpctx */ ! 288: /*r0 = 3 = error code */ ! 289: /*r1 = observed; r2 = expected */ ! 290: 1: ! 291: # ! 292: # Check PC, PSL put on stack by LDPCTX ! 293: # ! 294: movl r1,r4 /* R4 = SP */ ! 295: movl (r4),r1 /* R1 = PC from stack */ ! 296: movl _pcb0+PCB_PC,r2 /* R2 = expected PC from PCB0 */ ! 297: cmpl r1,r2 ! 298: beql 1f ! 299: movl $4,r0 /*error code = 4 */ ! 300: jmp *badrtn /*pc on the stack not loaded */ ! 301: /*properly by ldpctx; r1 = obs; r2 =exp */ ! 302: 1: addl2 $4,r4 ! 303: movl (r4),r1 /* R1 = PSL from stack */ ! 304: movl _pcb0+PCB_PSL,r2 /* R2 = expected PSL from PCB0 */ ! 305: cmpl r1,r2 ! 306: beql 1f ! 307: movl $5,r0 /*error code = 5 */ ! 308: jmp *badrtn /*psl on the stack not loaded */ ! 309: /*properly by ldpctx; r1 = obs; r2 =exp */ ! 310: 1: ! 311: # ! 312: # Check PSL_IS reset correctly when change SP from ISP to KSP ! 313: # by LDPCTX ! 314: # ! 315: movpsl r1 ! 316: andl2 $0x04000000,r1 ! 317: beql 1f ! 318: movl $6,r0 /*error code = r0 = 6 */ ! 319: movl $0,r2 ! 320: jmp *badrtn /*psl int stack should be turned off */ ! 321: /*by ldpctx; r1 = obs; r2 = exp */ ! 322: # ! 323: # Check if int. stack get saved in ISP by LDPCTX ! 324: 1: ! 325: movl _savvec1,r1 ! 326: andl2 $0x04000000,r1 /*if psl_is flag was on before ldpctx */ ! 327: beql 9f ! 328: mfpr $ISP,r1 /*then ckeck that int stack ptr was */ ! 329: movl _savvec0,r2 /*saved by ldpctx */ ! 330: cmpl r1,r2 ! 331: beql 9f ! 332: 2: movl $7,r0 /*error code = r0 = 7 */ ! 333: jmp *badrtn /*ldpctx did not save ISP */ ! 334: /*r1 = obs; r2 = exp */ ! 335: ! 336: #/* Check out save process context */ ! 337: #/* at this point, psl & pc are still on */ ! 338: #/* the stack. So svpctx can use it */ ! 339: ! 340: 9: ! 341: nxts: mtpr _savvec0,$ISP /* Init ISP = original SP */ ! 342: movab _pcb1,r6 ! 343: movl r6,r7 /* r7 = address of Pcb1 */ ! 344: mtpr r7,$PCBB /* Set PCBB = physical address PCB1 */ ! 345: movl $PCB_SIZE,r8 /* No of entries in PCB */ ! 346: 1: movl $0xabcdef01,(r6) /* Init all entries (26) in PCB1 */ ! 347: /* with pattern 0xabcdef01 */ ! 348: addl2 $4,r6 ! 349: decl r8 ! 350: bneq 1b ! 351: ! 352: movab (sp),r11 ! 353: movl (r11),_savvec7 /* Expected PC on the stack */ ! 354: movl 4(r11),_savvec8 /* Expected PSL on stack */ ! 355: ! 356: movl $0x3c3c3c3c,r0 ! 357: ldf r0 /* load the (single precision) accumulator */ ! 358: ! 359: movl $0,r0 /* Initialize general registers */ ! 360: movl $1,r1 ! 361: movl $2,r2 ! 362: movl $3,r3 ! 363: movl $4,r4 ! 364: movl $5,r5 ! 365: movl $6,r6 ! 366: movl $7,r7 ! 367: movl $8,r8 ! 368: movl $9,r9 ! 369: movl $10,r10 ! 370: movl $11,r11 ! 371: movl $12,r12 ! 372: movl $13,r13 ! 373: mtpr $HIGH,$IPL /* Set IPL = HIGH */ ! 374: movab s2msg2,_Errmsg ! 375: svpctx ! 376: ! 377: movpsl r1 /* check if PSL_IS is set after SVPCTX */ ! 378: andl2 $0x04000000,r1 ! 379: bneq 1f ! 380: 2: movl $0x04000000,r2 ! 381: movl $8,r0 ! 382: jmp *badrtn /* psl_is not set by svpctx; r0 = 8 */ ! 383: /* r1 = obs; r2 = exp */ ! 384: ! 385: 1: movab (sp),r1 /* Check if SP is switched to ISP after SVPCTX */ ! 386: mfpr $ISP,r2 ! 387: cmpl r1,r2 ! 388: beql 1f ! 389: 2: movl $9,r0 ! 390: jmp *badrtn /*sp not equal to ISP in svpctx; r0 = 9 */ ! 391: /*r1 = obs; r2 = exp */ ! 392: ! 393: 1: movab _pcb0,r7 ! 394: movab _pcb1,r8 ! 395: cmpl (r7),(r8) /* Check if SVPCTX save SP in PCB1_KSP */ ! 396: beql 1f ! 397: 2: movl (r8),r1 ! 398: movl (r7),r2 ! 399: movl $10,r0 ! 400: jmp *badrtn /*ksp saved by svpctx not correct; */ ! 401: /*r0 = 10; r1 = obs; r2 = exp */ ! 402: ! 403: #/* Make sure PCB_USP unchanged by SVPCTX */ ! 404: ! 405: 1: movl PCB_USP(r8),r1 ! 406: movl $0xabcdef01,r2 ! 407: cmpl r1,r2 ! 408: beql 1f ! 409: movl $35,r0 /* error code : 35; USP get changed in SVPCTX */ ! 410: jmp *badrtn ! 411: ! 412: #/* Verify that the floating point accumulator was saved correctly */ ! 413: 1: ! 414: movl PCB_ACCM(r8),r1 /* get the value saved */ ! 415: movl $0x3c3c3c3c,r2 /* get the expected value */ ! 416: cmpl r1,r2 ! 417: beql 1f /* branch if they match */ ! 418: movl $38,r0 /* Error code : 38; ACC was saved wrong */ ! 419: jmp *badrtn ! 420: ! 421: #/* Check if R0-R13 in PCB1 changed by SVPCTX */ ! 422: 1: ! 423: movl $2,r3 /* Start from PCB_R0 */ ! 424: addl2 $8,r8 /* R8 = address of pcb1_r0 */ ! 425: 2: ! 426: subl3 $2,r3,r2 /* R2 has expected value */ ! 427: cmpl r2,(r8) ! 428: bneq 2f ! 429: incl r3 ! 430: addl2 $4,r8 /* Next address in PCB */ ! 431: cmpl r3,$15 ! 432: bleq 2b ! 433: ! 434: brb 1f ! 435: 2: movl (r8),r1 ! 436: movl $11,r0 ! 437: jmp *badrtn /*r0 = 11; r1 = obs; r2 = exp; */ ! 438: /*r3 = pcb entry # in fault */ ! 439: 1: ! 440: cmpl _savvec7,(r8) /* Check if svpctx save PC correctly */ ! 441: beql 1f ! 442: movl (r8),r1 /* Actual data */ ! 443: movl _savvec7,r2 /* Expected data */ ! 444: movl $12,r0 /* error code */ ! 445: jmp *badrtn ! 446: 1: ! 447: addl2 $4,r8 /* Check PSL saved in pcb1 */ ! 448: cmpl _savvec8,(r8) /* Check if svpctx save PSL correctly */ ! 449: beql 1f ! 450: movl (r8),r1 /* Actual data */ ! 451: movl _savvec8,r2 /* Expected data */ ! 452: movl $13,r0 /* error code */ ! 453: jmp *badrtn ! 454: ! 455: # ! 456: # Now check LDPCTX with a double precision floating point accumulator ! 457: # ! 458: 1: ! 459: mtpr $HIGH,$IPL /* IPL = HIGH */ ! 460: bicpsw $0x3f /* Clear all flag */ ! 461: mtpr $0,$ISP /* Init ISP to 0 */ ! 462: movab _pcb0,r1 /* Init PCB0 */ ! 463: mtpr r1,$PCBB /* Set PCBB to pcb0 */ ! 464: movl _savvec0,PCB_KSP(r1) /* PCB_KSP = current SP */ ! 465: movl $-1,PCB_USP(r1) /* PCB_USP = -1 */ ! 466: movl $0x5e5e5e5e,PCB_ACCM(r1) /* set MS of fpp's acc. */ ! 467: movl $0x6f6f6f6f,PCB_ACCL(r1) /* set LS of fpp's acc. */ ! 468: movl $0x00100080,PCB_PSL(r1) /* PCB_IPL = 0x10; K mode; DBL Acc */ ! 469: clrl r0 ! 470: clrl r1 ! 471: ldd r0 /* load the DBL Acc w/ 0 */ ! 472: ldpctx /* load the process context */ ! 473: ! 474: std r2 /* save the accumulator */ ! 475: movl $0x5e5e5e5e,r4 ! 476: movl $0x6f6f6f6f,r5 ! 477: cmpl r2,r4 /* check the MS of the accumulator */ ! 478: bneq 2f /* branch if actual != expected */ ! 479: cmpl r3,r5 /* check the LS of the accumulator */ ! 480: beql 1f /* branch if good compare */ ! 481: 2: ! 482: movab s2msg1,_Errmsg /* LDPCTX failed */ ! 483: movl $37,r0 /* Error code 37 -bad dbl Acc saved */ ! 484: movl r2,r1 /* move the data into */ ! 485: movl r3,r2 /* registers 1 - 4 */ ! 486: movl r4,r3 /* for the */ ! 487: movl r5,r4 /* error halt */ ! 488: jmp *badrtn /* report the error */ ! 489: ! 490: # ! 491: # Now check SVPCTX with a double precision floating point accumulator ! 492: # ! 493: 1: ! 494: mtpr _savvec0,$ISP /* Init ISP = original SP */ ! 495: movab _pcb1,r6 ! 496: movl r6,r7 /* r7 = address of Pcb1 */ ! 497: mtpr r7,$PCBB /* Set PCBB = physical address PCB1 */ ! 498: movl $PCB_SIZE,r8 /* No of entries in PCB */ ! 499: 1: movl $0xabcdef01,(r6) /* Init all entries (26) in PCB1 */ ! 500: /* with pattern 0xabcdef01 */ ! 501: addl2 $4,r6 ! 502: decl r8 ! 503: bneq 1b ! 504: ! 505: movl $0xabcdabcd,r0 /* set the data to load into */ ! 506: movl $0x12341234,r1 /* the fpp's accumulator */ ! 507: ldd r0 /* load the DBL fpp Accumulator */ ! 508: orl2 $0x80,4(sp) /* set the DBL bit in stack's PSL */ ! 509: movl 4(sp),_savvec4 /* save the stack's PSL */ ! 510: ! 511: mtpr $HIGH,$IPL /* Set IPL = HIGH */ ! 512: movab s2msg2,_Errmsg ! 513: svpctx /* save the context */ ! 514: ! 515: #/* Check the saved double precision floating point accumulator */ ! 516: ldf $0 /* (REI code expects a sgl Acc) */ ! 517: movab _pcb1,r6 /* get the PCB address */ ! 518: movl PCB_ACCM(r6),r1 /* get the saved accumulator */ ! 519: movl PCB_ACCL(r6),r2 /* data values */ ! 520: movl $0xabcdabcd,r3 /* get the expected accumulator */ ! 521: movl $0x12341234,r4 /* data values */ ! 522: ! 523: cmpl r1,r3 /* check the MS data saved */ ! 524: bneq 2f /* branch if compare error */ ! 525: cmpl r2,r4 /* check the LS data saved */ ! 526: beql 1f /* branch if no compare errors */ ! 527: 2: ! 528: movab s2msg2,_Errmsg /* SVPCTX failed */ ! 529: movl $39,r0 /* Error 39 -bad dbl acc saved */ ! 530: jmp *badrtn /* report the error */ ! 531: ! 532: #/* Check the saved PSL to verify that the fpp DBL accumulator bit is set */ ! 533: 1: ! 534: movl PCB_PSL(r6),r1 /* get the saved PSL value */ ! 535: movl _savvec4,r2 /* get the expected PSL value */ ! 536: cmpl r1,r2 /* compare the PSL values */ ! 537: beql 1f /* branch if no error */ ! 538: movl $13,r0 /* Error code 13 -bad PSL */ ! 539: jmp *badrtn /* report the error */ ! 540: ! 541: # ! 542: # REI instruction test ! 543: # PSL should have PSL_IS = 1,PSL_MODE = 0,PSL_IPL = 31 ! 544: # ! 545: 1: ! 546: movab s2msg3,_Errmsg ! 547: movpsl r1 ! 548: andl2 $0x051f0000,r1 /* Check to make sure Tahoe in proper */ ! 549: cmpl $0x041f0000,r1 /* state to check out REI ; PSL_IS = 1 */ ! 550: beql 1f /* PSL_MODE = Kernel; PSL_IPL = 0x1f */ ! 551: 2: movl $0x051f0000,r2 ! 552: movl $13,r0 ! 553: jmp *badrtn /*psl not equal to expected; */ ! 554: 1: ! 555: # REI K mode to K mode; is = 1; ipl =1d ! 556: # movl $0,*$HSR /* set HISR in PSA to 0 */ ! 557: ! 558: movl $0,*$SSR /* set SISR in PSA to 0 */ ! 559: mtpr $0,$ISP /* ISP == 0 */ ! 560: movab _pcb0,r1 /* Set PCBB to pcb0 */ ! 561: mtpr r1,$PCBB ! 562: ! 563: movl $0,_pcb0+PCB_KSP /* PCB_KSP = PCB_USP = 0 */ ! 564: movl $0,_pcb0+PCB_USP ! 565: movl $0x041d0000,-(sp) /* Set PSL,PC on stack for next REI */ ! 566: /* REI to K mode and IPL == 0x1d */ ! 567: movab rei1,r3 ! 568: movab 1f,-(sp) ! 569: rei1: ! 570: rei ! 571: movl $14,r0 /* R0 = 14; rei fell thru */ ! 572: jmp *badrtn ! 573: 1: ! 574: movpsl r1 /* If rei works, this is where it comes */ ! 575: movl $0x041d0000,r2 ! 576: cmpl r1,r2 /* Check if PSL loaded correctly */ ! 577: beql 1f ! 578: movl $15,r0 ! 579: jmp *badrtn /*rei did not load psl form the stack */ ! 580: 1: ! 581: movab (sp),r1 /*check sp = original sp */ ! 582: movl _savvec0,r2 ! 583: cmpl r1,r2 ! 584: beql 1f ! 585: movl $16,r0 /*r0 = 16 = error code */ ! 586: jmp *badrtn /*sp is incorrect after rei */ ! 587: 1: ! 588: mfpr $ISP,r1 ! 589: cmpl r1,r2 ! 590: beql 1f ! 591: movl $17,r0 /*error code = r0 = 17 */ ! 592: jmp *badrtn /*sp was not saved by rei into ISP */ ! 593: /*when is was ON; r1= obs; r2= exp */ ! 594: # ! 595: # REI K mode to K mode; is =0; ipl = 1d ! 596: 1: ! 597: subl3 $16,r2,_pcb0 /* set PCB_KSP to SP-16 */ ! 598: subl3 $24,r2,_pcb0+PCB_USP /* Set PCB_USP to SP-24 */ ! 599: mtpr $0,$ISP ! 600: pushl $0x001d0000 /* Set up PSL,PC on stack for REI */ ! 601: pushab 1f /* PSL_IS = 0; PSL_IPL = 1d; K mode */ ! 602: movab rei2,r3 ! 603: rei2: ! 604: rei ! 605: movl $14,r0 /* REI fell thru */ ! 606: jmp *badrtn ! 607: 1: ! 608: mfpr $ISP,r1 ! 609: movl _savvec0,r2 ! 610: cmpl r1,r2 ! 611: beql 1f ! 612: movl $17,r0 ! 613: jmp *badrtn /*sp not saved correctly into ISP */ ! 614: 1: ! 615: movpsl r1 ! 616: andl2 $0xffffff00,r1 ! 617: movl $0x001d0000,r2 ! 618: cmpl r1,r2 ! 619: beql 1f ! 620: movl $15,r0 /*error code = r0 = 19 */ ! 621: jmp *badrtn /*psl not loaded correctly by rei */ ! 622: 1: ! 623: movab (sp),r1 ! 624: mfpr $KSP,r2 ! 625: cmpl r1,r2 ! 626: beql 1f ! 627: movl $16,r0 /*error code = r0 = 20 */ ! 628: jmp *badrtn /*KSP was not loaded into sp by rei */ ! 629: # ! 630: # interrupt test - to see that REI handles pending interrupts ! 631: # in SISR, HISR properly. REI to process has IPL 1b ! 632: # ** HISR has pending int. at IPL#14 ! 633: # ** SISR = bit 7 & 2 ON ! 634: # ! 635: 1: ! 636: movl $0x140004,*$HSR /* Set HISR : pending console transmit */ ! 637: /* interrupt at IPL#0x14 */ ! 638: movl $0x82,*$SSR /* Set SISR : pending IPL#7, IPL#2 */ ! 639: ! 640: movl _scb+44,_savvec4 /* Save int vector for console trans int. */ ! 641: movl _scb+SIVEC1-24,_savvec6 /* Save int vector for IPL# 7 */ ! 642: movab hs14,_scb+44 /* New vector for HISR #0x14 */ ! 643: movab ss7,_scb+SIVEC1-24 /* New vector soft int. #7 */ ! 644: brw 1f ! 645: # ! 646: # ************** ! 647: # ! 648: .align 2 ! 649: hs14: /* Handler for HISR #0x14 */ ! 650: movl $18,r0 ! 651: jmp *badrtn /* Rei took pending int. in HISR #0x14 when */ ! 652: /* PSL_IPL was #1b */ ! 653: # ! 654: # ! 655: .align 2 ! 656: ss7: /* Handler for software int. #7 */ ! 657: movl $19,r0 ! 658: jmp *badrtn /* REI took pending software int.#7 when */ ! 659: /* PSL_IPL was > 7 */ ! 660: # ! 661: # *************** ! 662: # ! 663: 1: ! 664: movl $0x001b0000,-(sp) /* Set up PSL, PC for REI */ ! 665: movab 1f,r0 /* PSL_IPL = 0x1b */ ! 666: andl2 $0x3fffffff,r0 ! 667: movl r0,-(sp) /* PSL_MODE = K, PSL_IPL = 1b, */ ! 668: movab rei3,r3 ! 669: rei3: ! 670: rei /* This REI should not take any pending int. */ ! 671: movl $14,r0 /* error : REI fell thru */ ! 672: jmp *badrtn ! 673: # ! 674: # now REI again to IPL 0x13 so pending interrupt in ! 675: # HISR at IPL#14 should be taken by REI ! 676: 1: ! 677: movab hsr_hdl,_scb+44 /* Set new vector for IPL#14 */ ! 678: pushl $0x00130000 /* Set up PSL,PC for REI */ ! 679: pushab 9f ! 680: movab rei4,r3 ! 681: rei4: ! 682: rei /* Should take pending hardware int. #0x14 */ ! 683: movl $14,r0 /* error : REI fell thru */ ! 684: jmp *badrtn ! 685: 9: ! 686: movl $20,r0 ! 687: jmp *badrtn /* REI did not take pending interrupt */ ! 688: /* with IPL #14 > PSL_IPL #13; */ ! 689: /* r0 = 23 = errorcode */ ! 690: # ! 691: # Handler for hardware int. 0x14 ! 692: # ! 693: .align 2 ! 694: hsr_hdl: /* This is where REI should come */ ! 695: mfpr $HISR,r1 /* check if HISR is reset to 0 */ ! 696: clrl r2 ! 697: cmpl r1,r2 ! 698: beql 1f ! 699: movl $21,r0 ! 700: jmp *badrtn /* Rei did not reset HISR after taking */ ! 701: /* pending int in HISR. */ ! 702: 1: ! 703: movpsl r1 ! 704: andl2 $0xffffff00,r1 ! 705: movl $0x04140000,r2 /* Expected current PSL */ ! 706: cmpl r1,r2 ! 707: beql 1f ! 708: movl $22,r0 ! 709: jmp *badrtn /* Rei did not set current PSL corectly */ ! 710: # ! 711: # check if SP is switched to ISP ! 712: # ! 713: 1: ! 714: movab (sp),r1 /* check if current SP = (ISP-8) */ ! 715: mfpr $ISP,r2 ! 716: subl2 $8,r2 ! 717: cmpl r1,r2 ! 718: beql 1f ! 719: movl $23,r0 /* SP error after taking pending */ ! 720: jmp *badrtn /* interrupt in HISR */ ! 721: 1: ! 722: movl (sp)+,r1 /* Check pc & psl are still on the stack */ ! 723: movab 9b,r2 ! 724: cmpl r1,r2 ! 725: beql 1f ! 726: movl $24,r0 ! 727: jmp *badrtn /* Rei or micro int handler did not leave */ ! 728: /* correct value of pc (one before rei */ ! 729: /* was executed) on the stack. */ ! 730: 1: movl (sp)+,r1 ! 731: movl $0x00130000,r2 ! 732: cmpl r1,r2 ! 733: beql 1f ! 734: movl $25,r0 ! 735: jmp *badrtn /* Rei or micro int handler did not leave*/ ! 736: /* correct value of psl (one before rei */ ! 737: /* was executed) on the stack. */ ! 738: ! 739: 1: movl _savvec4,_scb+44 /*restore vector for ipl#14, */ ! 740: movab sw7,_scb+96 /*new vector for ipl #7 */ ! 741: pushl $0x00060000 /* Now set up to REI again to IPL#6, so it */ ! 742: pushab 1f /* should take pending software int. #7 */ ! 743: movab rei5,r3 ! 744: rei5: ! 745: rei ! 746: movl $14,r0 /* REI fell thru */ ! 747: jmp *badrtn ! 748: 1: ! 749: movl $26,r0 ! 750: jmp *badrtn /* Rei did not take interrupt at IPL#7 */ ! 751: # ! 752: # Handler for software int. # 7 ! 753: # ! 754: .align 2 ! 755: sw7: /* This is where REI comes */ ! 756: mfpr $SISR,r1 /* Check SISR = 0x02 */ ! 757: movl $2,r2 ! 758: cmpl r1,r2 ! 759: beql 1f ! 760: movl $27,r0 ! 761: jmp *badrtn /* REI did not reset SISR */ ! 762: 1: ! 763: movl $0,*$SSR /* SISR = 0 */ ! 764: movpsl r1 ! 765: andl2 $0xffffff00,r1 /* Mask out arithmetic flags */ ! 766: movl $0x04070000,r2 ! 767: cmpl r1,r2 ! 768: beql 1f ! 769: movl $28,r0 ! 770: jmp *badrtn /* Current psl not set right */ ! 771: /* by rei or micro int handler */ ! 772: # ! 773: # REI from KERNEL to USER ! 774: # ! 775: 1: mtpr $31,$IPL ! 776: movl _savvec6,_scb+SIVEC1-24 /*restore original vector for */ ! 777: /*ipl #7 */ ! 778: movl _savvec0,sp ! 779: pushl $0x1000000 /* Set up to REI to user, IPL = 0, IS = 0 */ ! 780: pushab 1f ! 781: mtpr $0,$ISP /* Set ISP to 0 */ ! 782: movab rei6,r3 ! 783: rei6: ! 784: rei ! 785: movl $14,r0 ! 786: jmp *badrtn ! 787: # ! 788: # Now running in user mode ! 789: # ! 790: 1: ! 791: movpsl r1 /*check psl = 0x01000000 */ ! 792: movl $0x1000000,r2 ! 793: cmpl r1,r2 ! 794: beql 1f ! 795: movl $29,r0 ! 796: jmp *badrtn /*psl not set right by rei */ ! 797: 1: ! 798: movab (sp),r1 /*check sp = USP */ ! 799: movl _pcb0+PCB_USP,r2 ! 800: cmpl r1,r2 ! 801: beql 1f ! 802: movl $30,r0 ! 803: jmp *badrtn /*sp not set to USP when mode = U*/ ! 804: 1: ! 805: movl *$INTSP,r1 /* This is tricky; User get ISP from PSA */ ! 806: movl _savvec0,r2 ! 807: cmpl r1,r2 ! 808: beql 1f ! 809: movl $31,r0 ! 810: jmp *badrtn /* Rei did not save sp into ISP */ ! 811: /* when psl_is was ON */ ! 812: # ! 813: # REI from USER to USER ! 814: # still running in user mode ! 815: # ! 816: 1: ! 817: movl _savvec0,sp ! 818: pushl $0x1000000 /* Set up to REI to another user */ ! 819: pushab 1f ! 820: movab rei7,r3 ! 821: rei7: ! 822: rei ! 823: movl $14,r0 ! 824: jmp *badrtn ! 825: 1: ! 826: movpsl r1 /*check psl = 0x01000000 */ ! 827: movl $0x1000000,r2 ! 828: cmpl r1,r2 ! 829: beql 1f ! 830: movl $32,r0 ! 831: jmp *badrtn /*psl not set right by rei */ ! 832: 1: ! 833: movab (sp),r1 /*check sp = USP */ ! 834: movl _pcb0+PCB_USP,r2 ! 835: cmpl r1,r2 ! 836: beql 1f ! 837: movl $33,r0 ! 838: jmp *badrtn /*sp not set to USP when mode = U*/ ! 839: 1: ! 840: movl $2,*$SSR /* This is cheating : Set SISR */ ! 841: movl _scb+SIVEC1,r4 /* directly in PSA */ ! 842: movab sw2,_scb+SIVEC1 /* New handler for software int.#2 */ ! 843: pushl $0x01000000 /* Set PSL,PC to REI to user ipl0 */ ! 844: pushab 1f ! 845: movab rei8,r3 ! 846: rei8: ! 847: rei /* Use REI with pending int #2 in SISR to get back */ ! 848: movl $14,r0 ! 849: jmp *badrtn /* to Kernel mode; Can also use a halt */ ! 850: 1: ! 851: movl $34,r0 ! 852: jmp *badrtn ! 853: # ! 854: # ! 855: .align 2 ! 856: sw2: ! 857: movl r4,_scb+SIVEC1 ! 858: mtpr $31,$IPL ! 859: movl (sp)+,r0 ! 860: movl (sp)+,r0 ! 861: movl _savvec0,sp /* Original SP */ ! 862: movl _savvec2,fp ! 863: ret ! 864: # ! 865: # ! 866: .data 1 ! 867: s2msg1: ! 868: .ascii "LDPCTX failed \0" ! 869: s2msg2: ! 870: .ascii "SVPCTX failed \0" ! 871: s2msg3: ! 872: .ascii "REI failed \0"
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