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1.1 root 1: #
2: # Privileged instructions tests
3:
4: # LDPCTX : load process context
5: # SVPCTX : save process context
6: # REI : return from interrupt
7: #
8: # R0 = error codes
9: # 1 : LDPCTX fail to load general registers
10: # 2 : LDPCTX fail to load Memory Management Regsiters
11: # r3 = reg. no of register in error
12: # r1 = actual value
13: # r2 = expected value
14: # 3 : SP not loaded correctly by LDPCTX
15: # 4 : LDPCTX did not put PC correctly on stack
16: # 5 : LDPCTX did not put PSL correctly on stack
17: # 6 : PSL_IS is not reset when LDPCTX from ISP to KSP
18: # 7 : Interrupt stack is not saved when LDPCTX from ISP to KSP
19: # 8 : PSL_IS is not set when SVPCTX executed
20: # 9 : Stack is not switched to ISP after SVPCTX executed
21: # 10 : SP is not saved in PCB_KSP correctly by SVPCTX
22: # 11 : SVPCTX did not saved general registers correctly.
23: # R3 = PCB entry no in error
24: # R1 = actual value
25: # R2 = expected value
26: # 12 : SVPCTX did not saved PC correctly.
27: # R1 = actual value
28: # R2 = expected value
29: # 13 : SVPCTX did not saved PSL correctly.
30: # R1 = actual value
31: # R2 = expected value
32: # 14 : REI fell thru to next instruction...
33: # R3 = address of REI instruction
34: # 15 : PSL not loaded correctly by REI
35: # R1 = actual, R2 = expected
36: # R3 = address of REI instruction
37: # 16 : SP not loaded correctly by REI
38: # R1 = actual, R2 = expected
39: # R3 = address of REI instruction
40: # 17 : SP was not saved into ISP when REI with PSL_IS = 1
41: # R1 = actual, R2 = expected
42: # R3 = address of REI instruction
43: # 18 : REI took pending interrupt IPL#14 in HISR while PSL_IPL was 1b
44: # R3 = address of REI instruction
45: # 19 : REI took pending interrupt IPL#7 in SISR while PSL_IPL was 1b
46: # R3 = address of REI instruction
47: # 20 : REI did not take pending interrupt IPL#0x14 in HISR while
48: # PSL_IPL was 0x13
49: # R3 = address of REI instruction
50: # 21 : REI did not clear bit in HISR corresponding to IPL#14 after
51: # taking the pending interrupt
52: # R1 = actual, R2 = expected
53: # R3 = address of REI instruction
54: # 22 : REI did not set current PSL correctly after taking the pending
55: # interrupt IPL#14 in HISR
56: # R1 = actual, R2 = expected
57: # R3 = address of REI instruction
58: # 23 : SP error after taking pending interrupt in HISR at IPL#0x14
59: # R1 = actual, R2 = expected
60: # R3 = address of REI instruction
61: # 24 : REI did not leave correct PC on the stack after taking pending
62: # interrupt in HISR #0x14
63: # R1 = actual, R2 = expected
64: # R3 = address of REI instruction
65: # 25 : REI did not leave correct PSL on the stack after taking pending
66: # interrupt in HISR #0x14
67: # R1 = actual, R2 = expected
68: # R3 = address of REI instruction
69: # 26 : REI did not take pending interrupt IPL#7 in SISR while
70: # REI to IPL #6
71: # R3 = address of REI instruction
72: # 27 : REI did not clear bit in SISR corresponding to IPL#7 after
73: # taking the pending interrupt
74: # R1 = actual, R2 = expected
75: # R3 = address of REI instruction
76: # 28 : REI did not set current PSL correctly after taking the pending
77: # interrupt IPL#7 in SISR
78: # R1 = actual, R2 = expected
79: # R3 = address of REI instruction
80: # 29 : PSL does not have correct mode after REI from Kernel to User
81: # R1 = actual, R2 = expected
82: # R3 = address of REI instruction
83: # 30 : SP is not loaded from PCB_USP after REI from Kernel to User
84: # R1 = actual, R2 = expected
85: # R3 = address of REI instruction
86: # 31 : Previous SP is not saved into ISP after REI from Kernel
87: # to User with previous PSL_IS = 1
88: # R1 = actual, R2 = expected
89: # R3 = address of REI instruction
90: # 32 : PSL does not have correct mode after REI from User to User
91: # R1 = actual, R2 = expected
92: # R3 = address of REI instruction
93: # 33 : SP is not loaded from PCB_USP after REI from User to User
94: # R1 = actual, R2 = expected
95: # R3 = address of REI instruction
96: # 34 : REI did not take pending software int. #2 while REI to IPL 0
97: # R3 = address of REI instruction
98: # 35 : PCB_USP is not supposed to change by SVPCTX but it is.
99: # 36 : LDPCTX did not load the single precision floating point
100: # accumulator correctly.
101: # R1 = actual, R2 = expected
102: # 37 : LDPCTX did not load the double precision floating point
103: # accumulator correctly.
104: # R1 / R2 = actual, R3 / R4 = expected
105: # 38 : SVPCTX did not save the single precision floating point
106: # accumulator correctly.
107: # R1 = actual, R2 = expected
108: # 39 : SVPCTX did not save the double precision floating point
109: # accumulator correctly.
110: # R1 / R2 = actual, R3 / R4 = expected
111: #
112: .globl _prvinstr
113: _prvinstr:
114: .word 0x1fff
115: mtpr $HIGH,$IPL /* IPL = HIGH */
116: bicpsw $0x3f /* Clear all flag */
117: movab (sp),_savvec0 /* Save current SP */
118: movpsl _savvec1 /* Save current PSL */
119: movl fp,_savvec2 /* Save current FP */
1.1.1.2 ! root 120: mfpr $KSP,_savvec9 /* Save kernal stack pointer */
! 121: mfpr $USP,_savveca /* Save user stack pointer */
1.1 root 122:
123: mtpr $0,$ISP /* Init ISP to 0 */
124: movab _pcb0,r1 /* Init PCB0 */
125: mtpr r1,$PCBB /* Set PCBB to pcb0 */
126:
1.1.1.2 ! root 127: movl _savvec9,PCB_KSP(r1) /* PCB_KSP = saved value of KSP */
! 128: movl _savveca,PCB_USP(r1) /* PCB_USP = -1 */
1.1 root 129: movl $0,PCB_R0(r1)
130: movl $0x11111111,PCB_R1(r1)
131: movl $0x22222222,PCB_R2(r1)
132: movl $0x33333333,PCB_R3(r1)
133: movl $0x44444444,PCB_R4(r1)
134: movl $0x55555555,PCB_R5(r1)
135: movl $0x66666666,PCB_R6(r1)
136: movl $0x77777777,PCB_R7(r1)
137: movl $0x88888888,PCB_R8(r1)
138: movl $0x99999999,PCB_R9(r1)
139: movl $0xaaaaaaaa,PCB_R10(r1)
140: movl $0xbbbbbbbb,PCB_R11(r1)
141: movl $0xcccccccc,PCB_R12(r1)
142: movl $0xdddddddd,PCB_R13(r1)
143: movl $0x1a1a1a1a,PCB_ACCM(r1) /* set MS of fpp's acc. */
144: movl $0x2b2b2b2b,PCB_ACCL(r1) /* set LS of fpp's acc. */
145:
146: movab nxts,r5
147: andl2 $0x3fffffff,r5
148: movl r5,PCB_PC(r1) /* Set PCB_PC */
149: movl $0x00100000,PCB_PSL(r1) /* PCB_IPL = 0x10; K mode; SGL Acc */
150: movl $0x12121212,PCB_P0BR(r1)
151: movl $0x01212121,PCB_P0LR(r1)
152: movl $0x23232323,PCB_P1BR(r1)
153: movl $0x02323232,PCB_P1LR(r1)
154: movl $0x34343434,PCB_P2BR(r1)
155: movl $0x03434343,PCB_P2LR(r1)
156: movab s2msg1,_Errmsg
157: ldpctx /* Do load process context */
158: rtnld:
159: cmpl r0,$0 /* Verify general registers */
160: beql 1f
161: 2: movl $1,r0 /*error code = 1*/
162: jmp *badrtn /*error- ldpctx did not load gen reg */
163:
164: 1: movl $1,r0 /*error code = 1 for ldpctx & gen regs */
165: cmpl r1,$0x11111111
166: beql 1f
167: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
168: /*properly; PCBB = phys addr of _pcb0 */
169: 1: cmpl r2,$0x22222222
170: beql 1f
171: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
172: /*properly; PCBB = phys addr of _pcb0 */
173: 1: cmpl r3,$0x33333333
174: beql 1f
175: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
176: /*properly; PCBB = phys addr of _pcb0 */
177: 1: cmpl r4,$0x44444444
178: beql 1f
179: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
180: /*properly; PCBB = phys addr of _pcb0 */
181: 1: cmpl r5,$0x55555555
182: beql 1f
183: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
184: /*properly; PCBB = phys addr of _pcb0 */
185: 1: cmpl r6,$0x66666666
186: beql 1f
187: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
188: /*properly; PCBB = phys addr of _pcb0 */
189: 1: cmpl r7,$0x77777777
190: beql 1f
191: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
192: /*properly; PCBB = phys addr of _pcb0 */
193: 1: cmpl r8,$0x88888888
194: beql 1f
195: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
196: /*properly; PCBB = phys addr of _pcb0 */
197: 1: cmpl r9,$0x99999999
198: beql 1f
199: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
200: /*properly; PCBB = phys addr of _pcb0 */
201: 1: cmpl r10,$0xaaaaaaaa
202: beql 1f
203: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
204: /*properly; PCBB = phys addr of _pcb0 */
205: 1: cmpl r11,$0xbbbbbbbb
206: beql 1f
207: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
208: /*properly; PCBB = phys addr of _pcb0 */
209: 1: cmpl r12,$0xcccccccc
210: beql 1f
211: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
212: /*properly; PCBB = phys addr of _pcb0 */
213: 1: cmpl r13,$0xdddddddd
214: beql 1f
215: 2: jmp *badrtn /*error - ldpctx did not load gen reg */
216: /*properly; PCBB = phys addr of _pcb0 */
217:
218: #/* Check the single precision accumulator */
219: 1:
220: stf r1 /* store the accumulator */
221: movl $0x1a1a1a1a,r2 /* set the expected value */
222: cmpl r1,r2
223: beql 1f
224: movl $36,r0 /* ERROR!! r0 = 36 = error code */
225: jmp *badrtn /*error - ldpctx did not load the Acc */
226:
227: #/* Check Memory Management Registers */
228:
229: 1:
230: movl $2,r0 /*r0 = 2 = errorcode */
231: mfpr $P0BR,r1
232: movl _pcb0+PCB_P0BR,r2
233: cmpl r1,r2
234: beql 1f
235: movl $P0BR,r3 /*r3 = reg no in error */
236: jmp *badrtn /*ldpctx did not load memory mgmt */
237: /*register properly; */
238: /*r1 = observed; r2 = expected */
239: 1: mfpr $P1BR,r1
240: movl _pcb0+PCB_P1BR,r2
241: cmpl r1,r2
242: beql 1f
243: movl $P1BR,r3 /*r3 = reg no in error */
244: jmp *badrtn /*ldpctx did not load memory mgmt */
245: /*register properly; */
246: /*r1 = observed; r2 = expected */
247: 1: mfpr $P2BR,r1
248: movl _pcb0+PCB_P2BR,r2
249: cmpl r1,r2
250: beql 1f
251: movl $P2BR,r3 /*r3 = reg no in error */
252: jmp *badrtn /*ldpctx did not load memory mgmt */
253: /*register properly; */
254: /*r1 = observed; r2 = expected */
255: 1: mfpr $P0LR,r1
256: movl _pcb0+PCB_P0LR,r2
257: cmpl r1,r2
258: beql 1f
259: movl $P0LR,r3 /*r3 = reg no in error */
260: jmp *badrtn /*ldpctx did not load memory mgmt */
261: /*register properly; */
262: /*r1 = observed; r2 = expected */
263: 1: mfpr $P1LR,r1
264: movl _pcb0+PCB_P1LR,r2
265: cmpl r1,r2
266: beql 1f
267: movl $P1LR,r3 /*r3 = reg no in error */
268: jmp *badrtn /*ldpctx did not load memory mgmt */
269: /*register properly; */
270: /*r1 = observed; r2 = expected */
271: 1: mfpr $P2LR,r1
272: movl _pcb0+PCB_P2LR,r2
273: cmpl r1,r2
274: beql 1f
275: movl $P2LR,r3 /*r3 = reg no in error */
276: jmp *badrtn /*ldpctx did not load memory mgmt */
277: /*register properly; */
278: /*r1 = observed; r2 = expected */
279: #
280: # Check if SP loaded by LDPCTX correctly
281: #
282: 1:
283: movab (sp),r1 /* R1 = current SP */
284: movl _pcb0+PCB_KSP,r2 /* R2 = expected SP from PCB0 */
285: subl2 $8,r2 /* Decrement 2 lwords for PC,PSL */
286: cmpl r2,r1
287: beql 1f
288: 2: movl $3,r0 /*error code = r0 = 3 */
289: jmp *badrtn /*sp not correct after ldpctx */
290: /*r0 = 3 = error code */
291: /*r1 = observed; r2 = expected */
292: 1:
293: #
294: # Check PC, PSL put on stack by LDPCTX
295: #
296: movl r1,r4 /* R4 = SP */
297: movl (r4),r1 /* R1 = PC from stack */
298: movl _pcb0+PCB_PC,r2 /* R2 = expected PC from PCB0 */
299: cmpl r1,r2
300: beql 1f
301: movl $4,r0 /*error code = 4 */
302: jmp *badrtn /*pc on the stack not loaded */
303: /*properly by ldpctx; r1 = obs; r2 =exp */
304: 1: addl2 $4,r4
305: movl (r4),r1 /* R1 = PSL from stack */
306: movl _pcb0+PCB_PSL,r2 /* R2 = expected PSL from PCB0 */
307: cmpl r1,r2
308: beql 1f
309: movl $5,r0 /*error code = 5 */
310: jmp *badrtn /*psl on the stack not loaded */
311: /*properly by ldpctx; r1 = obs; r2 =exp */
312: 1:
313: #
314: # Check PSL_IS reset correctly when change SP from ISP to KSP
315: # by LDPCTX
316: #
317: movpsl r1
318: andl2 $0x04000000,r1
319: beql 1f
320: movl $6,r0 /*error code = r0 = 6 */
321: movl $0,r2
322: jmp *badrtn /*psl int stack should be turned off */
323: /*by ldpctx; r1 = obs; r2 = exp */
324: #
325: # Check if int. stack get saved in ISP by LDPCTX
326: 1:
327: movl _savvec1,r1
328: andl2 $0x04000000,r1 /*if psl_is flag was on before ldpctx */
329: beql 9f
330: mfpr $ISP,r1 /*then ckeck that int stack ptr was */
331: movl _savvec0,r2 /*saved by ldpctx */
332: cmpl r1,r2
333: beql 9f
334: 2: movl $7,r0 /*error code = r0 = 7 */
335: jmp *badrtn /*ldpctx did not save ISP */
336: /*r1 = obs; r2 = exp */
337:
338: #/* Check out save process context */
339: #/* at this point, psl & pc are still on */
340: #/* the stack. So svpctx can use it */
341:
342: 9:
1.1.1.2 ! root 343: nxts: mtpr _savvec0,$ISP /* Init ISP = original ISP */
! 344: mtpr _savvec9,$KSP /* Init KSP = original KSP */
! 345: mtpr _savveca,$USP /* Init USP = original USP */
1.1 root 346: movab _pcb1,r6
347: movl r6,r7 /* r7 = address of Pcb1 */
348: mtpr r7,$PCBB /* Set PCBB = physical address PCB1 */
349: movl $PCB_SIZE,r8 /* No of entries in PCB */
350: 1: movl $0xabcdef01,(r6) /* Init all entries (26) in PCB1 */
351: /* with pattern 0xabcdef01 */
352: addl2 $4,r6
353: decl r8
354: bneq 1b
355:
356: movab (sp),r11
357: movl (r11),_savvec7 /* Expected PC on the stack */
358: movl 4(r11),_savvec8 /* Expected PSL on stack */
359:
360: movl $0x3c3c3c3c,r0
361: ldf r0 /* load the (single precision) accumulator */
362:
363: movl $0,r0 /* Initialize general registers */
364: movl $1,r1
365: movl $2,r2
366: movl $3,r3
367: movl $4,r4
368: movl $5,r5
369: movl $6,r6
370: movl $7,r7
371: movl $8,r8
372: movl $9,r9
373: movl $10,r10
374: movl $11,r11
375: movl $12,r12
376: movl $13,r13
377: mtpr $HIGH,$IPL /* Set IPL = HIGH */
378: movab s2msg2,_Errmsg
379: svpctx
380:
381: movpsl r1 /* check if PSL_IS is set after SVPCTX */
382: andl2 $0x04000000,r1
383: bneq 1f
384: 2: movl $0x04000000,r2
385: movl $8,r0
386: jmp *badrtn /* psl_is not set by svpctx; r0 = 8 */
387: /* r1 = obs; r2 = exp */
388:
389: 1: movab (sp),r1 /* Check if SP is switched to ISP after SVPCTX */
390: mfpr $ISP,r2
391: cmpl r1,r2
392: beql 1f
393: 2: movl $9,r0
394: jmp *badrtn /*sp not equal to ISP in svpctx; r0 = 9 */
395: /*r1 = obs; r2 = exp */
396:
397: 1: movab _pcb0,r7
398: movab _pcb1,r8
399: cmpl (r7),(r8) /* Check if SVPCTX save SP in PCB1_KSP */
400: beql 1f
401: 2: movl (r8),r1
402: movl (r7),r2
403: movl $10,r0
404: jmp *badrtn /*ksp saved by svpctx not correct; */
405: /*r0 = 10; r1 = obs; r2 = exp */
406:
407: #/* Make sure PCB_USP unchanged by SVPCTX */
408:
409: 1: movl PCB_USP(r8),r1
410: movl $0xabcdef01,r2
411: cmpl r1,r2
412: beql 1f
413: movl $35,r0 /* error code : 35; USP get changed in SVPCTX */
414: jmp *badrtn
415:
416: #/* Verify that the floating point accumulator was saved correctly */
417: 1:
418: movl PCB_ACCM(r8),r1 /* get the value saved */
419: movl $0x3c3c3c3c,r2 /* get the expected value */
420: cmpl r1,r2
421: beql 1f /* branch if they match */
422: movl $38,r0 /* Error code : 38; ACC was saved wrong */
423: jmp *badrtn
424:
425: #/* Check if R0-R13 in PCB1 changed by SVPCTX */
426: 1:
427: movl $2,r3 /* Start from PCB_R0 */
428: addl2 $8,r8 /* R8 = address of pcb1_r0 */
429: 2:
430: subl3 $2,r3,r2 /* R2 has expected value */
431: cmpl r2,(r8)
432: bneq 2f
433: incl r3
434: addl2 $4,r8 /* Next address in PCB */
435: cmpl r3,$15
436: bleq 2b
437:
438: brb 1f
439: 2: movl (r8),r1
440: movl $11,r0
441: jmp *badrtn /*r0 = 11; r1 = obs; r2 = exp; */
442: /*r3 = pcb entry # in fault */
443: 1:
444: cmpl _savvec7,(r8) /* Check if svpctx save PC correctly */
445: beql 1f
446: movl (r8),r1 /* Actual data */
447: movl _savvec7,r2 /* Expected data */
448: movl $12,r0 /* error code */
449: jmp *badrtn
450: 1:
451: addl2 $4,r8 /* Check PSL saved in pcb1 */
452: cmpl _savvec8,(r8) /* Check if svpctx save PSL correctly */
453: beql 1f
454: movl (r8),r1 /* Actual data */
455: movl _savvec8,r2 /* Expected data */
456: movl $13,r0 /* error code */
457: jmp *badrtn
458:
459: #
460: # Now check LDPCTX with a double precision floating point accumulator
461: #
462: 1:
463: mtpr $HIGH,$IPL /* IPL = HIGH */
464: bicpsw $0x3f /* Clear all flag */
465: mtpr $0,$ISP /* Init ISP to 0 */
466: movab _pcb0,r1 /* Init PCB0 */
467: mtpr r1,$PCBB /* Set PCBB to pcb0 */
1.1.1.2 ! root 468: movl _savvec9,PCB_KSP(r1) /* PCB_KSP = saved value of KSP */
1.1 root 469: movl $-1,PCB_USP(r1) /* PCB_USP = -1 */
470: movl $0x5e5e5e5e,PCB_ACCM(r1) /* set MS of fpp's acc. */
471: movl $0x6f6f6f6f,PCB_ACCL(r1) /* set LS of fpp's acc. */
472: movl $0x00100080,PCB_PSL(r1) /* PCB_IPL = 0x10; K mode; DBL Acc */
473: clrl r0
474: clrl r1
475: ldd r0 /* load the DBL Acc w/ 0 */
476: ldpctx /* load the process context */
477:
478: std r2 /* save the accumulator */
479: movl $0x5e5e5e5e,r4
480: movl $0x6f6f6f6f,r5
481: cmpl r2,r4 /* check the MS of the accumulator */
482: bneq 2f /* branch if actual != expected */
483: cmpl r3,r5 /* check the LS of the accumulator */
484: beql 1f /* branch if good compare */
485: 2:
486: movab s2msg1,_Errmsg /* LDPCTX failed */
487: movl $37,r0 /* Error code 37 -bad dbl Acc saved */
488: movl r2,r1 /* move the data into */
489: movl r3,r2 /* registers 1 - 4 */
490: movl r4,r3 /* for the */
491: movl r5,r4 /* error halt */
492: jmp *badrtn /* report the error */
493:
494: #
495: # Now check SVPCTX with a double precision floating point accumulator
496: #
497: 1:
498: mtpr _savvec0,$ISP /* Init ISP = original SP */
499: movab _pcb1,r6
500: movl r6,r7 /* r7 = address of Pcb1 */
501: mtpr r7,$PCBB /* Set PCBB = physical address PCB1 */
502: movl $PCB_SIZE,r8 /* No of entries in PCB */
503: 1: movl $0xabcdef01,(r6) /* Init all entries (26) in PCB1 */
504: /* with pattern 0xabcdef01 */
505: addl2 $4,r6
506: decl r8
507: bneq 1b
508:
509: movl $0xabcdabcd,r0 /* set the data to load into */
510: movl $0x12341234,r1 /* the fpp's accumulator */
511: ldd r0 /* load the DBL fpp Accumulator */
512: orl2 $0x80,4(sp) /* set the DBL bit in stack's PSL */
513: movl 4(sp),_savvec4 /* save the stack's PSL */
514:
515: mtpr $HIGH,$IPL /* Set IPL = HIGH */
516: movab s2msg2,_Errmsg
517: svpctx /* save the context */
518:
519: #/* Check the saved double precision floating point accumulator */
520: ldf $0 /* (REI code expects a sgl Acc) */
521: movab _pcb1,r6 /* get the PCB address */
522: movl PCB_ACCM(r6),r1 /* get the saved accumulator */
523: movl PCB_ACCL(r6),r2 /* data values */
524: movl $0xabcdabcd,r3 /* get the expected accumulator */
525: movl $0x12341234,r4 /* data values */
526:
527: cmpl r1,r3 /* check the MS data saved */
528: bneq 2f /* branch if compare error */
529: cmpl r2,r4 /* check the LS data saved */
530: beql 1f /* branch if no compare errors */
531: 2:
532: movab s2msg2,_Errmsg /* SVPCTX failed */
533: movl $39,r0 /* Error 39 -bad dbl acc saved */
534: jmp *badrtn /* report the error */
535:
536: #/* Check the saved PSL to verify that the fpp DBL accumulator bit is set */
537: 1:
538: movl PCB_PSL(r6),r1 /* get the saved PSL value */
539: movl _savvec4,r2 /* get the expected PSL value */
540: cmpl r1,r2 /* compare the PSL values */
541: beql 1f /* branch if no error */
542: movl $13,r0 /* Error code 13 -bad PSL */
543: jmp *badrtn /* report the error */
544:
545: #
546: # REI instruction test
547: # PSL should have PSL_IS = 1,PSL_MODE = 0,PSL_IPL = 31
548: #
549: 1:
550: movab s2msg3,_Errmsg
551: movpsl r1
552: andl2 $0x051f0000,r1 /* Check to make sure Tahoe in proper */
553: cmpl $0x041f0000,r1 /* state to check out REI ; PSL_IS = 1 */
554: beql 1f /* PSL_MODE = Kernel; PSL_IPL = 0x1f */
555: 2: movl $0x051f0000,r2
556: movl $13,r0
557: jmp *badrtn /*psl not equal to expected; */
558: 1:
559: # REI K mode to K mode; is = 1; ipl =1d
560: # movl $0,*$HSR /* set HISR in PSA to 0 */
561:
562: movl $0,*$SSR /* set SISR in PSA to 0 */
563: mtpr $0,$ISP /* ISP == 0 */
564: movab _pcb0,r1 /* Set PCBB to pcb0 */
565: mtpr r1,$PCBB
566:
567: movl $0x041d0000,-(sp) /* Set PSL,PC on stack for next REI */
568: /* REI to K mode and IPL == 0x1d */
569: movab rei1,r3
570: movab 1f,-(sp)
571: rei1:
572: rei
573: movl $14,r0 /* R0 = 14; rei fell thru */
574: jmp *badrtn
575: 1:
576: movpsl r1 /* If rei works, this is where it comes */
577: movl $0x041d0000,r2
578: cmpl r1,r2 /* Check if PSL loaded correctly */
579: beql 1f
580: movl $15,r0
581: jmp *badrtn /*rei did not load psl form the stack */
582: 1:
583: movab (sp),r1 /*check sp = original sp */
584: movl _savvec0,r2
585: cmpl r1,r2
586: beql 1f
587: movl $16,r0 /*r0 = 16 = error code */
588: jmp *badrtn /*sp is incorrect after rei */
589: 1:
590: mfpr $ISP,r1
591: cmpl r1,r2
592: beql 1f
593: movl $17,r0 /*error code = r0 = 17 */
594: jmp *badrtn /*sp was not saved by rei into ISP */
595: /*when is was ON; r1= obs; r2= exp */
596: #
597: # REI K mode to K mode; is =0; ipl = 1d
598: 1:
1.1.1.2 ! root 599: mtpr _savvec9,$KSP /* restore kernal stack pointer */
! 600: mtpr _savveca,$USP /* restore user stack pointer */
1.1 root 601: mtpr $0,$ISP
602: pushl $0x001d0000 /* Set up PSL,PC on stack for REI */
603: pushab 1f /* PSL_IS = 0; PSL_IPL = 1d; K mode */
604: movab rei2,r3
605: rei2:
606: rei
607: movl $14,r0 /* REI fell thru */
608: jmp *badrtn
609: 1:
610: mfpr $ISP,r1
611: movl _savvec0,r2
612: cmpl r1,r2
613: beql 1f
614: movl $17,r0
615: jmp *badrtn /*sp not saved correctly into ISP */
616: 1:
617: movpsl r1
618: andl2 $0xffffff00,r1
619: movl $0x001d0000,r2
620: cmpl r1,r2
621: beql 1f
622: movl $15,r0 /*error code = r0 = 19 */
623: jmp *badrtn /*psl not loaded correctly by rei */
624: 1:
625: movab (sp),r1
626: mfpr $KSP,r2
627: cmpl r1,r2
628: beql 1f
629: movl $16,r0 /*error code = r0 = 20 */
630: jmp *badrtn /*KSP was not loaded into sp by rei */
631: #
632: # interrupt test - to see that REI handles pending interrupts
633: # in SISR, HISR properly. REI to process has IPL 1b
634: # ** HISR has pending int. at IPL#14
635: # ** SISR = bit 7 & 2 ON
636: #
637: 1:
638:
639: movl _scb+44,_savvec4 /* Save int vector for console trans int. */
640: movl _scb+SIVEC1-24,_savvec6 /* Save int vector for IPL# 7 */
641: movab hs14,_scb+44 /* New vector for HISR #0x14 */
642: movab ss7,_scb+SIVEC1-24 /* New vector soft int. #7 */
1.1.1.2 ! root 643: movl $0x140004,*$HSR /* Set HISR : pending console transmit */
! 644: /* interrupt at IPL#0x14 */
! 645: movl $0x82,*$SSR /* Set SISR : pending IPL#7, IPL#2 */
1.1 root 646: brw 1f
647: #
648: # **************
649: #
650: .align 2
651: hs14: /* Handler for HISR #0x14 */
652: movl $18,r0
653: jmp *badrtn /* Rei took pending int. in HISR #0x14 when */
654: /* PSL_IPL was #1b */
655: #
656: #
657: .align 2
658: ss7: /* Handler for software int. #7 */
659: movl $19,r0
660: jmp *badrtn /* REI took pending software int.#7 when */
661: /* PSL_IPL was > 7 */
662: #
663: # ***************
664: #
665: 1:
666: movl $0x001b0000,-(sp) /* Set up PSL, PC for REI */
667: movab 1f,r0 /* PSL_IPL = 0x1b */
668: andl2 $0x3fffffff,r0
669: movl r0,-(sp) /* PSL_MODE = K, PSL_IPL = 1b, */
670: movab rei3,r3
671: rei3:
672: rei /* This REI should not take any pending int. */
673: movl $14,r0 /* error : REI fell thru */
674: jmp *badrtn
675: #
676: # now REI again to IPL 0x13 so pending interrupt in
677: # HISR at IPL#14 should be taken by REI
678: 1:
679: movab hsr_hdl,_scb+44 /* Set new vector for IPL#14 */
680: pushl $0x00130000 /* Set up PSL,PC for REI */
681: pushab 9f
682: movab rei4,r3
1.1.1.2 ! root 683: mfpr $ISP,r4 /* save interrupt stack pointer */
1.1 root 684: rei4:
685: rei /* Should take pending hardware int. #0x14 */
686: movl $14,r0 /* error : REI fell thru */
687: jmp *badrtn
688: 9:
689: movl $20,r0
690: jmp *badrtn /* REI did not take pending interrupt */
691: /* with IPL #14 > PSL_IPL #13; */
692: /* r0 = 23 = errorcode */
693: #
694: # Handler for hardware int. 0x14
695: #
696: .align 2
697: hsr_hdl: /* This is where REI should come */
698: mfpr $HISR,r1 /* check if HISR is reset to 0 */
699: clrl r2
700: cmpl r1,r2
701: beql 1f
702: movl $21,r0
703: jmp *badrtn /* Rei did not reset HISR after taking */
704: /* pending int in HISR. */
705: 1:
706: movpsl r1
707: andl2 $0xffffff00,r1
708: movl $0x04140000,r2 /* Expected current PSL */
709: cmpl r1,r2
710: beql 1f
711: movl $22,r0
712: jmp *badrtn /* Rei did not set current PSL corectly */
713: #
714: # check if SP is switched to ISP
715: #
716: 1:
717: movab (sp),r1 /* check if current SP = (ISP-8) */
1.1.1.2 ! root 718: movl r4,r2 /* r4 is saved ISP */
1.1 root 719: subl2 $8,r2
720: cmpl r1,r2
721: beql 1f
722: movl $23,r0 /* SP error after taking pending */
723: jmp *badrtn /* interrupt in HISR */
724: 1:
725: movl (sp)+,r1 /* Check pc & psl are still on the stack */
726: movab 9b,r2
727: cmpl r1,r2
728: beql 1f
729: movl $24,r0
730: jmp *badrtn /* Rei or micro int handler did not leave */
731: /* correct value of pc (one before rei */
732: /* was executed) on the stack. */
733: 1: movl (sp)+,r1
734: movl $0x00130000,r2
735: cmpl r1,r2
736: beql 1f
737: movl $25,r0
738: jmp *badrtn /* Rei or micro int handler did not leave*/
739: /* correct value of psl (one before rei */
740: /* was executed) on the stack. */
741:
742: 1: movl _savvec4,_scb+44 /*restore vector for ipl#14, */
743: movab sw7,_scb+96 /*new vector for ipl #7 */
744: pushl $0x00060000 /* Now set up to REI again to IPL#6, so it */
745: pushab 1f /* should take pending software int. #7 */
746: movab rei5,r3
747: rei5:
748: rei
749: movl $14,r0 /* REI fell thru */
750: jmp *badrtn
751: 1:
752: movl $26,r0
753: jmp *badrtn /* Rei did not take interrupt at IPL#7 */
754: #
755: # Handler for software int. # 7
756: #
757: .align 2
758: sw7: /* This is where REI comes */
759: mfpr $SISR,r1 /* Check SISR = 0x02 */
760: movl $2,r2
761: cmpl r1,r2
762: beql 1f
763: movl $27,r0
764: jmp *badrtn /* REI did not reset SISR */
765: 1:
766: movl $0,*$SSR /* SISR = 0 */
767: movpsl r1
768: andl2 $0xffffff00,r1 /* Mask out arithmetic flags */
769: movl $0x04070000,r2
770: cmpl r1,r2
771: beql 1f
772: movl $28,r0
773: jmp *badrtn /* Current psl not set right */
774: /* by rei or micro int handler */
775: #
776: # REI from KERNEL to USER
777: #
778: 1: mtpr $31,$IPL
779: movl _savvec6,_scb+SIVEC1-24 /*restore original vector for */
780: /*ipl #7 */
781: movl _savvec0,sp
1.1.1.2 ! root 782: mtpr _savveca,$USP /* Restore user stack pointer */
1.1 root 783: pushl $0x1000000 /* Set up to REI to user, IPL = 0, IS = 0 */
784: pushab 1f
785: mtpr $0,$ISP /* Set ISP to 0 */
786: movab rei6,r3
787: rei6:
788: rei
789: movl $14,r0
790: jmp *badrtn
791: #
792: # Now running in user mode
793: #
794: 1:
795: movpsl r1 /*check psl = 0x01000000 */
796: movl $0x1000000,r2
797: cmpl r1,r2
798: beql 1f
799: movl $29,r0
800: jmp *badrtn /*psl not set right by rei */
801: 1:
802: movab (sp),r1 /*check sp = USP */
803: movl _pcb0+PCB_USP,r2
804: cmpl r1,r2
805: beql 1f
806: movl $30,r0
807: jmp *badrtn /*sp not set to USP when mode = U*/
808: 1:
809: movl *$INTSP,r1 /* This is tricky; User get ISP from PSA */
810: movl _savvec0,r2
811: cmpl r1,r2
812: beql 1f
813: movl $31,r0
814: jmp *badrtn /* Rei did not save sp into ISP */
815: /* when psl_is was ON */
816: #
817: # REI from USER to USER
818: # still running in user mode
819: #
820: 1:
1.1.1.2 ! root 821: movl _savveca,sp /* restore stack pointer (user stack) */
1.1 root 822: pushl $0x1000000 /* Set up to REI to another user */
823: pushab 1f
824: movab rei7,r3
825: rei7:
826: rei
827: movl $14,r0
828: jmp *badrtn
829: 1:
830: movpsl r1 /*check psl = 0x01000000 */
831: movl $0x1000000,r2
832: cmpl r1,r2
833: beql 1f
834: movl $32,r0
835: jmp *badrtn /*psl not set right by rei */
836: 1:
837: movab (sp),r1 /*check sp = USP */
838: movl _pcb0+PCB_USP,r2
839: cmpl r1,r2
840: beql 1f
841: movl $33,r0
842: jmp *badrtn /*sp not set to USP when mode = U*/
1.1.1.2 ! root 843: 1:
! 844: movl _scb+SIVEC1,r4
1.1 root 845: movab sw2,_scb+SIVEC1 /* New handler for software int.#2 */
846: pushl $0x01000000 /* Set PSL,PC to REI to user ipl0 */
847: pushab 1f
848: movab rei8,r3
1.1.1.2 ! root 849: movl $2,*$SSR /* This is cheating : Set SISR */
! 850: /* directly in PSA */
1.1 root 851: rei8:
852: rei /* Use REI with pending int #2 in SISR to get back */
853: movl $14,r0
854: jmp *badrtn /* to Kernel mode; Can also use a halt */
855: 1:
856: movl $34,r0
857: jmp *badrtn
858: #
859: #
860: .align 2
861: sw2:
862: mtpr $31,$IPL
1.1.1.2 ! root 863: movl r4,_scb+SIVEC1 /* restore software vector for int#2 */
1.1 root 864: movl (sp)+,r0
865: movl (sp)+,r0
866: movl _savvec0,sp /* Original SP */
867: movl _savvec2,fp
1.1.1.2 ! root 868: mtpr _savvec9,$KSP /* Restore kernal stack pointer */
! 869: mtpr _savveca,$USP /* Restore user stack pointer */
1.1 root 870: ret
871: #
872: #
873: .data 1
874: s2msg1:
875: .ascii "LDPCTX failed \0"
876: s2msg2:
877: .ascii "SVPCTX failed \0"
878: s2msg3:
879: .ascii "REI failed \0"
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