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#
#	Privileged instructions tests

#	LDPCTX : load process context
#	SVPCTX : save process context
#	REI    : return from interrupt 
#
#	R0 = error codes
#	     1 : LDPCTX fail to load general registers
#	     2 : LDPCTX fail to load Memory Management Regsiters
#		 r3 = reg. no of register in error
#		 r1 = actual value
#		 r2 = expected value
#	     3 : SP not loaded correctly by LDPCTX
#	     4 : LDPCTX did not put PC correctly on stack
#	     5 : LDPCTX did not put PSL correctly on stack
#	     6 : PSL_IS is not reset when LDPCTX from ISP to KSP
#	     7 : Interrupt stack is not saved when LDPCTX from ISP to KSP
#	     8 : PSL_IS is not set when SVPCTX executed
#	     9 : Stack is not switched to ISP after SVPCTX executed
#	    10 : SP is not saved in PCB_KSP correctly by SVPCTX 
#	    11 : SVPCTX did not saved general registers correctly.
#		 R3 = PCB entry no in error
#		 R1 = actual value
#		 R2 = expected value
#	    12 : SVPCTX did not saved PC correctly.
#		 R1 = actual value
#		 R2 = expected value
#	    13 : SVPCTX did not saved PSL correctly.
#		 R1 = actual value
#		 R2 = expected value
#	    14 : REI fell thru to next instruction... 
#		 R3 = address of REI instruction
#	    15 : PSL not loaded correctly by REI
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    16 : SP not loaded correctly by REI 
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    17 : SP was not saved into ISP when REI with PSL_IS = 1
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    18 : REI took pending interrupt IPL#14 in HISR while PSL_IPL was 1b 
#		 R3 = address of REI instruction
#	    19 : REI took pending interrupt IPL#7 in SISR while PSL_IPL was 1b
#		 R3 = address of REI instruction
#	    20 : REI did not take pending interrupt IPL#0x14 in HISR while 
#		 PSL_IPL was 0x13 
#		 R3 = address of REI instruction
#	    21 : REI did not clear bit in HISR corresponding to IPL#14 after
#		 taking the pending interrupt
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    22 : REI did not set current PSL correctly after taking the pending
#		 interrupt IPL#14 in HISR
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    23 : SP error after taking pending interrupt in HISR at IPL#0x14
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    24 : REI did not leave correct PC on the stack after taking pending
#		 interrupt in HISR #0x14
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    25 : REI did not leave correct PSL on the stack after taking pending
#		 interrupt in HISR #0x14
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    26 : REI did not take pending interrupt IPL#7 in SISR while 
#		 REI to IPL #6 
#		 R3 = address of REI instruction
#	    27 : REI did not clear bit in SISR corresponding to IPL#7 after
#		 taking the pending interrupt
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    28 : REI did not set current PSL correctly after taking the pending
#		 interrupt IPL#7 in SISR
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    29 : PSL does not have correct mode after REI from Kernel to User
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    30 : SP is not loaded from PCB_USP after REI from Kernel to User
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    31 : Previous SP is not saved  into ISP after REI from Kernel 
#	      	 to User with previous PSL_IS = 1
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    32 : PSL does not have correct mode after REI from User to User
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    33 : SP is not loaded from PCB_USP after REI from User to User
#		 R1 = actual,  R2 = expected
#		 R3 = address of REI instruction
#	    34 : REI did not take pending software int. #2 while REI to IPL 0
#		 R3 = address of REI instruction
#	    35 : PCB_USP is not supposed to change by SVPCTX but it is.
#	    36 : LDPCTX did not load the single precision floating point 
#	         accumulator correctly.
#	         R1 = actual,  R2 = expected
#	    37 : LDPCTX did not load the double precision floating point 
#	         accumulator correctly.
#	         R1 / R2 = actual,  R3 / R4 = expected
#	    38 : SVPCTX did not save the single precision floating point 
#	         accumulator correctly.
#	         R1 = actual,  R2 = expected
#	    39 : SVPCTX did not save the double precision floating point 
#	         accumulator correctly.
#	         R1 / R2 = actual,  R3 / R4 = expected
#
	.globl	_prvinstr
_prvinstr:
	.word	0x1fff	
	mtpr	$HIGH,$IPL		/* IPL = HIGH	*/
	bicpsw	$0x3f			/* Clear all flag  */
	movab	(sp),_savvec0		/* Save current SP */
	movpsl	_savvec1		/* Save current PSL */	
	movl	fp,_savvec2		/* Save current FP */
	mfpr	$KSP,_savvec9		/* Save kernal stack pointer */
	mfpr	$USP,_savveca		/* Save user stack pointer */

	mtpr	$0,$ISP			/* Init ISP to 0  */
	movab	_pcb0,r1		/* Init PCB0	*/
	mtpr	r1,$PCBB		/* Set PCBB to pcb0 */

	movl	_savvec9,PCB_KSP(r1)	/* PCB_KSP = saved value of KSP */
	movl	_savveca,PCB_USP(r1)		/* PCB_USP = -1 */
	movl	$0,PCB_R0(r1)
	movl	$0x11111111,PCB_R1(r1)
	movl	$0x22222222,PCB_R2(r1)
	movl	$0x33333333,PCB_R3(r1)
	movl	$0x44444444,PCB_R4(r1)
	movl	$0x55555555,PCB_R5(r1)
	movl	$0x66666666,PCB_R6(r1)
	movl	$0x77777777,PCB_R7(r1)
	movl	$0x88888888,PCB_R8(r1)
	movl	$0x99999999,PCB_R9(r1)
	movl	$0xaaaaaaaa,PCB_R10(r1)
	movl	$0xbbbbbbbb,PCB_R11(r1)
	movl	$0xcccccccc,PCB_R12(r1)
	movl	$0xdddddddd,PCB_R13(r1)
	movl	$0x1a1a1a1a,PCB_ACCM(r1)	/* set MS of fpp's acc. */
	movl	$0x2b2b2b2b,PCB_ACCL(r1)	/* set LS of fpp's acc. */

	movab	nxts,r5
	andl2	$0x3fffffff,r5
	movl	r5,PCB_PC(r1)			/* Set PCB_PC */
	movl	$0x00100000,PCB_PSL(r1)	  /* PCB_IPL = 0x10; K mode; SGL Acc */
	movl	$0x12121212,PCB_P0BR(r1)
	movl	$0x01212121,PCB_P0LR(r1)
	movl	$0x23232323,PCB_P1BR(r1)
	movl	$0x02323232,PCB_P1LR(r1)
	movl	$0x34343434,PCB_P2BR(r1)
	movl	$0x03434343,PCB_P2LR(r1)
	movab	s2msg1,_Errmsg
	ldpctx				/* Do load process context */
rtnld:
	cmpl	r0,$0			/* Verify general registers */
	beql	1f
2:	movl	$1,r0		/*error code = 1*/	
	jmp    *badrtn		/*error- ldpctx did not load gen reg	*/

1:	movl	$1,r0		/*error code = 1 for ldpctx & gen regs	*/	
	cmpl	r1,$0x11111111
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/
1:	cmpl	r2,$0x22222222
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/
1:	cmpl	r3,$0x33333333
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/
1:	cmpl	r4,$0x44444444
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/
1:	cmpl	r5,$0x55555555
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/
1:	cmpl	r6,$0x66666666
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/
1:	cmpl	r7,$0x77777777
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/
1:	cmpl	r8,$0x88888888
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/
1:	cmpl	r9,$0x99999999
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/
1:	cmpl	r10,$0xaaaaaaaa
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/
1:	cmpl	r11,$0xbbbbbbbb
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/
1:	cmpl	r12,$0xcccccccc
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/
1:	cmpl	r13,$0xdddddddd
	beql	1f
2:	jmp    *badrtn		/*error - ldpctx did not load gen reg	*/
				/*properly; PCBB = phys addr of _pcb0	*/

#/*	Check the single precision accumulator                          */
1:
	stf	r1		/* store the accumulator                */
	movl	$0x1a1a1a1a,r2	/* set the expected value               */
	cmpl	r1,r2
	beql	1f
	movl	$36,r0		/* ERROR!!   r0 = 36 = error code       */
	jmp    *badrtn		/*error - ldpctx did not load the Acc	*/

#/*	Check Memory Management Registers */

1:
	movl	$2,r0		/*r0 = 2 = errorcode			*/
	mfpr 	$P0BR,r1
	movl 	_pcb0+PCB_P0BR,r2
	cmpl	r1,r2
	beql	1f
	movl	$P0BR,r3	/*r3 = reg no in error			*/
	jmp    *badrtn		/*ldpctx did not load memory mgmt	*/
				/*register properly;			*/
				/*r1 = observed; r2 = expected		*/
1:	mfpr 	$P1BR,r1
	movl 	_pcb0+PCB_P1BR,r2
	cmpl	r1,r2
	beql	1f
	movl	$P1BR,r3	/*r3 = reg no in error			*/
	jmp    *badrtn		/*ldpctx did not load memory mgmt	*/
				/*register properly;			*/
				/*r1 = observed; r2 = expected		*/
1:	mfpr 	$P2BR,r1
	movl 	_pcb0+PCB_P2BR,r2
	cmpl	r1,r2
	beql	1f
	movl	$P2BR,r3	/*r3 = reg no in error			*/
	jmp    *badrtn		/*ldpctx did not load memory mgmt	*/
				/*register properly;			*/
				/*r1 = observed; r2 = expected		*/
1:	mfpr 	$P0LR,r1
	movl 	_pcb0+PCB_P0LR,r2
	cmpl	r1,r2
	beql	1f
	movl	$P0LR,r3	/*r3 = reg no in error			*/
	jmp    *badrtn		/*ldpctx did not load memory mgmt	*/
				/*register properly;			*/
				/*r1 = observed; r2 = expected		*/
1:	mfpr 	$P1LR,r1
	movl 	_pcb0+PCB_P1LR,r2
	cmpl	r1,r2
	beql	1f
	movl	$P1LR,r3	/*r3 = reg no in error			*/
	jmp    *badrtn		/*ldpctx did not load memory mgmt	*/
				/*register properly;			*/
				/*r1 = observed; r2 = expected		*/
1:	mfpr	$P2LR,r1
	movl	_pcb0+PCB_P2LR,r2
	cmpl	r1,r2
	beql	1f
	movl	$P2LR,r3	/*r3 = reg no in error			*/
	jmp    *badrtn		/*ldpctx did not load memory mgmt	*/
				/*register properly;			*/
				/*r1 = observed; r2 = expected		*/
#
#	Check if SP loaded by LDPCTX correctly 
#
1:
	movab	(sp),r1		/* R1 = current SP */
	movl	_pcb0+PCB_KSP,r2	/* R2 = expected SP from PCB0 */
	subl2	$8,r2		/* Decrement 2 lwords for PC,PSL */
	cmpl	r2,r1
	beql	1f
2:	movl	$3,r0		/*error code = r0 = 3			*/
	jmp    *badrtn		/*sp not correct after ldpctx		*/
				/*r0 = 3 = error code			*/
				/*r1 = observed; r2 = expected		*/
1:
#
#	Check PC, PSL put on stack by LDPCTX
#	
	movl	r1,r4		/* R4 = SP */
	movl	(r4),r1		/* R1 = PC from stack  */
	movl	_pcb0+PCB_PC,r2 /* R2 = expected PC from PCB0 */
	cmpl	r1,r2
	beql	1f
	movl	$4,r0		/*error code = 4			*/
	jmp    *badrtn		/*pc on the stack not loaded		*/
				/*properly by ldpctx; r1 = obs; r2 =exp	*/
1:	addl2	$4,r4
	movl	(r4),r1		/* R1 = PSL from stack */
	movl	_pcb0+PCB_PSL,r2	/* R2 = expected PSL from PCB0 */
	cmpl	r1,r2
	beql	1f
	movl	$5,r0		/*error code = 5			*/
	jmp    *badrtn		/*psl on the stack not loaded		*/
				/*properly by ldpctx; r1 = obs; r2 =exp	*/
1:
#
#	Check PSL_IS reset correctly  when change SP from ISP to KSP
#	by LDPCTX 
#
	movpsl	r1
	andl2	$0x04000000,r1
	beql	1f
	movl	$6,r0		/*error code = r0 = 6			*/
	movl	$0,r2
	jmp    *badrtn		/*psl int stack should be turned off	*/
				/*by ldpctx; r1 = obs; r2 = exp		*/
#
#	Check if int. stack get saved in ISP by LDPCTX 
1:
	movl	_savvec1,r1
	andl2	$0x04000000,r1	/*if psl_is flag was on before ldpctx	*/
	beql	9f
	mfpr	$ISP,r1		/*then ckeck that int stack ptr was	*/
	movl	_savvec0,r2	/*saved by ldpctx			*/
	cmpl	r1,r2
	beql	9f
2:	movl	$7,r0		/*error code = r0 = 7			*/
	jmp    *badrtn		/*ldpctx did not save ISP		*/
				/*r1  = obs; r2 = exp			*/

#/*	Check out save process context 		*/
#/*	at this point, psl & pc are still on	*/
#/*	the stack. So svpctx can use it		*/

9:
nxts:	mtpr	_savvec0,$ISP	/* Init ISP = original ISP */
	mtpr	_savvec9,$KSP	/* Init KSP = original KSP */
	mtpr	_savveca,$USP	/* Init USP = original USP */
	movab	_pcb1,r6
	movl	r6,r7		/* r7 = address  of Pcb1 */
	mtpr	r7,$PCBB	/* Set PCBB = physical address PCB1 */
	movl	$PCB_SIZE,r8	/* No of entries in PCB */
1:	movl	$0xabcdef01,(r6)	/* Init all entries (26) in PCB1 */
				/* with pattern 0xabcdef01      */
	addl2	$4,r6
	decl	r8
	bneq	1b

	movab	(sp),r11
	movl	(r11),_savvec7	/* Expected PC on the stack */
	movl	4(r11),_savvec8	/* Expected PSL on stack */

	movl	$0x3c3c3c3c,r0
	ldf	r0		/* load the (single precision) accumulator */

	movl	$0,r0		/* Initialize general registers */
	movl	$1,r1
	movl	$2,r2
	movl	$3,r3
	movl	$4,r4
	movl	$5,r5
	movl	$6,r6
	movl	$7,r7
	movl	$8,r8
	movl	$9,r9
	movl	$10,r10
	movl	$11,r11
	movl	$12,r12
	movl	$13,r13
	mtpr	$HIGH,$IPL	/* Set IPL = HIGH */
	movab	s2msg2,_Errmsg
	svpctx

	movpsl	r1		/* check if PSL_IS is set after SVPCTX */
	andl2	$0x04000000,r1
	bneq	1f
2:	movl	$0x04000000,r2
	movl	$8,r0
	jmp    *badrtn		/* psl_is not set by svpctx; r0 = 8	*/
				/* r1 = obs; r2 = exp			*/

1:	movab	(sp),r1	       /* Check if SP is switched to ISP after SVPCTX */
	mfpr	$ISP,r2
	cmpl	r1,r2
	beql	1f
2:	movl	$9,r0
	jmp    *badrtn		/*sp not equal to ISP in svpctx; r0 = 9	*/
				/*r1 = obs; r2 = exp			*/

1:	movab	_pcb0,r7
	movab	_pcb1,r8
	cmpl	(r7),(r8)	/* Check if SVPCTX save SP in PCB1_KSP */
	beql	1f
2:	movl	(r8),r1
	movl	(r7),r2
	movl	$10,r0
	jmp    *badrtn		/*ksp saved by svpctx not correct;	*/
				/*r0 = 10; r1 = obs; r2 = exp		*/

#/* 	Make sure PCB_USP unchanged by SVPCTX	*/

1:	movl	PCB_USP(r8),r1
	movl	$0xabcdef01,r2
	cmpl	r1,r2
	beql	1f
	movl	$35,r0	     /* error code : 35; USP get changed in SVPCTX */
	jmp    *badrtn	

#/*	Verify that the floating point accumulator was saved correctly */
1:
	movl	PCB_ACCM(r8),r1	/* get the value saved */
	movl	$0x3c3c3c3c,r2	/* get the expected value */
	cmpl	r1,r2
	beql	1f		/* branch if they match  */
	movl	$38,r0		/* Error code : 38; ACC was saved wrong */
	jmp    *badrtn	

#/*	Check if R0-R13 in PCB1 changed by SVPCTX */
1:
	movl	$2,r3		/* Start from PCB_R0	*/	
	addl2	$8,r8		/* R8 = address of pcb1_r0 */
2:
	subl3	$2,r3,r2	/* R2 has expected value */
	cmpl	r2,(r8)
	bneq	2f
	incl	r3	
	addl2	$4,r8		/* Next address in PCB */
	cmpl	r3,$15
	bleq	2b

	brb	1f
2:	movl	(r8),r1
	movl	$11,r0
	jmp    *badrtn		/*r0 = 11; r1 = obs; r2 = exp;		*/
				/*r3 = pcb entry # in fault		*/
1:
	cmpl	_savvec7,(r8)  	/* Check if svpctx save PC correctly */
	beql	1f
	movl	(r8),r1		/* Actual data */
	movl	_savvec7,r2	/* Expected data */
	movl	$12,r0		/* error code */
	jmp    *badrtn
1:
	addl2	$4,r8		/* Check PSL saved in pcb1 */
	cmpl	_savvec8,(r8)  	/* Check if svpctx save PSL correctly */
	beql	1f
	movl	(r8),r1		/* Actual data */
	movl	_savvec8,r2	/* Expected data */
	movl	$13,r0		/* error code */
	jmp    *badrtn

#
# Now check LDPCTX with a double precision floating point accumulator
#
1:
	mtpr	$HIGH,$IPL		/* IPL = HIGH	*/
	bicpsw	$0x3f			/* Clear all flag  */
	mtpr	$0,$ISP			/* Init ISP to 0  */
	movab	_pcb0,r1		/* Init PCB0	*/
	mtpr	r1,$PCBB		/* Set PCBB to pcb0 */
	movl	_savvec9,PCB_KSP(r1)	/* PCB_KSP = saved value of KSP */
	movl	$-1,PCB_USP(r1)		/* PCB_USP = -1 */
	movl	$0x5e5e5e5e,PCB_ACCM(r1) /* set MS of fpp's acc. */
	movl	$0x6f6f6f6f,PCB_ACCL(r1) /* set LS of fpp's acc. */
	movl	$0x00100080,PCB_PSL(r1)	/* PCB_IPL = 0x10; K mode; DBL Acc */
	clrl	r0
	clrl	r1
	ldd	r0			/* load the DBL Acc w/ 0 */
	ldpctx				/* load the process context */
	 
	std	r2			/* save the accumulator */
	movl	$0x5e5e5e5e,r4
	movl	$0x6f6f6f6f,r5
	cmpl	r2,r4			/* check the MS of the accumulator */
	bneq	2f			/* branch if actual != expected */
	cmpl	r3,r5			/* check the LS of the accumulator */
	beql	1f			/* branch if good compare */
2:
	movab	s2msg1,_Errmsg		/* LDPCTX  failed      */
	movl	$37,r0			/* Error code 37 -bad dbl Acc saved */
	movl	r2,r1			/* move the data into  */
	movl	r3,r2			/*    registers 1 - 4  */
	movl	r4,r3			/*       for the       */
	movl	r5,r4			/*          error halt */
	jmp    *badrtn			/* report the error    */

#
# Now check SVPCTX with a double precision floating point accumulator
#
1:
	mtpr	_savvec0,$ISP		/* Init ISP = original SP */
	movab	_pcb1,r6
	movl	r6,r7			/* r7 = address  of Pcb1 */
	mtpr	r7,$PCBB		/* Set PCBB = physical address PCB1 */
	movl	$PCB_SIZE,r8		/* No of entries in PCB */
1:	movl	$0xabcdef01,(r6)	/* Init all entries (26) in PCB1 */
					/* with pattern 0xabcdef01      */
	addl2	$4,r6
	decl	r8
	bneq	1b

	movl	$0xabcdabcd,r0		/* set the data to load into      */
	movl	$0x12341234,r1		/*    the fpp's accumulator       */
	ldd	r0			/* load the DBL fpp Accumulator   */
	orl2	$0x80,4(sp)		/* set the DBL bit in stack's PSL */
	movl	4(sp),_savvec4		/* save the stack's PSL           */
	
	mtpr	$HIGH,$IPL		/* Set IPL = HIGH */
	movab	s2msg2,_Errmsg
	svpctx				/* save the context */

#/*  Check the saved double precision floating point accumulator */
	ldf	$0			/* (REI code expects a sgl Acc) */
	movab	_pcb1,r6		/* get the PCB address          */
	movl	PCB_ACCM(r6),r1		/* get the saved accumulator    */
	movl	PCB_ACCL(r6),r2		/*    data values               */
	movl	$0xabcdabcd,r3		/* get the expected accumulator */
	movl	$0x12341234,r4		/*    data values               */

	cmpl	r1,r3			/* check the MS data saved      */
	bneq	2f			/* branch if compare error      */
	cmpl	r2,r4			/* check the LS data saved      */
	beql	1f			/* branch if no compare errors  */
2:
	movab	s2msg2,_Errmsg		/* SVPCTX  failed      */
	movl	$39,r0			/* Error 39 -bad dbl acc saved  */
	jmp    *badrtn			/* report the error    */

#/*  Check the saved PSL to verify that the fpp DBL accumulator bit is set */
1:
	movl	PCB_PSL(r6),r1		/* get the saved PSL value */
	movl	_savvec4,r2		/* get the expected PSL value */
	cmpl	r1,r2			/* compare the PSL values  */
	beql	1f			/* branch if no error */
	movl	$13,r0			/* Error code 13 -bad PSL */
	jmp    *badrtn			/* report the error    */

#
#	REI instruction test	
#	PSL should have PSL_IS = 1,PSL_MODE = 0,PSL_IPL = 31
#
1:
	movab	s2msg3,_Errmsg
	movpsl	r1
	andl2	$0x051f0000,r1	/* Check to make sure Tahoe in proper */
	cmpl	$0x041f0000,r1	/* state to check out REI ; PSL_IS = 1 */
	beql	1f		/* PSL_MODE = Kernel; PSL_IPL = 0x1f  */
2:	movl	$0x051f0000,r2
	movl	$13,r0
	jmp    *badrtn		/*psl not equal to expected;		*/
1:
#	REI K mode to K mode; is = 1; ipl =1d	
#	movl	$0,*$HSR	/* set HISR in PSA to  0		*/

	movl	$0,*$SSR	/* set SISR in PSA to  0		*/
	mtpr 	$0,$ISP		/* ISP == 0    				*/
	movab	_pcb0,r1	/* Set PCBB to pcb0			*/
	mtpr	r1,$PCBB

	movl	$0x041d0000,-(sp) 	/* Set PSL,PC  on stack for next REI */
					/* REI to K mode and IPL == 0x1d  */
	movab	rei1,r3
	movab	1f,-(sp)
rei1:
	rei
	movl	$14,r0		/* R0 = 14; rei fell thru	*/
	jmp    *badrtn
1:
	movpsl	r1		/* If rei works, this is where it comes */
	movl	$0x041d0000,r2
	cmpl	r1,r2		/* Check if PSL loaded correctly	*/
	beql	1f
	movl	$15,r0
	jmp    *badrtn		/*rei did not load psl form the stack 	*/
1:
	movab	(sp),r1		/*check sp = original sp		*/
	movl	_savvec0,r2
	cmpl	r1,r2
	beql	1f
	movl	$16,r0		/*r0 = 16 = error code			*/
	jmp    *badrtn		/*sp is incorrect after rei		*/
1:
	mfpr	$ISP,r1
	cmpl	r1,r2
	beql	1f
	movl	$17,r0		/*error code = r0 = 17			*/
	jmp    *badrtn		/*sp was not saved by rei into ISP	*/
				/*when is was ON; r1= obs; r2= exp	*/
#
#	REI K mode to K mode; is =0; ipl = 1d
1:
	mtpr	_savvec9,$KSP	/* restore kernal stack pointer */
	mtpr	_savveca,$USP	/* restore user stack pointer */
	mtpr	$0,$ISP
	pushl	$0x001d0000	/* Set up PSL,PC on stack for REI */
	pushab	1f		/* PSL_IS = 0; PSL_IPL = 1d; K mode */
	movab	rei2,r3
rei2:
	rei
	movl	$14,r0		/* REI fell thru */
	jmp    *badrtn
1:
	mfpr	$ISP,r1
	movl	_savvec0,r2
	cmpl	r1,r2
	beql	1f
	movl	$17,r0
	jmp    *badrtn		/*sp not saved correctly into ISP	*/
1:
	movpsl	r1
	andl2	$0xffffff00,r1
	movl	$0x001d0000,r2
	cmpl	r1,r2
	beql	1f
	movl	$15,r0		/*error code = r0 = 19			*/
	jmp    *badrtn		/*psl not loaded correctly by rei	*/
1:
	movab	(sp),r1
	mfpr	$KSP,r2
	cmpl	r1,r2
	beql	1f
	movl	$16,r0		/*error code = r0 = 20			*/
	jmp    *badrtn		/*KSP was not loaded into sp by rei	*/
#
#	interrupt test - to see that REI handles pending interrupts
#	in SISR, HISR properly. REI to process has IPL 1b
#	** HISR has pending int. at IPL#14 
#	** SISR = bit 7 & 2 ON				
#
1:

	movl	_scb+44,_savvec4   /* Save int vector for console trans int. */
	movl	_scb+SIVEC1-24,_savvec6 /* Save int vector for IPL# 7    */
	movab	hs14,_scb+44		/* New vector for HISR #0x14 */
	movab	ss7,_scb+SIVEC1-24	/* New vector soft int. #7 */
	movl	$0x140004,*$HSR  /* Set HISR : pending console transmit */
				 /* interrupt at IPL#0x14  */
	movl	$0x82,*$SSR	/* Set SISR : pending IPL#7, IPL#2 */
	brw	1f
#
#	**************
#
	.align	2
hs14:				/* Handler for HISR #0x14 */
	movl	$18,r0
	jmp    *badrtn		/* Rei took pending int. in HISR #0x14 when */
				/* PSL_IPL was #1b */
#
#
	.align	2
ss7:				/* Handler for software int. #7 */
	movl	$19,r0
	jmp    *badrtn		/* REI took pending software int.#7 when */
				/* PSL_IPL was > 7 */
#
#	***************
#
1:
	movl	$0x001b0000,-(sp)	/* Set up PSL, PC for REI	*/
	movab	1f,r0			/* PSL_IPL = 0x1b */
	andl2	$0x3fffffff,r0
	movl	r0,-(sp)		/* PSL_MODE = K, PSL_IPL = 1b,  */
	movab	rei3,r3
rei3:
	rei			/* This REI should not take any pending int. */
	movl	$14,r0		/* error : REI fell thru */
	jmp    *badrtn
#
#	now REI again to IPL 0x13 so pending interrupt in
#	HISR at IPL#14 should be taken by REI
1:
	movab	hsr_hdl,_scb+44		/* Set new vector for IPL#14	*/
	pushl	$0x00130000		/* Set up PSL,PC for REI	*/
	pushab	9f
	movab	rei4,r3
	mfpr	$ISP,r4		/* save interrupt stack pointer	*/
rei4:
	rei			/* Should take pending hardware int. #0x14 */
	movl	$14,r0		/* error : REI fell thru */
	jmp    *badrtn
9:
	movl	$20,r0
	jmp    *badrtn		/* REI did not take pending interrupt	*/
				/* with IPL #14 > PSL_IPL #13;		*/
				/* r0 = 23 = errorcode			*/
#
#	Handler for hardware int. 0x14
#
	.align	2
hsr_hdl:			/* This is where REI should come	*/
	mfpr	$HISR,r1	/* check if HISR is reset to 0		*/
	clrl	r2
	cmpl	r1,r2
	beql	1f
	movl	$21,r0
	jmp    *badrtn		/* Rei did not reset HISR after taking 	*/
				/* pending int in HISR.		 	*/
1:
	movpsl	r1
	andl2	$0xffffff00,r1
	movl	$0x04140000,r2  /* Expected current PSL */
	cmpl	r1,r2
	beql	1f
	movl	$22,r0
	jmp    *badrtn		/* Rei did not set current PSL corectly	*/
#
#	check if SP is switched to ISP
#
1:
	movab	(sp),r1		/* check if current SP = (ISP-8)	*/
	movl	r4,r2		/* r4 is saved ISP	*/
	subl2	$8,r2
	cmpl	r1,r2
	beql	1f
	movl	$23,r0		/* SP error after taking pending  	*/
	jmp	*badrtn		/* interrupt in HISR			*/
1:
	movl	(sp)+,r1	/* Check pc & psl are still on the stack */
	movab	9b,r2
	cmpl	r1,r2
	beql	1f
	movl	$24,r0
	jmp    *badrtn		/* Rei or micro int handler did not leave */
				/* correct value of pc (one before rei	*/
				/* was executed) on the stack.		*/
1:	movl	(sp)+,r1
	movl	$0x00130000,r2
	cmpl	r1,r2
	beql	1f
	movl	$25,r0
	jmp    *badrtn		/* Rei or micro int handler did not leave*/
				/* correct value of psl (one before rei	*/
				/* was executed) on the stack.		*/

1:	movl	_savvec4,_scb+44	/*restore vector for ipl#14,	*/
	movab	sw7,_scb+96		/*new vector for ipl #7		*/
	pushl	$0x00060000	/* Now set up to REI again to IPL#6, so it */
	pushab	1f		/* should take pending software int. #7 */
	movab	rei5,r3
rei5:
	rei
	movl	$14,r0		/* REI fell thru */
	jmp    *badrtn
1:
	movl	$26,r0
	jmp    *badrtn		/* Rei did not take interrupt at IPL#7	*/
#
#	Handler for software int. # 7
#
	.align	2
sw7:				/* This is where REI comes	*/
	mfpr	$SISR,r1	/* Check SISR = 0x02		*/
	movl	$2,r2
	cmpl	r1,r2
	beql	1f
	movl	$27,r0
	jmp    *badrtn		/* REI did not reset SISR	*/
1:
	movl	$0,*$SSR	/* SISR = 0			*/	
	movpsl	r1
	andl2	$0xffffff00,r1	/* Mask out arithmetic flags	*/
	movl	$0x04070000,r2
	cmpl	r1,r2
	beql	1f
	movl	$28,r0
	jmp    *badrtn		/* Current psl not set right	*/
				/* by rei or micro int handler	*/
#
#	REI from KERNEL to USER
#
1:	mtpr	$31,$IPL	
	movl	_savvec6,_scb+SIVEC1-24	/*restore original vector for	*/
					/*ipl #7			*/
	movl	_savvec0,sp
	mtpr	_savveca,$USP	/* Restore user stack pointer */
	pushl	$0x1000000	/* Set up to REI to user, IPL = 0, IS = 0 */
	pushab	1f
	mtpr	$0,$ISP		/* Set ISP to 0			*/
	movab	rei6,r3
rei6:
	rei
	movl	$14,r0
	jmp    *badrtn
#
# 	Now running in user mode
#
1:
	movpsl	r1		/*check psl = 0x01000000	*/
	movl	$0x1000000,r2
	cmpl	r1,r2
	beql	1f
	movl	$29,r0
	jmp    *badrtn		/*psl not set right by rei	*/
1:
	movab	(sp),r1		/*check sp = USP		*/
	movl	_pcb0+PCB_USP,r2
	cmpl	r1,r2
	beql	1f
	movl	$30,r0
	jmp    *badrtn		/*sp not set to USP when mode = U*/
1:
	movl	*$INTSP,r1	/* This is tricky; User get ISP from PSA */
	movl	_savvec0,r2
	cmpl	r1,r2
	beql	1f
	movl	$31,r0
	jmp    *badrtn		/* Rei did not save sp into ISP	*/
				/* when psl_is was ON		*/
#
#	REI from USER to USER 	
#	still running in user mode	
#
1:
	movl	_savveca,sp	/* restore stack pointer (user stack) */
	pushl	$0x1000000	/* Set up to REI to another user */
	pushab	1f
	movab	rei7,r3
rei7:
	rei
	movl	$14,r0
	jmp    *badrtn
1:
	movpsl	r1		/*check psl = 0x01000000	*/
	movl	$0x1000000,r2
	cmpl	r1,r2
	beql	1f
	movl	$32,r0
	jmp    *badrtn		/*psl not set right by rei	*/
1:
	movab	(sp),r1		/*check sp = USP		*/
	movl	_pcb0+PCB_USP,r2
	cmpl	r1,r2
	beql	1f
	movl	$33,r0
	jmp    *badrtn		/*sp not set to USP when mode = U*/
1:			
	movl	_scb+SIVEC1,r4
	movab	sw2,_scb+SIVEC1 /* New handler for software int.#2 */
	pushl	$0x01000000	/* Set PSL,PC to REI to user ipl0 */
	pushab	1f
	movab	rei8,r3
	movl	$2,*$SSR	/* This is cheating : Set SISR	*/
				/* directly in PSA */
rei8:
	rei		/* Use REI with pending int #2 in SISR to get back */
	movl	$14,r0
	jmp    *badrtn		/* to Kernel mode; Can also use a halt	*/
1:
	movl	$34,r0
	jmp    *badrtn	
#
#
	.align	2
sw2:	
	mtpr	$31,$IPL
	movl	r4,_scb+SIVEC1	/* restore software vector for int#2 */
	movl	(sp)+,r0
	movl	(sp)+,r0
	movl	_savvec0,sp	/* Original SP		*/
	movl	_savvec2,fp
	mtpr	_savvec9,$KSP	/* Restore kernal stack pointer */
	mtpr	_savveca,$USP	/* Restore user stack pointer */
	ret
#
#
	.data 	1
s2msg1:
	.ascii	"LDPCTX failed \0"
s2msg2:
	.ascii	"SVPCTX failed \0"
s2msg3:
	.ascii	"REI failed \0"

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