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1.1 ! root 1: # ! 2: # *software interrupt event test ! 3: # ! 4: # R0 = error code ! 5: # 1 - REI fell thru ! 6: # R8 = PC of REI instruction ! 7: # 2 - REI did not take pending software int. #2 in SISR ! 8: # R1 = current PSL after REI; R2 = SISR ! 9: # R8 = PC of REI instruction ! 10: # 3 - MTPR to SIRR did not cause initerrupt ! 11: # R1 = current PSL ; R2 = SISR ! 12: # R8 = PC of MTPR instruction ! 13: # 4 - Unexpected software interrupt ! 14: # R1 = current PSL ; R2 = PC pushed on the stack ! 15: # R3 = PSL pushed on the stack ! 16: # R4 = SISR ! 17: # 5 - Error in PC pushed on the stack after software interrupt ! 18: # R1 = Actual PC ; R2 = Expected PC ! 19: # R8 = PC of REI that caused software interrupt. ! 20: # 6 - PSL is not saved on the stack after software interrupt ! 21: # R8 = PC of REI that caused software interrupt. ! 22: # 7 - Too many paramters pushed on the stack ! 23: # R8 = PC of REI that caused software interrupt. ! 24: # 8 - Cuurent PSL_IPL is not set to expected value after int. ! 25: # R1 = PSL after taking interrupt. ! 26: # R2 = Expected PSL_IPL ! 27: # ! 28: .globl _sftint_evt ! 29: _sftint_evt: ! 30: .word 0x1ff ! 31: mtpr $31,$IPL ! 32: movab (sp),_savvec0 /* Save current SP */ ! 33: mtpr _savvec0,$ISP ! 34: movl _scb+SIVEC1-4,_savvec2 /*save vector for soft int #2 */ ! 35: movab _scb+SIVEC1-8,_savvec3 /*save vector for soft int#3 */ ! 36: movab vecvec4,_scb+SIVEC1-4 /*new vector */ ! 37: movab vecvec4,_scb+SIVEC1-8 /*new vector */ ! 38: movl $-1,-(sp) /*marker on SP to be checked */ ! 39: /* after taken interrupt. */ ! 40: movab _pcb0,r1 /* Partialy set PCB0 */ ! 41: mtpr r1,$PCBB ! 42: movab (sp),_pcb0 /*ksp in pcb0 */ ! 43: movab (sp),_pcb0+4 /*usp in pcb0 */ ! 44: ! 45: movpsl r1 /*if not kernel mode, then force*/ ! 46: bitl $0x01000000,r1 /*kernel mode */ ! 47: beql 1f ! 48: movl _scb+PINSTVEC,_savvec3 ! 49: movab forckmd,_scb+PINSTVEC ! 50: halt /*halt in USER mode to force */ ! 51: /*K mode in psl */ ! 52: .align 2 ! 53: forckmd: ! 54: addl2 $8,sp /*get rid of trash on the stack */ ! 55: movl _savvec3,_scb+PINSTVEC /*restore vector */ ! 56: ! 57: 1: ! 58: movl $-1,r7 ! 59: mtpr $2,$SIRR /* Software request interrupt at IPL 2 */ ! 60: /* current IPL is 31 so SISR is set at 2 */ ! 61: mtpr $3,$IPL /* lower current IPL to 3 */ ! 62: movl $2,r7 /* R7 = flag to be check in int. handler */ ! 63: movpsl r1 ! 64: andl2 $0xffe10000,r1 /* REI to process has IPL #1 */ ! 65: movl r1,-(sp) /* Set up PC,PSL for REI */ ! 66: movab error,r5 /* R5 = Expected PC on SP after interrupt */ ! 67: movl r5,-(sp) ! 68: movab pc1,r6 /* R6 = return address from exception */ ! 69: movab spc1,r8 ! 70: spc1: ! 71: rei /* This should take soft int#2 */ ! 72: ! 73: movl $1,r0 ! 74: jmp *badrtn /* Error : REI fell thru */ ! 75: error: ! 76: movl $2,r0 /* Error : REI did not take soft int#2 */ ! 77: movpsl r1 /* pending in SISR; R1 = current PSL */ ! 78: mfpr $SISR,r2 /* R2 = SISR */ ! 79: jmp *badrtn ! 80: pc1: ! 81: movab eee,r6 /* R6 = address to return from exception */ ! 82: movab exp1,r5 /* R5 = expected address after taken int */ ! 83: movl $3,r7 /* R7 = flag to be check in int. handler */ ! 84: movab spc2,r8 ! 85: spc2: ! 86: mtpr $3,$SIRR /* At this point ipl = 2, and so we */ ! 87: /* should get int at level #3 */ ! 88: exp1: movl $3,r0 /* Error : MTPR to SIRR did not cause */ ! 89: movpsl r1 /* soft interrupt #3 */ ! 90: mfpr $SISR,r2 /* R2 = SISR, R1 = current PSL */ ! 91: jmp *badrtn ! 92: ! 93: .align 2 /* SOFTWARE interrupt #2 handler */ ! 94: vecvec4: ! 95: cmpl $-1,r7 /* If R7 == -1 then unexpected interrupt */ ! 96: bneq 1f ! 97: movpsl r1 /* Error : Took int when PSL_IPL was greater */ ! 98: movl (sp)+,r2 /* or equal to the one set by MTPR in SIRR */ ! 99: movl (sp)+,r3 /* R0 = error code, R1 = current PSL */ ! 100: mfpr $SISR,r4 /* R2 = PC on SP , R3 = PSL on SP, R4 = SISR */ ! 101: movl $4,r0 ! 102: jmp *badrtn ! 103: 1: ! 104: movl (sp)+,r1 /* R1 = PC from SP */ ! 105: movl r5,r2 /* R2 = expected PC */ ! 106: cmpl r1,r2 ! 107: beql 1f ! 108: movl $5,r0 /* Error : Actual PC not same as expected */ ! 109: jmp *badrtn ! 110: ! 111: 1: movl (sp)+,r1 /* R1 = PSL from SP */ ! 112: cmpl $-1,r1 /* If -1, then it is not PSL */ ! 113: bneq 1f ! 114: movl $6,r0 ! 115: jmp *badrtn /* Error - PSL not saved on the stack */ ! 116: /* after Soft interrupt; */ ! 117: 1: ! 118: cmpl $-1,(sp) /* SP should be pointing at the marker at */ ! 119: beql 1f /* this point, otherwise error */ ! 120: movl $7,r0 ! 121: jmp *badrtn /* Too many longwords pushed on the */ ! 122: /* SP after software interrupt */ ! 123: 1: ! 124: movpsl r1 /* R1 = current PSL after taken interrupt */ ! 125: andl2 $0x001f0000,r1 /* Mask out all other bits except IPL */ ! 126: cmpl $3,r7 /* Soft #3 interrupt? */ ! 127: bneq 1f ! 128: cmpl $0x00030000,r1 /* Did IPL set to 3 after taken int. ? */ ! 129: beql 2f ! 130: brb 5f ! 131: 1: cmpl $0x00020000,r1 /* Did IPL set to 2 after taken int. ? */ ! 132: beql 2f ! 133: 5: movl $8,r0 /* Error : PSL_IPL not set to expected */ ! 134: movpsl r1 /* value after taking interrupt */ ! 135: movl r7,r2 ! 136: jmp *badrtn ! 137: 2: ! 138: movpsl -(sp) /* Set PSL & PC on the stack for return */ ! 139: movl r6,-(sp) /* R6 must have been loaded previously */ ! 140: mtpr $31,$IPL ! 141: rei ! 142: halt /* Should never come here */ ! 143: ! 144: ! 145: /* Restore original state of SP, PSL & vectors */ ! 146: eee: ! 147: movl _savvec2,_scb+SIVEC1-4 ! 148: movl _savvec3,_scb+SIVEC1-8 ! 149: mtpr $31,$IPL ! 150: movl _savvec0,sp ! 151: ret ! 152:
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