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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / fpevent|
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1.1 ! root 1: 1 00000000 LL0: ! 2: 2 00000000 .data ! 3: 3 000006bc * .text ! 4: 4 00000000 .align 1 ! 5: 5 00000000 .globl _prt_evt_er_msg ! 6: 6 00000000 _prt_evt_er_msg: ! 7: 7 0000C9F0 0000 .word L382 ! 8: 8 0000C9F2 # ! 9: 9 0000C9F2 # #include "evt_defs.h" ! 10: 10 0000C9F2 # ! 11: 11 0000C9F2 # /*********************************************************************** ! 12: 12 0000C9F2 # * ! 13: 13 0000C9F2 # * COMMON ROUTINES FOR THE DEMAND PAGING TESTS ! 14: 14 0000C9F2 # * ! 15: 15 0000C9F2 # ***********************************************************************/ ! 16: 16 0000C9F2 # ! 17: 17 0000C9F2 # ! 18: 18 0000C9F2 # ! 19: 19 0000C9F2 # /* ! 20: 20 0000C9F2 # *********************************************************************** ! 21: 21 0000C9F2 # * Print an FPP Events Test Error Message ! 22: 22 0000C9F2 # * ! 23: 23 0000C9F2 # * cycle: xx. EVT test xx. < your message here > ! 24: 24 0000C9F2 # * instr: <inst name> <event type> {( disabled )} -data index = xx ! 25: 25 0000C9F2 # * addressing mode: <addressing mode description> ! 26: 26 0000C9F2 # * { piped entry test #x. <instruction buffer description> } ! 27: 27 0000C9F2 # * inst_buf = xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx ! 28: 28 0000C9F2 # * initial ACC. = xxxxxxxx xxxxxxxx, operand 1 = xxxxxxxx xxxxxxxxx ! 29: 29 0000C9F2 # * final ACC. = xxxxxxxx xxxxxxxx, operand 2 = xxxxxxxx xxxxxxxxx ! 30: 30 0000C9F2 # *********************************************************************** ! 31: 31 0000C9F2 # */ ! 32: 32 0000C9F2 # prt_evt_er_msg( msg ) ! 33: 33 0000C9F2 # char *msg; ! 34: 34 0000C9F2 # { ! 35: 35 0000C9F2 13 02ea jbr L384 ! 36: 36 0000C9F5 L385: ! 37: 37 0000C9F5 # writes("\ncycle: "); ! 38: 38 0000C9F5 .data 1 ! 39: 39 000006bc * L387: ! 40: 40 000006bc * 0A6379636C653A2000 .ascii "\12cycle: \0" ! 41: 41 000006c5 * .text ! 42: 42 0000C9F5 dd 8f000006bc pushl $L387 ! 43: 43 0000C9FB fe 08 efffffffee callf $8,_writes ! 44: 44 0000CA02 # writed( cycle ); /* print the cycle # */ ! 45: 45 0000CA02 dd efffffffe8 pushl _cycle ! 46: 46 0000CA08 fe 08 efffffffe1 callf $8,_writed ! 47: 47 0000CA0F # writes(". EVT test "); ! 48: 48 0000CA0F .data 1 ! 49: 49 000006c5 * L389: ! 50: 50 000006c5 * 2E2045565420746573742000 .ascii ". EVT test \0" ! 51: 51 000006d1 * .text ! 52: 52 0000CA0F dd 8f000006c5 pushl $L389 ! 53: 53 0000CA15 fe 08 efffffffd4 callf $8,_writes ! 54: 54 0000CA1C # writeh( test_no ); /* print the test # */ ! 55: 55 0000CA1C dd efffffffce pushl _test_no ! 56: 56 0000CA22 fe 08 efffffffc7 callf $8,_writeh ! 57: 57 0000CA29 # writes(". "); ! 58: 58 0000CA29 .data 1 ! 59: 59 000006d1 * L391: ! 60: 60 000006d1 * 2E2000 .ascii ". \0" ! 61: 61 000006d4 * .text ! 62: 62 0000CA29 dd 8f000006d1 pushl $L391 ! 63: 63 0000CA2F fe 08 efffffffba callf $8,_writes ! 64: 64 0000CA36 # writes( msg ); /* print the error msg */ ! 65: 65 0000CA36 dd ad04 pushl 4(fp) ! 66: 66 0000CA39 fe 08 efffffffb0 callf $8,_writes ! 67: 67 0000CA40 # writes("\ninstr: "); ! 68: 68 0000CA40 .data 1 ! 69: 69 000006d4 * L392: ! 70: 70 000006d4 * 0A696E7374723A2000 .ascii "\12instr: \0" ! 71: 71 000006dd * .text ! 72: 72 0000CA40 dd 8f000006d4 pushl $L392 ! 73: 73 0000CA46 fe 08 efffffffa3 callf $8,_writes ! 74: 74 0000CA4D # writes( op_name ); /* print the inst name */ ! 75: 75 0000CA4D dd efffffff9d pushl _op_name ! 76: 76 0000CA53 fe 08 efffffff96 callf $8,_writes ! 77: 77 0000CA5A # writes(" Event: "); ! 78: 78 0000CA5A .data 1 ! 79: 79 000006dd * L393: ! 80: 80 000006dd * 20204576656E743A2000 .ascii " Event: \0" ! 81: 81 000006e7 * .text ! 82: 82 0000CA5A dd 8f000006dd pushl $L393 ! 83: 83 0000CA60 fe 08 efffffff89 callf $8,_writes ! 84: 84 0000CA67 # writes( event_msg ); /* print the event type */ ! 85: 85 0000CA67 dd efffffff83 pushl _event_msg ! 86: 86 0000CA6D fe 08 efffffff7c callf $8,_writes ! 87: 87 0000CA74 # if( evt_disabled ) ! 88: 88 0000CA74 5d efffffff76 tstl _evt_disabled ! 89: 89 0000CA7A 31 0d jeql L394 ! 90: 90 0000CA7C # writes(" ( disabled )"); ! 91: 91 0000CA7C .data 1 ! 92: 92 000006e7 * L395: ! 93: 93 000006e7 * 20282064697361626C6564202 .ascii " ( disabled )\0" ! 94: 900 ! 95: 94 000006f5 * .text ! 96: 95 0000CA7C dd 8f000006e7 pushl $L395 ! 97: 96 0000CA82 fe 08 efffffff67 callf $8,_writes ! 98: 97 0000CA89 # writes(" -data index = "); /* print the data index */ ! 99: 98 0000CA89 L394: ! 100: 99 0000CA89 .data 1 ! 101: 100 000006f5 * L396: ! 102: 101 000006f5 * 2020202D6461746120696E646 .ascii " -data index = \0" ! 103: 578203D2000 ! 104: 102 00000707 * .text ! 105: 103 0000CA89 dd 8f000006f5 pushl $L396 ! 106: 104 0000CA8F fe 08 efffffff5a callf $8,_writes ! 107: 105 0000CA96 # writed( index ); ! 108: 106 0000CA96 dd efffffff54 pushl _index ! 109: 107 0000CA9C fe 08 efffffff4d callf $8,_writed ! 110: 108 0000CAA3 # if( no_ops ) { ! 111: 109 0000CAA3 5d efffffff47 tstl _no_ops ! 112: 110 0000CAA9 31 22 jeql L397 ! 113: 111 0000CAAB # writes("\naddressing mode: "); ! 114: 112 0000CAAB .data 1 ! 115: 113 00000707 * L398: ! 116: 114 00000707 * 0A61646472657373696E67206 .ascii "\12addressing mode: \0" ! 117: D6F64653A2000 ! 118: 115 0000071a * .text ! 119: 116 0000CAAB dd 8f00000707 pushl $L398 ! 120: 117 0000CAB1 fe 08 efffffff38 callf $8,_writes ! 121: 118 0000CAB8 # writes( addressing_modes[ addr_mode ] ); ! 122: 119 0000CAB8 0d efffffff32 50 movl _addr_mode,r0 ! 123: 120 0000CABF dd 40efffffff2a pushl _addressing_modes[r0] ! 124: 121 0000CAC6 fe 08 efffffff23 callf $8,_writes ! 125: 122 0000CACD # } ! 126: 123 0000CACD # if( pipe_test ) { ! 127: 124 0000CACD L397: ! 128: 125 0000CACD 5d efffffff1d tstl _pipe_test ! 129: 126 0000CAD3 21 03 13 00c4 jeql L399 ! 130: 127 0000CAD8 # writes("\npiped entry test #"); ! 131: 128 0000CAD8 .data 1 ! 132: 129 0000071a * L400: ! 133: 130 0000071a * 0A706970656420656E7472792 .ascii "\12piped entry test #\0" ! 134: 074657374202300 ! 135: 131 0000072e * .text ! 136: 132 0000CAD8 dd 8f0000071a pushl $L400 ! 137: 133 0000CADE fe 08 efffffff0b callf $8,_writes ! 138: 134 0000CAE5 # writed( pipe_test ); /* print the pipe test # */ ! 139: 135 0000CAE5 dd efffffff05 pushl _pipe_test ! 140: 136 0000CAEB fe 08 effffffefe callf $8,_writed ! 141: 137 0000CAF2 # writes(". "); ! 142: 138 0000CAF2 .data 1 ! 143: 139 0000072e * L401: ! 144: 140 0000072e * 2E202000 .ascii ". \0" ! 145: 141 00000732 * .text ! 146: 142 0000CAF2 dd 8f0000072e pushl $L401 ! 147: 143 0000CAF8 fe 08 effffffef1 callf $8,_writes ! 148: 144 0000CAFF # if( pipe_inst1 == LDD_OP_CODE ) ! 149: 145 0000CAFF 1d effffffeeb 07 cmpl _pipe_inst1,$7 ! 150: 146 0000CB06 21 0f jneq L402 ! 151: 147 0000CB08 # writes("LDD (initial acc), "); ! 152: 148 0000CB08 .data 1 ! 153: 149 00000732 * L403: ! 154: 150 00000732 * 4C44442028696E697469616C2 .ascii "LDD (initial acc), \0" ! 155: 0616363292C2000 ! 156: 151 00000746 * .text ! 157: 152 0000CB08 dd 8f00000732 pushl $L403 ! 158: 153 0000CB0E fe 08 effffffedb callf $8,_writes ! 159: 154 0000CB15 # else if( pipe_inst1 == LDF_OP_CODE ) ! 160: 155 0000CB15 11 4a jbr L404 ! 161: 156 0000CB17 L402: ! 162: 157 0000CB17 1d effffffed3 06 cmpl _pipe_inst1,$6 ! 163: 158 0000CB1E 21 0f jneq L405 ! 164: 159 0000CB20 # writes("LDF (initial acc), "); ! 165: 160 0000CB20 .data 1 ! 166: 161 00000746 * L406: ! 167: 162 00000746 * 4C44462028696E697469616C2 .ascii "LDF (initial acc), \0" ! 168: 0616363292C2000 ! 169: 163 0000075a * .text ! 170: 164 0000CB20 dd 8f00000746 pushl $L406 ! 171: 165 0000CB26 fe 08 effffffec3 callf $8,_writes ! 172: 166 0000CB2D # else if( pipe_inst1 == MULD_OP_CODE ) ! 173: 167 0000CB2D 11 32 jbr L407 ! 174: 168 0000CB2F L405: ! 175: 169 0000CB2F 1d effffffebb 8900e7 cmpl _pipe_inst1,$231 ! 176: 170 0000CB38 21 0f jneq L408 ! 177: 171 0000CB3A # writes("MULD (1.0), "); ! 178: 172 0000CB3A .data 1 ! 179: 173 0000075a * L409: ! 180: 174 0000075a * 4D554C442028312E30292C200 .ascii "MULD (1.0), \0" ! 181: 0 ! 182: 175 00000767 * .text ! 183: 176 0000CB3A dd 8f0000075a pushl $L409 ! 184: 177 0000CB40 fe 08 effffffea9 callf $8,_writes ! 185: 178 0000CB47 # else if( pipe_inst1 == MULF_OP_CODE ) ! 186: 179 0000CB47 11 18 jbr L410 ! 187: 180 0000CB49 L408: ! 188: 181 0000CB49 1d effffffea1 8900e6 cmpl _pipe_inst1,$230 ! 189: 182 0000CB52 21 0d jneq L411 ! 190: 183 0000CB54 # writes("MULF (1.0), "); ! 191: 184 0000CB54 .data 1 ! 192: 185 00000767 * L412: ! 193: 186 00000767 * 4D554C462028312E30292C200 .ascii "MULF (1.0), \0" ! 194: 0 ! 195: 187 00000774 * .text ! 196: 188 0000CB54 dd 8f00000767 pushl $L412 ! 197: 189 0000CB5A fe 08 effffffe8f callf $8,_writes ! 198: 190 0000CB61 # writes( op_name ); ! 199: 191 0000CB61 L411: ! 200: 192 0000CB61 L410: ! 201: 193 0000CB61 L407: ! 202: 194 0000CB61 L404: ! 203: 195 0000CB61 dd effffffe89 pushl _op_name ! 204: 196 0000CB67 fe 08 effffffe82 callf $8,_writes ! 205: 197 0000CB6E # if( no_ops == 1 ) ! 206: 198 0000CB6E 1d effffffe7c 01 cmpl _no_ops,$1 ! 207: 199 0000CB75 21 0f jneq L413 ! 208: 200 0000CB77 # writes(" (operand)"); ! 209: 201 0000CB77 .data 1 ! 210: 202 00000774 * L414: ! 211: 203 00000774 * 20286F706572616E642900 .ascii " (operand)\0" ! 212: 204 0000077f * .text ! 213: 205 0000CB77 dd 8f00000774 pushl $L414 ! 214: 206 0000CB7D fe 08 effffffe6c callf $8,_writes ! 215: 207 0000CB84 # else if( no_ops == 2 ) ! 216: 208 0000CB84 11 16 jbr L415 ! 217: 209 0000CB86 L413: ! 218: 210 0000CB86 1d effffffe64 02 cmpl _no_ops,$2 ! 219: 211 0000CB8D 21 0d jneq L416 ! 220: 212 0000CB8F # writes(" (op #1, op #2)"); ! 221: 213 0000CB8F .data 1 ! 222: 214 0000077f * L417: ! 223: 215 0000077f * 20286F702023312C206F70202 .ascii " (op #1, op #2)\0" ! 224: 3322900 ! 225: 216 0000078f * .text ! 226: 217 0000CB8F dd 8f0000077f pushl $L417 ! 227: 218 0000CB95 fe 08 effffffe54 callf $8,_writes ! 228: 219 0000CB9C # } ! 229: 220 0000CB9C L416: ! 230: 221 0000CB9C L415: ! 231: 222 0000CB9C # print_inst_buf(); /* print the inst buf contents */ ! 232: 223 0000CB9C L399: ! 233: 224 0000CB9C fe 04 ef0000013f callf $4,_print_inst_buf ! 234: 225 0000CBA3 # writes("initial ACC. = "); ! 235: 226 0000CBA3 .data 1 ! 236: 227 0000078f * L419: ! 237: 228 0000078f * 696E697469616C204143432E2 .ascii "initial ACC. = \0" ! 238: 03D2000 ! 239: 229 0000079f * .text ! 240: 230 0000CBA3 dd 8f0000078f pushl $L419 ! 241: 231 0000CBA9 fe 08 effffffe40 callf $8,_writes ! 242: 232 0000CBB0 # write32h( dbl_ld_acc.m ); ! 243: 233 0000CBB0 dd effffffe3a pushl _dbl_ld_acc ! 244: 234 0000CBB6 fe 08 effffffe33 callf $8,_write32h ! 245: 235 0000CBBD # if( precision == DBL ) { ! 246: 236 0000CBBD 1d effffffe2d 02 cmpl _precision,$2 ! 247: 237 0000CBC4 21 16 jneq L421 ! 248: 238 0000CBC6 # writec(' '); ! 249: 239 0000CBC6 dd 20 pushl $32 ! 250: 240 0000CBC8 fe 08 effffffe21 callf $8,_writec ! 251: 241 0000CBCF # write32h( dbl_ld_acc.l ); ! 252: 242 0000CBCF dd effffffe1f pushl _dbl_ld_acc+4 ! 253: 243 0000CBD5 fe 08 effffffe14 callf $8,_write32h ! 254: 244 0000CBDC # } ! 255: 245 0000CBDC # if( no_ops ) { ! 256: 246 0000CBDC L421: ! 257: 247 0000CBDC 5d effffffe0e tstl _no_ops ! 258: 248 0000CBE2 31 69 jeql L423 ! 259: 249 0000CBE4 # if( (op_code == CVFL_OP_CODE) || (op_code == CVDL_OP_CODE) ) ! 260: 250 0000CBE4 1d effffffe06 890086 cmpl _op_code,$134 ! 261: 251 0000CBED 31 0b jeql L9999 ! 262: 252 0000CBEF 1d effffffdfb 890087 cmpl _op_code,$135 ! 263: 253 0000CBF8 21 0f jneq L424 ! 264: 254 0000CBFA L9999: ! 265: 255 0000CBFA # writes(", stored value = "); ! 266: 256 0000CBFA .data 1 ! 267: 257 0000079f * L425: ! 268: 258 0000079f * 2C20202073746F72656420766 .ascii ", stored value = \0" ! 269: 16C7565203D2000 ! 270: 259 000007b3 * .text ! 271: 260 0000CBFA dd 8f0000079f pushl $L425 ! 272: 261 0000CC00 fe 08 effffffde9 callf $8,_writes ! 273: 262 0000CC07 # else ! 274: 263 0000CC07 11 0d jbr L426 ! 275: 264 0000CC09 L424: ! 276: 265 0000CC09 # writes(", operand 1 = "); ! 277: 266 0000CC09 .data 1 ! 278: 267 000007b3 * L427: ! 279: 268 000007b3 * 2C2020206F706572616E64203 .ascii ", operand 1 = \0" ! 280: 1203D2000 ! 281: 269 000007c4 * .text ! 282: 270 0000CC09 dd 8f000007b3 pushl $L427 ! 283: 271 0000CC0F fe 08 effffffdda callf $8,_writes ! 284: 272 0000CC16 L426: ! 285: 273 0000CC16 # write32h( dbl_value_1.m ); ! 286: 274 0000CC16 dd effffffdd4 pushl _dbl_value_1 ! 287: 275 0000CC1C fe 08 effffffdcd callf $8,_write32h ! 288: 276 0000CC23 # if( precision == DBL ) { ! 289: 277 0000CC23 1d effffffdc7 02 cmpl _precision,$2 ! 290: 278 0000CC2A 21 16 jneq L428 ! 291: 279 0000CC2C # writec(' '); ! 292: 280 0000CC2C dd 20 pushl $32 ! 293: 281 0000CC2E fe 08 effffffdbb callf $8,_writec ! 294: 282 0000CC35 # write32h( dbl_value_1.l ); ! 295: 283 0000CC35 dd effffffdb9 pushl _dbl_value_1+4 ! 296: 284 0000CC3B fe 08 effffffdae callf $8,_write32h ! 297: 285 0000CC42 # } ! 298: 286 0000CC42 # writec('\n'); ! 299: 287 0000CC42 L428: ! 300: 288 0000CC42 dd 0a pushl $10 ! 301: 289 0000CC44 fe 08 effffffda5 callf $8,_writec ! 302: 290 0000CC4B # } else ! 303: 291 0000CC4B 11 0d jbr L429 ! 304: 292 0000CC4D L423: ! 305: 293 0000CC4D # writes(", "); ! 306: 294 0000CC4D .data 1 ! 307: 295 000007c4 * L430: ! 308: 296 000007c4 * 2C2000 .ascii ", \0" ! 309: 297 000007c7 * .text ! 310: 298 0000CC4D dd 8f000007c4 pushl $L430 ! 311: 299 0000CC53 fe 08 effffffd96 callf $8,_writes ! 312: 300 0000CC5A L429: ! 313: 301 0000CC5A # writes(" final ACC. = "); ! 314: 302 0000CC5A .data 1 ! 315: 303 000007c7 * L431: ! 316: 304 000007c7 * 202066696E616C204143432E2 .ascii " final ACC. = \0" ! 317: 03D2000 ! 318: 305 000007d7 * .text ! 319: 306 0000CC5A dd 8f000007c7 pushl $L431 ! 320: 307 0000CC60 fe 08 effffffd89 callf $8,_writes ! 321: 308 0000CC67 # write32h( dbl_st_acc.m ); ! 322: 309 0000CC67 dd effffffd83 pushl _dbl_st_acc ! 323: 310 0000CC6D fe 08 effffffd7c callf $8,_write32h ! 324: 311 0000CC74 # if( precision == DBL ) { ! 325: 312 0000CC74 1d effffffd76 02 cmpl _precision,$2 ! 326: 313 0000CC7B 21 16 jneq L432 ! 327: 314 0000CC7D # writec(' '); ! 328: 315 0000CC7D dd 20 pushl $32 ! 329: 316 0000CC7F fe 08 effffffd6a callf $8,_writec ! 330: 317 0000CC86 # write32h( dbl_st_acc.l ); ! 331: 318 0000CC86 dd effffffd68 pushl _dbl_st_acc+4 ! 332: 319 0000CC8C fe 08 effffffd5d callf $8,_write32h ! 333: 320 0000CC93 # } ! 334: 321 0000CC93 # if( no_ops == 2) { ! 335: 322 0000CC93 L432: ! 336: 323 0000CC93 1d effffffd57 02 cmpl _no_ops,$2 ! 337: 324 0000CC9A 21 39 jneq L433 ! 338: 325 0000CC9C # writes(", operand 2 = "); ! 339: 326 0000CC9C .data 1 ! 340: 327 000007d7 * L434: ! 341: 328 000007d7 * 2C2020206F706572616E64203 .ascii ", operand 2 = \0" ! 342: 2203D2000 ! 343: 329 000007e8 * .text ! 344: 330 0000CC9C dd 8f000007d7 pushl $L434 ! 345: 331 0000CCA2 fe 08 effffffd47 callf $8,_writes ! 346: 332 0000CCA9 # write32h( dbl_value_2.m ); ! 347: 333 0000CCA9 dd effffffd41 pushl _dbl_value_2 ! 348: 334 0000CCAF fe 08 effffffd3a callf $8,_write32h ! 349: 335 0000CCB6 # if( precision == DBL ) { ! 350: 336 0000CCB6 1d effffffd34 02 cmpl _precision,$2 ! 351: 337 0000CCBD 21 16 jneq L435 ! 352: 338 0000CCBF # writec(' '); ! 353: 339 0000CCBF dd 20 pushl $32 ! 354: 340 0000CCC1 fe 08 effffffd28 callf $8,_writec ! 355: 341 0000CCC8 # write32h( dbl_value_2.l ); ! 356: 342 0000CCC8 dd effffffd26 pushl _dbl_value_2+4 ! 357: 343 0000CCCE fe 08 effffffd1b callf $8,_write32h ! 358: 344 0000CCD5 # } ! 359: 345 0000CCD5 # } ! 360: 346 0000CCD5 L435: ! 361: 347 0000CCD5 # writec('\n'); ! 362: 348 0000CCD5 L433: ! 363: 349 0000CCD5 dd 0a pushl $10 ! 364: 350 0000CCD7 fe 08 effffffd12 callf $8,_writec ! 365: 351 0000CCDE # } ! 366: 352 0000CCDE 40 ret#2 ! 367: 353 0000CCDF .set L382,0x0 ! 368: 354 0000CCDF L384: ! 369: 355 0000CCDF 13 fd13 jbr L385 ! 370: 356 0000CCE2 .data ! 371: 357 000006bc * .text ! 372: 358 0000CCE2 .align 1 ! 373: 359 0000CCE2 .globl _print_inst_buf ! 374: 360 0000CCE2 _print_inst_buf: ! 375: 361 0000CCE2 0000 .word L436 ! 376: 362 0000CCE4 # ! 377: 363 0000CCE4 # ! 378: 364 0000CCE4 # ! 379: 365 0000CCE4 # /* ! 380: 366 0000CCE4 # ******************************************************************* ! 381: 367 0000CCE4 # * print the contents of the instruction buffer ! 382: 368 0000CCE4 # ******************************************************************* ! 383: 369 0000CCE4 # */ ! 384: 370 0000CCE4 # print_inst_buf() ! 385: 371 0000CCE4 # { ! 386: 372 0000CCE4 11 58 jbr L438 ! 387: 373 0000CCE6 L439: ! 388: 374 0000CCE6 # writes("\ninst buf="); ! 389: 375 0000CCE6 .data 1 ! 390: 376 000007e8 * L440: ! 391: 377 000007e8 * 0A696E7374206275663D00 .ascii "\12inst buf=\0" ! 392: 378 000007f3 * .text ! 393: 379 0000CCE6 dd 8f000007e8 pushl $L440 ! 394: 380 0000CCEC fe 08 effffffcfd callf $8,_writes ! 395: 381 0000CCF3 # write_lw_bytes( inst_buf[0] ); /* print word 0 as bytes */ ! 396: 382 0000CCF3 dd effffffcf7 pushl _inst_buf ! 397: 383 0000CCF9 fe 08 ef00000040 callf $8,_write_lw_bytes ! 398: 384 0000CD00 # write_lw_bytes( inst_buf[1] ); /* print word 1 as bytes */ ! 399: 385 0000CD00 dd effffffcee pushl _inst_buf+4 ! 400: 386 0000CD06 fe 08 ef00000033 callf $8,_write_lw_bytes ! 401: 387 0000CD0D # write_lw_bytes( inst_buf[2] ); /* print word 2 as bytes */ ! 402: 388 0000CD0D dd effffffce5 pushl _inst_buf+8 ! 403: 389 0000CD13 fe 08 ef00000026 callf $8,_write_lw_bytes ! 404: 390 0000CD1A # write_lw_bytes( inst_buf[3] ); /* print word 2 as bytes */ ! 405: 391 0000CD1A dd effffffcdc pushl _inst_buf+12 ! 406: 392 0000CD20 fe 08 ef00000019 callf $8,_write_lw_bytes ! 407: 393 0000CD27 # write_lw_bytes( inst_buf[4] ); /* print word 2 as bytes */ ! 408: 394 0000CD27 dd effffffcd3 pushl _inst_buf+16 ! 409: 395 0000CD2D fe 08 ef0000000c callf $8,_write_lw_bytes ! 410: 396 0000CD34 # writec('\n'); ! 411: 397 0000CD34 dd 0a pushl $10 ! 412: 398 0000CD36 fe 08 effffffcb3 callf $8,_writec ! 413: 399 0000CD3D # } ! 414: 400 0000CD3D 40 ret#2 ! 415: 401 0000CD3E .set L436,0x0 ! 416: 402 0000CD3E L438: ! 417: 403 0000CD3E 11 a6 jbr L439 ! 418: 404 0000CD40 .data ! 419: 405 000006bc * .text ! 420: 406 0000CD40 .align 1 ! 421: 407 0000CD40 .globl _write_lw_bytes ! 422: 408 0000CD40 _write_lw_bytes: ! 423: 409 0000CD40 0000 .word L442 ! 424: 410 0000CD42 # ! 425: 411 0000CD42 # ! 426: 412 0000CD42 # ! 427: 413 0000CD42 # /* ! 428: 414 0000CD42 # ******************************************************************* ! 429: 415 0000CD42 # * print a longword a byte at a time ! 430: 416 0000CD42 # ******************************************************************* ! 431: 417 0000CD42 # */ ! 432: 418 0000CD42 # write_lw_bytes( lw ) ! 433: 419 0000CD42 # int lw; ! 434: 420 0000CD42 # { ! 435: 421 0000CD42 13 00aa jbr L444 ! 436: 422 0000CD45 L445: ! 437: 423 0000CD45 # writec(' '); ! 438: 424 0000CD45 dd 20 pushl $32 ! 439: 425 0000CD47 fe 08 effffffca2 callf $8,_writec ! 440: 426 0000CD4E # writeh( (lw >> 28) & 0xf ); ! 441: 427 0000CD4E 5e 1c ad04 50 shar $28,4(fp),r0 ! 442: 428 0000CD53 ac 0f 50 andl2 $15,r0 ! 443: 429 0000CD56 dd 50 pushl r0 ! 444: 430 0000CD58 fe 08 effffffc91 callf $8,_writeh ! 445: 431 0000CD5F # writeh( (lw >> 24) & 0xf ); ! 446: 432 0000CD5F 5e 18 ad04 50 shar $24,4(fp),r0 ! 447: 433 0000CD64 ac 0f 50 andl2 $15,r0 ! 448: 434 0000CD67 dd 50 pushl r0 ! 449: 435 0000CD69 fe 08 effffffc80 callf $8,_writeh ! 450: 436 0000CD70 # writec(' '); ! 451: 437 0000CD70 dd 20 pushl $32 ! 452: 438 0000CD72 fe 08 effffffc77 callf $8,_writec ! 453: 439 0000CD79 # writeh( (lw >> 20) & 0xf ); ! 454: 440 0000CD79 5e 14 ad04 50 shar $20,4(fp),r0 ! 455: 441 0000CD7E ac 0f 50 andl2 $15,r0 ! 456: 442 0000CD81 dd 50 pushl r0 ! 457: 443 0000CD83 fe 08 effffffc66 callf $8,_writeh ! 458: 444 0000CD8A # writeh( (lw >> 16) & 0xf ); ! 459: 445 0000CD8A 5e 10 ad04 50 shar $16,4(fp),r0 ! 460: 446 0000CD8F ac 0f 50 andl2 $15,r0 ! 461: 447 0000CD92 dd 50 pushl r0 ! 462: 448 0000CD94 fe 08 effffffc55 callf $8,_writeh ! 463: 449 0000CD9B # writec(' '); ! 464: 450 0000CD9B dd 20 pushl $32 ! 465: 451 0000CD9D fe 08 effffffc4c callf $8,_writec ! 466: 452 0000CDA4 # writeh( (lw >> 12) & 0xf ); ! 467: 453 0000CDA4 5e 0c ad04 50 shar $12,4(fp),r0 ! 468: 454 0000CDA9 ac 0f 50 andl2 $15,r0 ! 469: 455 0000CDAC dd 50 pushl r0 ! 470: 456 0000CDAE fe 08 effffffc3b callf $8,_writeh ! 471: 457 0000CDB5 # writeh( (lw >> 8) & 0xf ); ! 472: 458 0000CDB5 5e 08 ad04 50 shar $8,4(fp),r0 ! 473: 459 0000CDBA ac 0f 50 andl2 $15,r0 ! 474: 460 0000CDBD dd 50 pushl r0 ! 475: 461 0000CDBF fe 08 effffffc2a callf $8,_writeh ! 476: 462 0000CDC6 # writec(' '); ! 477: 463 0000CDC6 dd 20 pushl $32 ! 478: 464 0000CDC8 fe 08 effffffc21 callf $8,_writec ! 479: 465 0000CDCF # writeh( (lw >> 4) & 0xf ); ! 480: 466 0000CDCF 5e 04 ad04 50 shar $4,4(fp),r0 ! 481: 467 0000CDD4 ac 0f 50 andl2 $15,r0 ! 482: 468 0000CDD7 dd 50 pushl r0 ! 483: 469 0000CDD9 fe 08 effffffc10 callf $8,_writeh ! 484: 470 0000CDE0 # writeh( (lw & 0xf) ); ! 485: 471 0000CDE0 bc 0f ad04 50 andl3 $15,4(fp),r0 ! 486: 472 0000CDE5 dd 50 pushl r0 ! 487: 473 0000CDE7 fe 08 effffffc02 callf $8,_writeh ! 488: 474 0000CDEE # } ! 489: 475 0000CDEE 40 ret#2 ! 490: 476 0000CDEF .set L442,0x0 ! 491: 477 0000CDEF L444: ! 492: 478 0000CDEF 13 ff53 jbr L445 ! 493: 479 0000CDF2 .data ! 494: 480 000006bc * .text ! 495: 481 0000CDF2 .align 1 ! 496: 482 0000CDF2 .globl _event_halt ! 497: 483 0000CDF2 _event_halt: ! 498: 484 0000CDF2 0000 .word L447 ! 499: 485 0000CDF4 # ! 500: 486 0000CDF4 # ! 501: 487 0000CDF4 # ! 502: 488 0000CDF4 # ! 503: 489 0000CDF4 # /* ! 504: 490 0000CDF4 # ******************************************************************** ! 505: 491 0000CDF4 # * ! 506: 492 0000CDF4 # * ERROR HALT ROUTINE ( for non-FPM event halts ) ! 507: 493 0000CDF4 # * ! 508: 494 0000CDF4 # ******************************************************************** ! 509: 495 0000CDF4 # */ ! 510: 496 0000CDF4 # event_halt(halt_code) ! 511: 497 0000CDF4 # int halt_code; ! 512: 498 0000CDF4 # { ! 513: 499 0000CDF4 13 011b jbr L449 ! 514: 500 0000CDF7 L450: ! 515: 501 0000CDF7 # sgl_value_1 = halt_code; ! 516: 502 0000CDF7 0d ad04 effffffbf1 movl 4(fp),_sgl_value_1 ! 517: 503 0000CDFF # asm("movl _test_no,r0"); /* r0 = test number */ ! 518: 504 0000CDFF 0d effffffbeb 50 movl _test_no,r0 ! 519: 505 0000CE06 # asm("movl _op_code,r1"); /* r1 = instr's op-code */ ! 520: 506 0000CE06 0d effffffbe4 51 movl _op_code,r1 ! 521: 507 0000CE0D # asm("movl _sgl_value_1,r2"); /* r2 = error code */ ! 522: 508 0000CE0D 0d effffffbdd 52 movl _sgl_value_1,r2 ! 523: 509 0000CE14 # asm("movl _cycle,r3"); /* r3 = cycle */ ! 524: 510 0000CE14 0d effffffbd6 53 movl _cycle,r3 ! 525: 511 0000CE1B # asm("movl _addr_code,r4"); /* r4 = addressing mode */ ! 526: 512 0000CE1B 0d effffffbcf 54 movl _addr_code,r4 ! 527: 513 0000CE22 # asm("movl _index,r5"); /* r5 = data pattern index */ ! 528: 514 0000CE22 0d effffffbc8 55 movl _index,r5 ! 529: 515 0000CE29 # /* ! 530: 516 0000CE29 # * put the operands used in regs 6 - 9 ! 531: 517 0000CE29 # */ ! 532: 518 0000CE29 # if( no_ops == 2 ) { ! 533: 519 0000CE29 1d effffffbc1 02 cmpl _no_ops,$2 ! 534: 520 0000CE30 21 1e jneq L451 ! 535: 521 0000CE32 # asm("movl _dbl_value_1,r6"); /* r6 = operand 1's MSW */ ! 536: 522 0000CE32 0d effffffbb8 56 movl _dbl_value_1,r6 ! 537: 523 0000CE39 # asm("movl _dbl_value_1+4,r7"); /* r7 = operand 1's LSW */ ! 538: 524 0000CE39 0d effffffbb5 57 movl _dbl_value_1+4,r7 ! 539: 525 0000CE40 # asm("movl _dbl_value_2,r8"); /* r8 = operand 2's MSW */ ! 540: 526 0000CE40 0d effffffbaa 58 movl _dbl_value_2,r8 ! 541: 527 0000CE47 # asm("movl _dbl_value_2+4,r9"); /* r9 = operand 2's LSW */ ! 542: 528 0000CE47 0d effffffba7 59 movl _dbl_value_2+4,r9 ! 543: 529 0000CE4E # } else { ! 544: 530 0000CE4E 11 1c jbr L452 ! 545: 531 0000CE50 L451: ! 546: 532 0000CE50 # asm("movl _dbl_ld_acc,r6"); /* r6 = initial Acc's MSW */ ! 547: 533 0000CE50 0d effffffb9a 56 movl _dbl_ld_acc,r6 ! 548: 534 0000CE57 # asm("movl _dbl_ld_acc+4,r7"); /* r7 = initial Acc's LSW */ ! 549: 535 0000CE57 0d effffffb97 57 movl _dbl_ld_acc+4,r7 ! 550: 536 0000CE5E # asm("movl _dbl_value_1,r8"); /* r8 = the operand's MSW */ ! 551: 537 0000CE5E 0d effffffb8c 58 movl _dbl_value_1,r8 ! 552: 538 0000CE65 # asm("movl _dbl_value_1+4,r9"); /* r9 = the operand's LSW */ ! 553: 539 0000CE65 0d effffffb89 59 movl _dbl_value_1+4,r9 ! 554: 540 0000CE6C # }; ! 555: 541 0000CE6C L452: ! 556: 542 0000CE6C # /* ! 557: 543 0000CE6C # * now set the type specific data in regs 10 - 12 ! 558: 544 0000CE6C # */ ! 559: 545 0000CE6C # if( halt_code == BAD_PSL_HLT ) { ! 560: 546 0000CE6C 1d ad04 03 cmpl 4(fp),$3 ! 561: 547 0000CE70 21 18 jneq L453 ! 562: 548 0000CE72 # asm("movl _init_psl,r10"); /* r10 = initial PSL value */ ! 563: 549 0000CE72 0d effffffb78 5a movl _init_psl,r10 ! 564: 550 0000CE79 # asm("movl _psl_val,r11"); /* r11 = final PSL value */ ! 565: 551 0000CE79 0d effffffb71 5b movl _psl_val,r11 ! 566: 552 0000CE80 # asm("movl _exp_psl,r12"); /* r12 = expected PSL value */ ! 567: 553 0000CE80 0d effffffb6a 5c movl _exp_psl,r12 ! 568: 554 0000CE87 # } ! 569: 555 0000CE87 # else if( halt_code == PUSH_PSL_HLT ) { ! 570: 556 0000CE87 13 0086 jbr L454 ! 571: 557 0000CE8A L453: ! 572: 558 0000CE8A 1d ad04 06 cmpl 4(fp),$6 ! 573: 559 0000CE8E 21 10 jneq L455 ! 574: 560 0000CE90 # asm("movl _init_psl,r10"); /* r10 = initial PSL value */ ! 575: 561 0000CE90 0d effffffb5a 5a movl _init_psl,r10 ! 576: 562 0000CE97 # asm("movl _event_psl,r11"); /* r11 = PSL on the stack */ ! 577: 563 0000CE97 0d effffffb53 5b movl _event_psl,r11 ! 578: 564 0000CE9E # } ! 579: 565 0000CE9E # else if( halt_code == BAD_REG_HLT ) { ! 580: 566 0000CE9E 11 70 jbr L456 ! 581: 567 0000CEA0 L455: ! 582: 568 0000CEA0 1d ad04 02 cmpl 4(fp),$2 ! 583: 569 0000CEA4 21 3d jneq L457 ! 584: 570 0000CEA6 # sgl_value_1 = store_regs[reg_no]; ! 585: 571 0000CEA6 0d effffffb44 50 movl _reg_no,r0 ! 586: 572 0000CEAD 0d 40effffffb3c movl _store_regs[r0],_sgl_value_1 ! 587: effffffb37 ! 588: 573 0000CEB9 # sgl_value_2 = exp_regs[reg_no]; ! 589: 574 0000CEB9 0d effffffb31 50 movl _reg_no,r0 ! 590: 575 0000CEC0 0d 40effffffb29 movl _exp_regs[r0],_sgl_value_2 ! 591: effffffb24 ! 592: 576 0000CECC # asm("movl _reg_no,r10"); /* r10 = register # */ ! 593: 577 0000CECC 0d effffffb1e 5a movl _reg_no,r10 ! 594: 578 0000CED3 # asm("movl _sgl_value_1,r11"); /* r11 = actual reg value */ ! 595: 579 0000CED3 0d effffffb17 5b movl _sgl_value_1,r11 ! 596: 580 0000CEDA # asm("movl _sgl_value_2,r12"); /* r12 = expected reg value */ ! 597: 581 0000CEDA 0d effffffb10 5c movl _sgl_value_2,r12 ! 598: 582 0000CEE1 # } ! 599: 583 0000CEE1 # else if( halt_code == BAD_ACC_HLT ) { ! 600: 584 0000CEE1 11 2d jbr L458 ! 601: 585 0000CEE3 L457: ! 602: 586 0000CEE3 1d ad04 01 cmpl 4(fp),$1 ! 603: 587 0000CEE7 21 27 jneq L459 ! 604: 588 0000CEE9 # sgl_value_1 = dbl_expected.l; ! 605: 589 0000CEE9 0d effffffb05 effffffafc movl _dbl_expected+4,_sgl_value_1 ! 606: 590 0000CEF4 # asm("movl _dbl_st_acc,r10"); /* r10 = final Acc's MSW */ ! 607: 591 0000CEF4 0d effffffaf6 5a movl _dbl_st_acc,r10 ! 608: 592 0000CEFB # asm("movl _dbl_st_acc+4,r11"); /* r11 = final Acc's LSW */ ! 609: 593 0000CEFB 0d effffffaf3 5b movl _dbl_st_acc+4,r11 ! 610: 594 0000CF02 # asm("movl _dbl_expected,r12"); /* r12 = exp Acc's MSW */ ! 611: 595 0000CF02 0d effffffae8 5c movl _dbl_expected,r12 ! 612: 596 0000CF09 # asm("movl _sgl_value_1,r13"); /* r13 = exp Acc's LSW */ ! 613: 597 0000CF09 0d effffffae1 5d movl _sgl_value_1,r13 ! 614: 598 0000CF10 # }; ! 615: 599 0000CF10 L459: ! 616: 600 0000CF10 L458: ! 617: 601 0000CF10 L456: ! 618: 602 0000CF10 L454: ! 619: 603 0000CF10 # asm("halt"); ! 620: 604 0000CF10 00 halt ! 621: 605 0000CF11 # } ! 622: 606 0000CF11 40 ret#2 ! 623: 607 0000CF12 .set L447,0x0 ! 624: 608 0000CF12 L449: ! 625: 609 0000CF12 13 fee2 jbr L450 ! 626: 610 0000CF15 .data ! 627: 611 000006bc * .text ! 628: 612 0000CF15 00 .align 1 ! 629: 613 0000CF16 .globl _fpm_halt ! 630: 614 0000CF16 _fpm_halt: ! 631: 615 0000CF16 0000 .word L461 ! 632: 616 0000CF18 # ! 633: 617 0000CF18 # ! 634: 618 0000CF18 # ! 635: 619 0000CF18 # ! 636: 620 0000CF18 # ! 637: 621 0000CF18 # /* ! 638: 622 0000CF18 # ******************************************************************** ! 639: 623 0000CF18 # * ! 640: 624 0000CF18 # * ERROR HALT ROUTINE FOR FPM EVENT HALTS ! 641: 625 0000CF18 # * ! 642: 626 0000CF18 # ******************************************************************** ! 643: 627 0000CF18 # */ ! 644: 628 0000CF18 # fpm_halt(halt_code) ! 645: 629 0000CF18 # int halt_code; ! 646: 630 0000CF18 # { ! 647: 631 0000CF18 13 00db jbr L463 ! 648: 632 0000CF1B L464: ! 649: 633 0000CF1B # sgl_value_1 = halt_code; ! 650: 634 0000CF1B 0d ad04 effffffacd movl 4(fp),_sgl_value_1 ! 651: 635 0000CF23 # asm("movl _test_no,r0"); /* r0 = test number */ ! 652: 636 0000CF23 0d effffffac7 50 movl _test_no,r0 ! 653: 637 0000CF2A # asm("movl _op_code,r1"); /* r1 = instr's op-code */ ! 654: 638 0000CF2A 0d effffffac0 51 movl _op_code,r1 ! 655: 639 0000CF31 # asm("movl _sgl_value_1,r2"); /* r2 = error code */ ! 656: 640 0000CF31 0d effffffab9 52 movl _sgl_value_1,r2 ! 657: 641 0000CF38 # asm("movl _cycle,r3"); /* r3 = cycle */ ! 658: 642 0000CF38 0d effffffab2 53 movl _cycle,r3 ! 659: 643 0000CF3F # asm("movl _fpm_psl,r4"); /* r4 = PSL on the stack */ ! 660: 644 0000CF3F 0d effffffaab 54 movl _fpm_psl,r4 ! 661: 645 0000CF46 # if( halt_code == BAD_FPM_STK_HLT ) { /* if bad FPM stack */ ! 662: 646 0000CF46 1d ad04 07 cmpl 4(fp),$7 ! 663: 647 0000CF4A 21 53 jneq L465 ! 664: 648 0000CF4C # sgl_value_2 = dbl_value_1.l; /* LS op. expected */ ! 665: 649 0000CF4C 0d effffffaa2 effffffa99 movl _dbl_value_1+4,_sgl_value_2 ! 666: 650 0000CF57 # asm("movl _init_psl,r5"); /* r5 = PSL expected */ ! 667: 651 0000CF57 0d effffffa93 55 movl _init_psl,r5 ! 668: 652 0000CF5E # asm("movl _fpm_pc,r6"); /* r6 = PC on the stack */ ! 669: 653 0000CF5E 0d effffffa8c 56 movl _fpm_pc,r6 ! 670: 654 0000CF65 # asm("movl _exp_pc,r7"); /* r7 = PC expected */ ! 671: 655 0000CF65 0d effffffa85 57 movl _exp_pc,r7 ! 672: 656 0000CF6C # asm("movl _fpm_op_code,r8"); /* r8 = op-code on stack */ ! 673: 657 0000CF6C 0d effffffa7e 58 movl _fpm_op_code,r8 ! 674: 658 0000CF73 # asm("movl _op_code,r9"); /* r9 = op-code expected */ ! 675: 659 0000CF73 0d effffffa77 59 movl _op_code,r9 ! 676: 660 0000CF7A # asm("movl _fpm_ls_op,r10"); /* r10 = LS op. on stack */ ! 677: 661 0000CF7A 0d effffffa70 5a movl _fpm_ls_op,r10 ! 678: 662 0000CF81 # asm("movl _sgl_value_2,r11"); /* r11 = LS op. expected */ ! 679: 663 0000CF81 0d effffffa69 5b movl _sgl_value_2,r11 ! 680: 664 0000CF88 # asm("movl _fpm_ms_op,r12"); /* r12 = MS op. on stack */ ! 681: 665 0000CF88 0d effffffa62 5c movl _fpm_ms_op,r12 ! 682: 666 0000CF8F # asm("movl _dbl_value_1,r13"); /* r13 = MS op. expected */ ! 683: 667 0000CF8F 0d effffffa5b 5d movl _dbl_value_1,r13 ! 684: 668 0000CF96 # asm("movl _index,r14"); /* r14 = data pattern index */ ! 685: 669 0000CF96 0d effffffa54 5e movl _index,r14 ! 686: 670 0000CF9D # } else { ! 687: 671 0000CF9D 11 55 jbr L466 ! 688: 672 0000CF9F L465: ! 689: 673 0000CF9F # sgl_value_2 = dbl_st_acc.l; /* LS of final ACC */ ! 690: 674 0000CF9F 0d effffffa4f effffffa46 movl _dbl_st_acc+4,_sgl_value_2 ! 691: 675 0000CFAA # sgl_value_3 = dbl_expected.l; /* LS of exp'd ACC */ ! 692: 676 0000CFAA 0d effffffa44 effffffa3b movl _dbl_expected+4,_sgl_value_3 ! 693: 677 0000CFB5 # asm("movl _fpm_pc,r5"); /* r5 = PC on the stack */ ! 694: 678 0000CFB5 0d effffffa35 55 movl _fpm_pc,r5 ! 695: 679 0000CFBC # asm("movl _fpm_op_code,r6"); /* r6 = op-code on stack */ ! 696: 680 0000CFBC 0d effffffa2e 56 movl _fpm_op_code,r6 ! 697: 681 0000CFC3 # asm("movl _fpm_ls_op,r7"); /* r7 = LS op. on stack */ ! 698: 682 0000CFC3 0d effffffa27 57 movl _fpm_ls_op,r7 ! 699: 683 0000CFCA # asm("movl _fpm_ms_op,r8"); /* r8 = LS op. on stack */ ! 700: 684 0000CFCA 0d effffffa20 58 movl _fpm_ms_op,r8 ! 701: 685 0000CFD1 # asm("movl _dbl_st_acc,r9"); /* r9 = MS of final ACC. */ ! 702: 686 0000CFD1 0d effffffa19 59 movl _dbl_st_acc,r9 ! 703: 687 0000CFD8 # asm("movl _sgl_value_2,r10"); /* r10 = LS of final ACC. */ ! 704: 688 0000CFD8 0d effffffa12 5a movl _sgl_value_2,r10 ! 705: 689 0000CFDF # asm("movl _dbl_expected,r11"); /* r11 = MS of exp'd ACC. */ ! 706: 690 0000CFDF 0d effffffa0b 5b movl _dbl_expected,r11 ! 707: 691 0000CFE6 # asm("movl _sgl_value_3,r12"); /* r12 = LS of exp'd ACC. */ ! 708: 692 0000CFE6 0d effffffa04 5c movl _sgl_value_3,r12 ! 709: 693 0000CFED # asm("movl _index,r13"); /* r13 = data pattern index */ ! 710: 694 0000CFED 0d effffff9fd 5d movl _index,r13 ! 711: 695 0000CFF4 # } ! 712: 696 0000CFF4 L466: ! 713: 697 0000CFF4 # asm("halt"); ! 714: 698 0000CFF4 00 halt ! 715: 699 0000CFF5 # } ! 716: 700 0000CFF5 40 ret#2 ! 717: 701 0000CFF6 .set L461,0x0 ! 718: 702 0000CFF6 L463: ! 719: 703 0000CFF6 13 ff22 jbr L464 ! 720: 704 0000CFF9 .data ! 721: 705 000006bc * .text ! 722: 706 0000CFF9 00 .align 1 ! 723: 707 0000CFFA .globl _fill_reg_buf ! 724: 708 0000CFFA _fill_reg_buf: ! 725: 709 0000CFFA 0000 .word L468 ! 726: 710 0000CFFC # ! 727: 711 0000CFFC # ! 728: 712 0000CFFC # ! 729: 713 0000CFFC # ! 730: 714 0000CFFC # /* ! 731: 715 0000CFFC # *********************************************************************** ! 732: 716 0000CFFC # * fill a register buffer with known patterns ! 733: 717 0000CFFC # *********************************************************************** ! 734: 718 0000CFFC # */ ! 735: 719 0000CFFC # fill_reg_buf( buffer ) ! 736: 720 0000CFFC # int *buffer; ! 737: 721 0000CFFC # { ! 738: 722 0000CFFC 13 00a8 jbr L470 ! 739: 723 0000CFFF L471: ! 740: 724 0000CFFF # buffer[0] = 0x10101010; /* register '0' data */ ! 741: 725 0000CFFF 0d ad04 50 movl 4(fp),r0 ! 742: 726 0000D003 0d 8f10101010 60 movl $269488144,(r0) ! 743: 727 0000D00A # buffer[1] = 0x11111111; ! 744: 728 0000D00A 0d ad04 50 movl 4(fp),r0 ! 745: 729 0000D00E 0d 8f11111111 a004 movl $286331153,4(r0) ! 746: 730 0000D016 # buffer[2] = 0x12121212; ! 747: 731 0000D016 0d ad04 50 movl 4(fp),r0 ! 748: 732 0000D01A 0d 8f12121212 a008 movl $303174162,8(r0) ! 749: 733 0000D022 # buffer[3] = 0x13131313; ! 750: 734 0000D022 0d ad04 50 movl 4(fp),r0 ! 751: 735 0000D026 0d 8f13131313 a00c movl $320017171,12(r0) ! 752: 736 0000D02E # buffer[4] = 0x14141414; ! 753: 737 0000D02E 0d ad04 50 movl 4(fp),r0 ! 754: 738 0000D032 0d 8f14141414 a010 movl $336860180,16(r0) ! 755: 739 0000D03A # buffer[5] = 0x15151515; ! 756: 740 0000D03A 0d ad04 50 movl 4(fp),r0 ! 757: 741 0000D03E 0d 8f15151515 a014 movl $353703189,20(r0) ! 758: 742 0000D046 # buffer[6] = 0x16161616; ! 759: 743 0000D046 0d ad04 50 movl 4(fp),r0 ! 760: 744 0000D04A 0d 8f16161616 a018 movl $370546198,24(r0) ! 761: 745 0000D052 # buffer[7] = 0x17171717; ! 762: 746 0000D052 0d ad04 50 movl 4(fp),r0 ! 763: 747 0000D056 0d 8f17171717 a01c movl $387389207,28(r0) ! 764: 748 0000D05E # buffer[8] = 0x18181818; ! 765: 749 0000D05E 0d ad04 50 movl 4(fp),r0 ! 766: 750 0000D062 0d 8f18181818 a020 movl $404232216,32(r0) ! 767: 751 0000D06A # buffer[9] = 0x19191919; ! 768: 752 0000D06A 0d ad04 50 movl 4(fp),r0 ! 769: 753 0000D06E 0d 8f19191919 a024 movl $421075225,36(r0) ! 770: 754 0000D076 # buffer[10] = 0x1a1a1a1a; ! 771: 755 0000D076 0d ad04 50 movl 4(fp),r0 ! 772: 756 0000D07A 0d 8f1a1a1a1a a028 movl $437918234,40(r0) ! 773: 757 0000D082 # buffer[11] = 0x1b1b1b1b; ! 774: 758 0000D082 0d ad04 50 movl 4(fp),r0 ! 775: 759 0000D086 0d 8f1b1b1b1b a02c movl $454761243,44(r0) ! 776: 760 0000D08E # buffer[12] = 0x1c1c1c1c; ! 777: 761 0000D08E 0d ad04 50 movl 4(fp),r0 ! 778: 762 0000D092 0d 8f1c1c1c1c a030 movl $471604252,48(r0) ! 779: 763 0000D09A # buffer[13] = 0x1d1d1d1d; ! 780: 764 0000D09A 0d ad04 50 movl 4(fp),r0 ! 781: 765 0000D09E 0d 8f1d1d1d1d a034 movl $488447261,52(r0) ! 782: 766 0000D0A6 # } ! 783: 767 0000D0A6 40 ret#2 ! 784: 768 0000D0A7 .set L468,0x0 ! 785: 769 0000D0A7 L470: ! 786: 770 0000D0A7 13 ff55 jbr L471 ! 787: 771 0000D0AA .data ! 788: 772 000006bc * # ! 789: 772 000006bc * #
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