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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / fpevent|
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Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 000006bc * .text
4 00000000 .align 1
5 00000000 .globl _prt_evt_er_msg
6 00000000 _prt_evt_er_msg:
7 0000C9F0 0000 .word L382
8 0000C9F2 #
9 0000C9F2 # #include "evt_defs.h"
10 0000C9F2 #
11 0000C9F2 # /***********************************************************************
12 0000C9F2 # *
13 0000C9F2 # * COMMON ROUTINES FOR THE DEMAND PAGING TESTS
14 0000C9F2 # *
15 0000C9F2 # ***********************************************************************/
16 0000C9F2 #
17 0000C9F2 #
18 0000C9F2 #
19 0000C9F2 # /*
20 0000C9F2 # ***********************************************************************
21 0000C9F2 # * Print an FPP Events Test Error Message
22 0000C9F2 # *
23 0000C9F2 # * cycle: xx. EVT test xx. < your message here >
24 0000C9F2 # * instr: <inst name> <event type> {( disabled )} -data index = xx
25 0000C9F2 # * addressing mode: <addressing mode description>
26 0000C9F2 # * { piped entry test #x. <instruction buffer description> }
27 0000C9F2 # * inst_buf = xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx
28 0000C9F2 # * initial ACC. = xxxxxxxx xxxxxxxx, operand 1 = xxxxxxxx xxxxxxxxx
29 0000C9F2 # * final ACC. = xxxxxxxx xxxxxxxx, operand 2 = xxxxxxxx xxxxxxxxx
30 0000C9F2 # ***********************************************************************
31 0000C9F2 # */
32 0000C9F2 # prt_evt_er_msg( msg )
33 0000C9F2 # char *msg;
34 0000C9F2 # {
35 0000C9F2 13 02ea jbr L384
36 0000C9F5 L385:
37 0000C9F5 # writes("\ncycle: ");
38 0000C9F5 .data 1
39 000006bc * L387:
40 000006bc * 0A6379636C653A2000 .ascii "\12cycle: \0"
41 000006c5 * .text
42 0000C9F5 dd 8f000006bc pushl $L387
43 0000C9FB fe 08 efffffffee callf $8,_writes
44 0000CA02 # writed( cycle ); /* print the cycle # */
45 0000CA02 dd efffffffe8 pushl _cycle
46 0000CA08 fe 08 efffffffe1 callf $8,_writed
47 0000CA0F # writes(". EVT test ");
48 0000CA0F .data 1
49 000006c5 * L389:
50 000006c5 * 2E2045565420746573742000 .ascii ". EVT test \0"
51 000006d1 * .text
52 0000CA0F dd 8f000006c5 pushl $L389
53 0000CA15 fe 08 efffffffd4 callf $8,_writes
54 0000CA1C # writeh( test_no ); /* print the test # */
55 0000CA1C dd efffffffce pushl _test_no
56 0000CA22 fe 08 efffffffc7 callf $8,_writeh
57 0000CA29 # writes(". ");
58 0000CA29 .data 1
59 000006d1 * L391:
60 000006d1 * 2E2000 .ascii ". \0"
61 000006d4 * .text
62 0000CA29 dd 8f000006d1 pushl $L391
63 0000CA2F fe 08 efffffffba callf $8,_writes
64 0000CA36 # writes( msg ); /* print the error msg */
65 0000CA36 dd ad04 pushl 4(fp)
66 0000CA39 fe 08 efffffffb0 callf $8,_writes
67 0000CA40 # writes("\ninstr: ");
68 0000CA40 .data 1
69 000006d4 * L392:
70 000006d4 * 0A696E7374723A2000 .ascii "\12instr: \0"
71 000006dd * .text
72 0000CA40 dd 8f000006d4 pushl $L392
73 0000CA46 fe 08 efffffffa3 callf $8,_writes
74 0000CA4D # writes( op_name ); /* print the inst name */
75 0000CA4D dd efffffff9d pushl _op_name
76 0000CA53 fe 08 efffffff96 callf $8,_writes
77 0000CA5A # writes(" Event: ");
78 0000CA5A .data 1
79 000006dd * L393:
80 000006dd * 20204576656E743A2000 .ascii " Event: \0"
81 000006e7 * .text
82 0000CA5A dd 8f000006dd pushl $L393
83 0000CA60 fe 08 efffffff89 callf $8,_writes
84 0000CA67 # writes( event_msg ); /* print the event type */
85 0000CA67 dd efffffff83 pushl _event_msg
86 0000CA6D fe 08 efffffff7c callf $8,_writes
87 0000CA74 # if( evt_disabled )
88 0000CA74 5d efffffff76 tstl _evt_disabled
89 0000CA7A 31 0d jeql L394
90 0000CA7C # writes(" ( disabled )");
91 0000CA7C .data 1
92 000006e7 * L395:
93 000006e7 * 20282064697361626C6564202 .ascii " ( disabled )\0"
900
94 000006f5 * .text
95 0000CA7C dd 8f000006e7 pushl $L395
96 0000CA82 fe 08 efffffff67 callf $8,_writes
97 0000CA89 # writes(" -data index = "); /* print the data index */
98 0000CA89 L394:
99 0000CA89 .data 1
100 000006f5 * L396:
101 000006f5 * 2020202D6461746120696E646 .ascii " -data index = \0"
578203D2000
102 00000707 * .text
103 0000CA89 dd 8f000006f5 pushl $L396
104 0000CA8F fe 08 efffffff5a callf $8,_writes
105 0000CA96 # writed( index );
106 0000CA96 dd efffffff54 pushl _index
107 0000CA9C fe 08 efffffff4d callf $8,_writed
108 0000CAA3 # if( no_ops ) {
109 0000CAA3 5d efffffff47 tstl _no_ops
110 0000CAA9 31 22 jeql L397
111 0000CAAB # writes("\naddressing mode: ");
112 0000CAAB .data 1
113 00000707 * L398:
114 00000707 * 0A61646472657373696E67206 .ascii "\12addressing mode: \0"
D6F64653A2000
115 0000071a * .text
116 0000CAAB dd 8f00000707 pushl $L398
117 0000CAB1 fe 08 efffffff38 callf $8,_writes
118 0000CAB8 # writes( addressing_modes[ addr_mode ] );
119 0000CAB8 0d efffffff32 50 movl _addr_mode,r0
120 0000CABF dd 40efffffff2a pushl _addressing_modes[r0]
121 0000CAC6 fe 08 efffffff23 callf $8,_writes
122 0000CACD # }
123 0000CACD # if( pipe_test ) {
124 0000CACD L397:
125 0000CACD 5d efffffff1d tstl _pipe_test
126 0000CAD3 21 03 13 00c4 jeql L399
127 0000CAD8 # writes("\npiped entry test #");
128 0000CAD8 .data 1
129 0000071a * L400:
130 0000071a * 0A706970656420656E7472792 .ascii "\12piped entry test #\0"
074657374202300
131 0000072e * .text
132 0000CAD8 dd 8f0000071a pushl $L400
133 0000CADE fe 08 efffffff0b callf $8,_writes
134 0000CAE5 # writed( pipe_test ); /* print the pipe test # */
135 0000CAE5 dd efffffff05 pushl _pipe_test
136 0000CAEB fe 08 effffffefe callf $8,_writed
137 0000CAF2 # writes(". ");
138 0000CAF2 .data 1
139 0000072e * L401:
140 0000072e * 2E202000 .ascii ". \0"
141 00000732 * .text
142 0000CAF2 dd 8f0000072e pushl $L401
143 0000CAF8 fe 08 effffffef1 callf $8,_writes
144 0000CAFF # if( pipe_inst1 == LDD_OP_CODE )
145 0000CAFF 1d effffffeeb 07 cmpl _pipe_inst1,$7
146 0000CB06 21 0f jneq L402
147 0000CB08 # writes("LDD (initial acc), ");
148 0000CB08 .data 1
149 00000732 * L403:
150 00000732 * 4C44442028696E697469616C2 .ascii "LDD (initial acc), \0"
0616363292C2000
151 00000746 * .text
152 0000CB08 dd 8f00000732 pushl $L403
153 0000CB0E fe 08 effffffedb callf $8,_writes
154 0000CB15 # else if( pipe_inst1 == LDF_OP_CODE )
155 0000CB15 11 4a jbr L404
156 0000CB17 L402:
157 0000CB17 1d effffffed3 06 cmpl _pipe_inst1,$6
158 0000CB1E 21 0f jneq L405
159 0000CB20 # writes("LDF (initial acc), ");
160 0000CB20 .data 1
161 00000746 * L406:
162 00000746 * 4C44462028696E697469616C2 .ascii "LDF (initial acc), \0"
0616363292C2000
163 0000075a * .text
164 0000CB20 dd 8f00000746 pushl $L406
165 0000CB26 fe 08 effffffec3 callf $8,_writes
166 0000CB2D # else if( pipe_inst1 == MULD_OP_CODE )
167 0000CB2D 11 32 jbr L407
168 0000CB2F L405:
169 0000CB2F 1d effffffebb 8900e7 cmpl _pipe_inst1,$231
170 0000CB38 21 0f jneq L408
171 0000CB3A # writes("MULD (1.0), ");
172 0000CB3A .data 1
173 0000075a * L409:
174 0000075a * 4D554C442028312E30292C200 .ascii "MULD (1.0), \0"
0
175 00000767 * .text
176 0000CB3A dd 8f0000075a pushl $L409
177 0000CB40 fe 08 effffffea9 callf $8,_writes
178 0000CB47 # else if( pipe_inst1 == MULF_OP_CODE )
179 0000CB47 11 18 jbr L410
180 0000CB49 L408:
181 0000CB49 1d effffffea1 8900e6 cmpl _pipe_inst1,$230
182 0000CB52 21 0d jneq L411
183 0000CB54 # writes("MULF (1.0), ");
184 0000CB54 .data 1
185 00000767 * L412:
186 00000767 * 4D554C462028312E30292C200 .ascii "MULF (1.0), \0"
0
187 00000774 * .text
188 0000CB54 dd 8f00000767 pushl $L412
189 0000CB5A fe 08 effffffe8f callf $8,_writes
190 0000CB61 # writes( op_name );
191 0000CB61 L411:
192 0000CB61 L410:
193 0000CB61 L407:
194 0000CB61 L404:
195 0000CB61 dd effffffe89 pushl _op_name
196 0000CB67 fe 08 effffffe82 callf $8,_writes
197 0000CB6E # if( no_ops == 1 )
198 0000CB6E 1d effffffe7c 01 cmpl _no_ops,$1
199 0000CB75 21 0f jneq L413
200 0000CB77 # writes(" (operand)");
201 0000CB77 .data 1
202 00000774 * L414:
203 00000774 * 20286F706572616E642900 .ascii " (operand)\0"
204 0000077f * .text
205 0000CB77 dd 8f00000774 pushl $L414
206 0000CB7D fe 08 effffffe6c callf $8,_writes
207 0000CB84 # else if( no_ops == 2 )
208 0000CB84 11 16 jbr L415
209 0000CB86 L413:
210 0000CB86 1d effffffe64 02 cmpl _no_ops,$2
211 0000CB8D 21 0d jneq L416
212 0000CB8F # writes(" (op #1, op #2)");
213 0000CB8F .data 1
214 0000077f * L417:
215 0000077f * 20286F702023312C206F70202 .ascii " (op #1, op #2)\0"
3322900
216 0000078f * .text
217 0000CB8F dd 8f0000077f pushl $L417
218 0000CB95 fe 08 effffffe54 callf $8,_writes
219 0000CB9C # }
220 0000CB9C L416:
221 0000CB9C L415:
222 0000CB9C # print_inst_buf(); /* print the inst buf contents */
223 0000CB9C L399:
224 0000CB9C fe 04 ef0000013f callf $4,_print_inst_buf
225 0000CBA3 # writes("initial ACC. = ");
226 0000CBA3 .data 1
227 0000078f * L419:
228 0000078f * 696E697469616C204143432E2 .ascii "initial ACC. = \0"
03D2000
229 0000079f * .text
230 0000CBA3 dd 8f0000078f pushl $L419
231 0000CBA9 fe 08 effffffe40 callf $8,_writes
232 0000CBB0 # write32h( dbl_ld_acc.m );
233 0000CBB0 dd effffffe3a pushl _dbl_ld_acc
234 0000CBB6 fe 08 effffffe33 callf $8,_write32h
235 0000CBBD # if( precision == DBL ) {
236 0000CBBD 1d effffffe2d 02 cmpl _precision,$2
237 0000CBC4 21 16 jneq L421
238 0000CBC6 # writec(' ');
239 0000CBC6 dd 20 pushl $32
240 0000CBC8 fe 08 effffffe21 callf $8,_writec
241 0000CBCF # write32h( dbl_ld_acc.l );
242 0000CBCF dd effffffe1f pushl _dbl_ld_acc+4
243 0000CBD5 fe 08 effffffe14 callf $8,_write32h
244 0000CBDC # }
245 0000CBDC # if( no_ops ) {
246 0000CBDC L421:
247 0000CBDC 5d effffffe0e tstl _no_ops
248 0000CBE2 31 69 jeql L423
249 0000CBE4 # if( (op_code == CVFL_OP_CODE) || (op_code == CVDL_OP_CODE) )
250 0000CBE4 1d effffffe06 890086 cmpl _op_code,$134
251 0000CBED 31 0b jeql L9999
252 0000CBEF 1d effffffdfb 890087 cmpl _op_code,$135
253 0000CBF8 21 0f jneq L424
254 0000CBFA L9999:
255 0000CBFA # writes(", stored value = ");
256 0000CBFA .data 1
257 0000079f * L425:
258 0000079f * 2C20202073746F72656420766 .ascii ", stored value = \0"
16C7565203D2000
259 000007b3 * .text
260 0000CBFA dd 8f0000079f pushl $L425
261 0000CC00 fe 08 effffffde9 callf $8,_writes
262 0000CC07 # else
263 0000CC07 11 0d jbr L426
264 0000CC09 L424:
265 0000CC09 # writes(", operand 1 = ");
266 0000CC09 .data 1
267 000007b3 * L427:
268 000007b3 * 2C2020206F706572616E64203 .ascii ", operand 1 = \0"
1203D2000
269 000007c4 * .text
270 0000CC09 dd 8f000007b3 pushl $L427
271 0000CC0F fe 08 effffffdda callf $8,_writes
272 0000CC16 L426:
273 0000CC16 # write32h( dbl_value_1.m );
274 0000CC16 dd effffffdd4 pushl _dbl_value_1
275 0000CC1C fe 08 effffffdcd callf $8,_write32h
276 0000CC23 # if( precision == DBL ) {
277 0000CC23 1d effffffdc7 02 cmpl _precision,$2
278 0000CC2A 21 16 jneq L428
279 0000CC2C # writec(' ');
280 0000CC2C dd 20 pushl $32
281 0000CC2E fe 08 effffffdbb callf $8,_writec
282 0000CC35 # write32h( dbl_value_1.l );
283 0000CC35 dd effffffdb9 pushl _dbl_value_1+4
284 0000CC3B fe 08 effffffdae callf $8,_write32h
285 0000CC42 # }
286 0000CC42 # writec('\n');
287 0000CC42 L428:
288 0000CC42 dd 0a pushl $10
289 0000CC44 fe 08 effffffda5 callf $8,_writec
290 0000CC4B # } else
291 0000CC4B 11 0d jbr L429
292 0000CC4D L423:
293 0000CC4D # writes(", ");
294 0000CC4D .data 1
295 000007c4 * L430:
296 000007c4 * 2C2000 .ascii ", \0"
297 000007c7 * .text
298 0000CC4D dd 8f000007c4 pushl $L430
299 0000CC53 fe 08 effffffd96 callf $8,_writes
300 0000CC5A L429:
301 0000CC5A # writes(" final ACC. = ");
302 0000CC5A .data 1
303 000007c7 * L431:
304 000007c7 * 202066696E616C204143432E2 .ascii " final ACC. = \0"
03D2000
305 000007d7 * .text
306 0000CC5A dd 8f000007c7 pushl $L431
307 0000CC60 fe 08 effffffd89 callf $8,_writes
308 0000CC67 # write32h( dbl_st_acc.m );
309 0000CC67 dd effffffd83 pushl _dbl_st_acc
310 0000CC6D fe 08 effffffd7c callf $8,_write32h
311 0000CC74 # if( precision == DBL ) {
312 0000CC74 1d effffffd76 02 cmpl _precision,$2
313 0000CC7B 21 16 jneq L432
314 0000CC7D # writec(' ');
315 0000CC7D dd 20 pushl $32
316 0000CC7F fe 08 effffffd6a callf $8,_writec
317 0000CC86 # write32h( dbl_st_acc.l );
318 0000CC86 dd effffffd68 pushl _dbl_st_acc+4
319 0000CC8C fe 08 effffffd5d callf $8,_write32h
320 0000CC93 # }
321 0000CC93 # if( no_ops == 2) {
322 0000CC93 L432:
323 0000CC93 1d effffffd57 02 cmpl _no_ops,$2
324 0000CC9A 21 39 jneq L433
325 0000CC9C # writes(", operand 2 = ");
326 0000CC9C .data 1
327 000007d7 * L434:
328 000007d7 * 2C2020206F706572616E64203 .ascii ", operand 2 = \0"
2203D2000
329 000007e8 * .text
330 0000CC9C dd 8f000007d7 pushl $L434
331 0000CCA2 fe 08 effffffd47 callf $8,_writes
332 0000CCA9 # write32h( dbl_value_2.m );
333 0000CCA9 dd effffffd41 pushl _dbl_value_2
334 0000CCAF fe 08 effffffd3a callf $8,_write32h
335 0000CCB6 # if( precision == DBL ) {
336 0000CCB6 1d effffffd34 02 cmpl _precision,$2
337 0000CCBD 21 16 jneq L435
338 0000CCBF # writec(' ');
339 0000CCBF dd 20 pushl $32
340 0000CCC1 fe 08 effffffd28 callf $8,_writec
341 0000CCC8 # write32h( dbl_value_2.l );
342 0000CCC8 dd effffffd26 pushl _dbl_value_2+4
343 0000CCCE fe 08 effffffd1b callf $8,_write32h
344 0000CCD5 # }
345 0000CCD5 # }
346 0000CCD5 L435:
347 0000CCD5 # writec('\n');
348 0000CCD5 L433:
349 0000CCD5 dd 0a pushl $10
350 0000CCD7 fe 08 effffffd12 callf $8,_writec
351 0000CCDE # }
352 0000CCDE 40 ret#2
353 0000CCDF .set L382,0x0
354 0000CCDF L384:
355 0000CCDF 13 fd13 jbr L385
356 0000CCE2 .data
357 000006bc * .text
358 0000CCE2 .align 1
359 0000CCE2 .globl _print_inst_buf
360 0000CCE2 _print_inst_buf:
361 0000CCE2 0000 .word L436
362 0000CCE4 #
363 0000CCE4 #
364 0000CCE4 #
365 0000CCE4 # /*
366 0000CCE4 # *******************************************************************
367 0000CCE4 # * print the contents of the instruction buffer
368 0000CCE4 # *******************************************************************
369 0000CCE4 # */
370 0000CCE4 # print_inst_buf()
371 0000CCE4 # {
372 0000CCE4 11 58 jbr L438
373 0000CCE6 L439:
374 0000CCE6 # writes("\ninst buf=");
375 0000CCE6 .data 1
376 000007e8 * L440:
377 000007e8 * 0A696E7374206275663D00 .ascii "\12inst buf=\0"
378 000007f3 * .text
379 0000CCE6 dd 8f000007e8 pushl $L440
380 0000CCEC fe 08 effffffcfd callf $8,_writes
381 0000CCF3 # write_lw_bytes( inst_buf[0] ); /* print word 0 as bytes */
382 0000CCF3 dd effffffcf7 pushl _inst_buf
383 0000CCF9 fe 08 ef00000040 callf $8,_write_lw_bytes
384 0000CD00 # write_lw_bytes( inst_buf[1] ); /* print word 1 as bytes */
385 0000CD00 dd effffffcee pushl _inst_buf+4
386 0000CD06 fe 08 ef00000033 callf $8,_write_lw_bytes
387 0000CD0D # write_lw_bytes( inst_buf[2] ); /* print word 2 as bytes */
388 0000CD0D dd effffffce5 pushl _inst_buf+8
389 0000CD13 fe 08 ef00000026 callf $8,_write_lw_bytes
390 0000CD1A # write_lw_bytes( inst_buf[3] ); /* print word 2 as bytes */
391 0000CD1A dd effffffcdc pushl _inst_buf+12
392 0000CD20 fe 08 ef00000019 callf $8,_write_lw_bytes
393 0000CD27 # write_lw_bytes( inst_buf[4] ); /* print word 2 as bytes */
394 0000CD27 dd effffffcd3 pushl _inst_buf+16
395 0000CD2D fe 08 ef0000000c callf $8,_write_lw_bytes
396 0000CD34 # writec('\n');
397 0000CD34 dd 0a pushl $10
398 0000CD36 fe 08 effffffcb3 callf $8,_writec
399 0000CD3D # }
400 0000CD3D 40 ret#2
401 0000CD3E .set L436,0x0
402 0000CD3E L438:
403 0000CD3E 11 a6 jbr L439
404 0000CD40 .data
405 000006bc * .text
406 0000CD40 .align 1
407 0000CD40 .globl _write_lw_bytes
408 0000CD40 _write_lw_bytes:
409 0000CD40 0000 .word L442
410 0000CD42 #
411 0000CD42 #
412 0000CD42 #
413 0000CD42 # /*
414 0000CD42 # *******************************************************************
415 0000CD42 # * print a longword a byte at a time
416 0000CD42 # *******************************************************************
417 0000CD42 # */
418 0000CD42 # write_lw_bytes( lw )
419 0000CD42 # int lw;
420 0000CD42 # {
421 0000CD42 13 00aa jbr L444
422 0000CD45 L445:
423 0000CD45 # writec(' ');
424 0000CD45 dd 20 pushl $32
425 0000CD47 fe 08 effffffca2 callf $8,_writec
426 0000CD4E # writeh( (lw >> 28) & 0xf );
427 0000CD4E 5e 1c ad04 50 shar $28,4(fp),r0
428 0000CD53 ac 0f 50 andl2 $15,r0
429 0000CD56 dd 50 pushl r0
430 0000CD58 fe 08 effffffc91 callf $8,_writeh
431 0000CD5F # writeh( (lw >> 24) & 0xf );
432 0000CD5F 5e 18 ad04 50 shar $24,4(fp),r0
433 0000CD64 ac 0f 50 andl2 $15,r0
434 0000CD67 dd 50 pushl r0
435 0000CD69 fe 08 effffffc80 callf $8,_writeh
436 0000CD70 # writec(' ');
437 0000CD70 dd 20 pushl $32
438 0000CD72 fe 08 effffffc77 callf $8,_writec
439 0000CD79 # writeh( (lw >> 20) & 0xf );
440 0000CD79 5e 14 ad04 50 shar $20,4(fp),r0
441 0000CD7E ac 0f 50 andl2 $15,r0
442 0000CD81 dd 50 pushl r0
443 0000CD83 fe 08 effffffc66 callf $8,_writeh
444 0000CD8A # writeh( (lw >> 16) & 0xf );
445 0000CD8A 5e 10 ad04 50 shar $16,4(fp),r0
446 0000CD8F ac 0f 50 andl2 $15,r0
447 0000CD92 dd 50 pushl r0
448 0000CD94 fe 08 effffffc55 callf $8,_writeh
449 0000CD9B # writec(' ');
450 0000CD9B dd 20 pushl $32
451 0000CD9D fe 08 effffffc4c callf $8,_writec
452 0000CDA4 # writeh( (lw >> 12) & 0xf );
453 0000CDA4 5e 0c ad04 50 shar $12,4(fp),r0
454 0000CDA9 ac 0f 50 andl2 $15,r0
455 0000CDAC dd 50 pushl r0
456 0000CDAE fe 08 effffffc3b callf $8,_writeh
457 0000CDB5 # writeh( (lw >> 8) & 0xf );
458 0000CDB5 5e 08 ad04 50 shar $8,4(fp),r0
459 0000CDBA ac 0f 50 andl2 $15,r0
460 0000CDBD dd 50 pushl r0
461 0000CDBF fe 08 effffffc2a callf $8,_writeh
462 0000CDC6 # writec(' ');
463 0000CDC6 dd 20 pushl $32
464 0000CDC8 fe 08 effffffc21 callf $8,_writec
465 0000CDCF # writeh( (lw >> 4) & 0xf );
466 0000CDCF 5e 04 ad04 50 shar $4,4(fp),r0
467 0000CDD4 ac 0f 50 andl2 $15,r0
468 0000CDD7 dd 50 pushl r0
469 0000CDD9 fe 08 effffffc10 callf $8,_writeh
470 0000CDE0 # writeh( (lw & 0xf) );
471 0000CDE0 bc 0f ad04 50 andl3 $15,4(fp),r0
472 0000CDE5 dd 50 pushl r0
473 0000CDE7 fe 08 effffffc02 callf $8,_writeh
474 0000CDEE # }
475 0000CDEE 40 ret#2
476 0000CDEF .set L442,0x0
477 0000CDEF L444:
478 0000CDEF 13 ff53 jbr L445
479 0000CDF2 .data
480 000006bc * .text
481 0000CDF2 .align 1
482 0000CDF2 .globl _event_halt
483 0000CDF2 _event_halt:
484 0000CDF2 0000 .word L447
485 0000CDF4 #
486 0000CDF4 #
487 0000CDF4 #
488 0000CDF4 #
489 0000CDF4 # /*
490 0000CDF4 # ********************************************************************
491 0000CDF4 # *
492 0000CDF4 # * ERROR HALT ROUTINE ( for non-FPM event halts )
493 0000CDF4 # *
494 0000CDF4 # ********************************************************************
495 0000CDF4 # */
496 0000CDF4 # event_halt(halt_code)
497 0000CDF4 # int halt_code;
498 0000CDF4 # {
499 0000CDF4 13 011b jbr L449
500 0000CDF7 L450:
501 0000CDF7 # sgl_value_1 = halt_code;
502 0000CDF7 0d ad04 effffffbf1 movl 4(fp),_sgl_value_1
503 0000CDFF # asm("movl _test_no,r0"); /* r0 = test number */
504 0000CDFF 0d effffffbeb 50 movl _test_no,r0
505 0000CE06 # asm("movl _op_code,r1"); /* r1 = instr's op-code */
506 0000CE06 0d effffffbe4 51 movl _op_code,r1
507 0000CE0D # asm("movl _sgl_value_1,r2"); /* r2 = error code */
508 0000CE0D 0d effffffbdd 52 movl _sgl_value_1,r2
509 0000CE14 # asm("movl _cycle,r3"); /* r3 = cycle */
510 0000CE14 0d effffffbd6 53 movl _cycle,r3
511 0000CE1B # asm("movl _addr_code,r4"); /* r4 = addressing mode */
512 0000CE1B 0d effffffbcf 54 movl _addr_code,r4
513 0000CE22 # asm("movl _index,r5"); /* r5 = data pattern index */
514 0000CE22 0d effffffbc8 55 movl _index,r5
515 0000CE29 # /*
516 0000CE29 # * put the operands used in regs 6 - 9
517 0000CE29 # */
518 0000CE29 # if( no_ops == 2 ) {
519 0000CE29 1d effffffbc1 02 cmpl _no_ops,$2
520 0000CE30 21 1e jneq L451
521 0000CE32 # asm("movl _dbl_value_1,r6"); /* r6 = operand 1's MSW */
522 0000CE32 0d effffffbb8 56 movl _dbl_value_1,r6
523 0000CE39 # asm("movl _dbl_value_1+4,r7"); /* r7 = operand 1's LSW */
524 0000CE39 0d effffffbb5 57 movl _dbl_value_1+4,r7
525 0000CE40 # asm("movl _dbl_value_2,r8"); /* r8 = operand 2's MSW */
526 0000CE40 0d effffffbaa 58 movl _dbl_value_2,r8
527 0000CE47 # asm("movl _dbl_value_2+4,r9"); /* r9 = operand 2's LSW */
528 0000CE47 0d effffffba7 59 movl _dbl_value_2+4,r9
529 0000CE4E # } else {
530 0000CE4E 11 1c jbr L452
531 0000CE50 L451:
532 0000CE50 # asm("movl _dbl_ld_acc,r6"); /* r6 = initial Acc's MSW */
533 0000CE50 0d effffffb9a 56 movl _dbl_ld_acc,r6
534 0000CE57 # asm("movl _dbl_ld_acc+4,r7"); /* r7 = initial Acc's LSW */
535 0000CE57 0d effffffb97 57 movl _dbl_ld_acc+4,r7
536 0000CE5E # asm("movl _dbl_value_1,r8"); /* r8 = the operand's MSW */
537 0000CE5E 0d effffffb8c 58 movl _dbl_value_1,r8
538 0000CE65 # asm("movl _dbl_value_1+4,r9"); /* r9 = the operand's LSW */
539 0000CE65 0d effffffb89 59 movl _dbl_value_1+4,r9
540 0000CE6C # };
541 0000CE6C L452:
542 0000CE6C # /*
543 0000CE6C # * now set the type specific data in regs 10 - 12
544 0000CE6C # */
545 0000CE6C # if( halt_code == BAD_PSL_HLT ) {
546 0000CE6C 1d ad04 03 cmpl 4(fp),$3
547 0000CE70 21 18 jneq L453
548 0000CE72 # asm("movl _init_psl,r10"); /* r10 = initial PSL value */
549 0000CE72 0d effffffb78 5a movl _init_psl,r10
550 0000CE79 # asm("movl _psl_val,r11"); /* r11 = final PSL value */
551 0000CE79 0d effffffb71 5b movl _psl_val,r11
552 0000CE80 # asm("movl _exp_psl,r12"); /* r12 = expected PSL value */
553 0000CE80 0d effffffb6a 5c movl _exp_psl,r12
554 0000CE87 # }
555 0000CE87 # else if( halt_code == PUSH_PSL_HLT ) {
556 0000CE87 13 0086 jbr L454
557 0000CE8A L453:
558 0000CE8A 1d ad04 06 cmpl 4(fp),$6
559 0000CE8E 21 10 jneq L455
560 0000CE90 # asm("movl _init_psl,r10"); /* r10 = initial PSL value */
561 0000CE90 0d effffffb5a 5a movl _init_psl,r10
562 0000CE97 # asm("movl _event_psl,r11"); /* r11 = PSL on the stack */
563 0000CE97 0d effffffb53 5b movl _event_psl,r11
564 0000CE9E # }
565 0000CE9E # else if( halt_code == BAD_REG_HLT ) {
566 0000CE9E 11 70 jbr L456
567 0000CEA0 L455:
568 0000CEA0 1d ad04 02 cmpl 4(fp),$2
569 0000CEA4 21 3d jneq L457
570 0000CEA6 # sgl_value_1 = store_regs[reg_no];
571 0000CEA6 0d effffffb44 50 movl _reg_no,r0
572 0000CEAD 0d 40effffffb3c movl _store_regs[r0],_sgl_value_1
effffffb37
573 0000CEB9 # sgl_value_2 = exp_regs[reg_no];
574 0000CEB9 0d effffffb31 50 movl _reg_no,r0
575 0000CEC0 0d 40effffffb29 movl _exp_regs[r0],_sgl_value_2
effffffb24
576 0000CECC # asm("movl _reg_no,r10"); /* r10 = register # */
577 0000CECC 0d effffffb1e 5a movl _reg_no,r10
578 0000CED3 # asm("movl _sgl_value_1,r11"); /* r11 = actual reg value */
579 0000CED3 0d effffffb17 5b movl _sgl_value_1,r11
580 0000CEDA # asm("movl _sgl_value_2,r12"); /* r12 = expected reg value */
581 0000CEDA 0d effffffb10 5c movl _sgl_value_2,r12
582 0000CEE1 # }
583 0000CEE1 # else if( halt_code == BAD_ACC_HLT ) {
584 0000CEE1 11 2d jbr L458
585 0000CEE3 L457:
586 0000CEE3 1d ad04 01 cmpl 4(fp),$1
587 0000CEE7 21 27 jneq L459
588 0000CEE9 # sgl_value_1 = dbl_expected.l;
589 0000CEE9 0d effffffb05 effffffafc movl _dbl_expected+4,_sgl_value_1
590 0000CEF4 # asm("movl _dbl_st_acc,r10"); /* r10 = final Acc's MSW */
591 0000CEF4 0d effffffaf6 5a movl _dbl_st_acc,r10
592 0000CEFB # asm("movl _dbl_st_acc+4,r11"); /* r11 = final Acc's LSW */
593 0000CEFB 0d effffffaf3 5b movl _dbl_st_acc+4,r11
594 0000CF02 # asm("movl _dbl_expected,r12"); /* r12 = exp Acc's MSW */
595 0000CF02 0d effffffae8 5c movl _dbl_expected,r12
596 0000CF09 # asm("movl _sgl_value_1,r13"); /* r13 = exp Acc's LSW */
597 0000CF09 0d effffffae1 5d movl _sgl_value_1,r13
598 0000CF10 # };
599 0000CF10 L459:
600 0000CF10 L458:
601 0000CF10 L456:
602 0000CF10 L454:
603 0000CF10 # asm("halt");
604 0000CF10 00 halt
605 0000CF11 # }
606 0000CF11 40 ret#2
607 0000CF12 .set L447,0x0
608 0000CF12 L449:
609 0000CF12 13 fee2 jbr L450
610 0000CF15 .data
611 000006bc * .text
612 0000CF15 00 .align 1
613 0000CF16 .globl _fpm_halt
614 0000CF16 _fpm_halt:
615 0000CF16 0000 .word L461
616 0000CF18 #
617 0000CF18 #
618 0000CF18 #
619 0000CF18 #
620 0000CF18 #
621 0000CF18 # /*
622 0000CF18 # ********************************************************************
623 0000CF18 # *
624 0000CF18 # * ERROR HALT ROUTINE FOR FPM EVENT HALTS
625 0000CF18 # *
626 0000CF18 # ********************************************************************
627 0000CF18 # */
628 0000CF18 # fpm_halt(halt_code)
629 0000CF18 # int halt_code;
630 0000CF18 # {
631 0000CF18 13 00db jbr L463
632 0000CF1B L464:
633 0000CF1B # sgl_value_1 = halt_code;
634 0000CF1B 0d ad04 effffffacd movl 4(fp),_sgl_value_1
635 0000CF23 # asm("movl _test_no,r0"); /* r0 = test number */
636 0000CF23 0d effffffac7 50 movl _test_no,r0
637 0000CF2A # asm("movl _op_code,r1"); /* r1 = instr's op-code */
638 0000CF2A 0d effffffac0 51 movl _op_code,r1
639 0000CF31 # asm("movl _sgl_value_1,r2"); /* r2 = error code */
640 0000CF31 0d effffffab9 52 movl _sgl_value_1,r2
641 0000CF38 # asm("movl _cycle,r3"); /* r3 = cycle */
642 0000CF38 0d effffffab2 53 movl _cycle,r3
643 0000CF3F # asm("movl _fpm_psl,r4"); /* r4 = PSL on the stack */
644 0000CF3F 0d effffffaab 54 movl _fpm_psl,r4
645 0000CF46 # if( halt_code == BAD_FPM_STK_HLT ) { /* if bad FPM stack */
646 0000CF46 1d ad04 07 cmpl 4(fp),$7
647 0000CF4A 21 53 jneq L465
648 0000CF4C # sgl_value_2 = dbl_value_1.l; /* LS op. expected */
649 0000CF4C 0d effffffaa2 effffffa99 movl _dbl_value_1+4,_sgl_value_2
650 0000CF57 # asm("movl _init_psl,r5"); /* r5 = PSL expected */
651 0000CF57 0d effffffa93 55 movl _init_psl,r5
652 0000CF5E # asm("movl _fpm_pc,r6"); /* r6 = PC on the stack */
653 0000CF5E 0d effffffa8c 56 movl _fpm_pc,r6
654 0000CF65 # asm("movl _exp_pc,r7"); /* r7 = PC expected */
655 0000CF65 0d effffffa85 57 movl _exp_pc,r7
656 0000CF6C # asm("movl _fpm_op_code,r8"); /* r8 = op-code on stack */
657 0000CF6C 0d effffffa7e 58 movl _fpm_op_code,r8
658 0000CF73 # asm("movl _op_code,r9"); /* r9 = op-code expected */
659 0000CF73 0d effffffa77 59 movl _op_code,r9
660 0000CF7A # asm("movl _fpm_ls_op,r10"); /* r10 = LS op. on stack */
661 0000CF7A 0d effffffa70 5a movl _fpm_ls_op,r10
662 0000CF81 # asm("movl _sgl_value_2,r11"); /* r11 = LS op. expected */
663 0000CF81 0d effffffa69 5b movl _sgl_value_2,r11
664 0000CF88 # asm("movl _fpm_ms_op,r12"); /* r12 = MS op. on stack */
665 0000CF88 0d effffffa62 5c movl _fpm_ms_op,r12
666 0000CF8F # asm("movl _dbl_value_1,r13"); /* r13 = MS op. expected */
667 0000CF8F 0d effffffa5b 5d movl _dbl_value_1,r13
668 0000CF96 # asm("movl _index,r14"); /* r14 = data pattern index */
669 0000CF96 0d effffffa54 5e movl _index,r14
670 0000CF9D # } else {
671 0000CF9D 11 55 jbr L466
672 0000CF9F L465:
673 0000CF9F # sgl_value_2 = dbl_st_acc.l; /* LS of final ACC */
674 0000CF9F 0d effffffa4f effffffa46 movl _dbl_st_acc+4,_sgl_value_2
675 0000CFAA # sgl_value_3 = dbl_expected.l; /* LS of exp'd ACC */
676 0000CFAA 0d effffffa44 effffffa3b movl _dbl_expected+4,_sgl_value_3
677 0000CFB5 # asm("movl _fpm_pc,r5"); /* r5 = PC on the stack */
678 0000CFB5 0d effffffa35 55 movl _fpm_pc,r5
679 0000CFBC # asm("movl _fpm_op_code,r6"); /* r6 = op-code on stack */
680 0000CFBC 0d effffffa2e 56 movl _fpm_op_code,r6
681 0000CFC3 # asm("movl _fpm_ls_op,r7"); /* r7 = LS op. on stack */
682 0000CFC3 0d effffffa27 57 movl _fpm_ls_op,r7
683 0000CFCA # asm("movl _fpm_ms_op,r8"); /* r8 = LS op. on stack */
684 0000CFCA 0d effffffa20 58 movl _fpm_ms_op,r8
685 0000CFD1 # asm("movl _dbl_st_acc,r9"); /* r9 = MS of final ACC. */
686 0000CFD1 0d effffffa19 59 movl _dbl_st_acc,r9
687 0000CFD8 # asm("movl _sgl_value_2,r10"); /* r10 = LS of final ACC. */
688 0000CFD8 0d effffffa12 5a movl _sgl_value_2,r10
689 0000CFDF # asm("movl _dbl_expected,r11"); /* r11 = MS of exp'd ACC. */
690 0000CFDF 0d effffffa0b 5b movl _dbl_expected,r11
691 0000CFE6 # asm("movl _sgl_value_3,r12"); /* r12 = LS of exp'd ACC. */
692 0000CFE6 0d effffffa04 5c movl _sgl_value_3,r12
693 0000CFED # asm("movl _index,r13"); /* r13 = data pattern index */
694 0000CFED 0d effffff9fd 5d movl _index,r13
695 0000CFF4 # }
696 0000CFF4 L466:
697 0000CFF4 # asm("halt");
698 0000CFF4 00 halt
699 0000CFF5 # }
700 0000CFF5 40 ret#2
701 0000CFF6 .set L461,0x0
702 0000CFF6 L463:
703 0000CFF6 13 ff22 jbr L464
704 0000CFF9 .data
705 000006bc * .text
706 0000CFF9 00 .align 1
707 0000CFFA .globl _fill_reg_buf
708 0000CFFA _fill_reg_buf:
709 0000CFFA 0000 .word L468
710 0000CFFC #
711 0000CFFC #
712 0000CFFC #
713 0000CFFC #
714 0000CFFC # /*
715 0000CFFC # ***********************************************************************
716 0000CFFC # * fill a register buffer with known patterns
717 0000CFFC # ***********************************************************************
718 0000CFFC # */
719 0000CFFC # fill_reg_buf( buffer )
720 0000CFFC # int *buffer;
721 0000CFFC # {
722 0000CFFC 13 00a8 jbr L470
723 0000CFFF L471:
724 0000CFFF # buffer[0] = 0x10101010; /* register '0' data */
725 0000CFFF 0d ad04 50 movl 4(fp),r0
726 0000D003 0d 8f10101010 60 movl $269488144,(r0)
727 0000D00A # buffer[1] = 0x11111111;
728 0000D00A 0d ad04 50 movl 4(fp),r0
729 0000D00E 0d 8f11111111 a004 movl $286331153,4(r0)
730 0000D016 # buffer[2] = 0x12121212;
731 0000D016 0d ad04 50 movl 4(fp),r0
732 0000D01A 0d 8f12121212 a008 movl $303174162,8(r0)
733 0000D022 # buffer[3] = 0x13131313;
734 0000D022 0d ad04 50 movl 4(fp),r0
735 0000D026 0d 8f13131313 a00c movl $320017171,12(r0)
736 0000D02E # buffer[4] = 0x14141414;
737 0000D02E 0d ad04 50 movl 4(fp),r0
738 0000D032 0d 8f14141414 a010 movl $336860180,16(r0)
739 0000D03A # buffer[5] = 0x15151515;
740 0000D03A 0d ad04 50 movl 4(fp),r0
741 0000D03E 0d 8f15151515 a014 movl $353703189,20(r0)
742 0000D046 # buffer[6] = 0x16161616;
743 0000D046 0d ad04 50 movl 4(fp),r0
744 0000D04A 0d 8f16161616 a018 movl $370546198,24(r0)
745 0000D052 # buffer[7] = 0x17171717;
746 0000D052 0d ad04 50 movl 4(fp),r0
747 0000D056 0d 8f17171717 a01c movl $387389207,28(r0)
748 0000D05E # buffer[8] = 0x18181818;
749 0000D05E 0d ad04 50 movl 4(fp),r0
750 0000D062 0d 8f18181818 a020 movl $404232216,32(r0)
751 0000D06A # buffer[9] = 0x19191919;
752 0000D06A 0d ad04 50 movl 4(fp),r0
753 0000D06E 0d 8f19191919 a024 movl $421075225,36(r0)
754 0000D076 # buffer[10] = 0x1a1a1a1a;
755 0000D076 0d ad04 50 movl 4(fp),r0
756 0000D07A 0d 8f1a1a1a1a a028 movl $437918234,40(r0)
757 0000D082 # buffer[11] = 0x1b1b1b1b;
758 0000D082 0d ad04 50 movl 4(fp),r0
759 0000D086 0d 8f1b1b1b1b a02c movl $454761243,44(r0)
760 0000D08E # buffer[12] = 0x1c1c1c1c;
761 0000D08E 0d ad04 50 movl 4(fp),r0
762 0000D092 0d 8f1c1c1c1c a030 movl $471604252,48(r0)
763 0000D09A # buffer[13] = 0x1d1d1d1d;
764 0000D09A 0d ad04 50 movl 4(fp),r0
765 0000D09E 0d 8f1d1d1d1d a034 movl $488447261,52(r0)
766 0000D0A6 # }
767 0000D0A6 40 ret#2
768 0000D0A7 .set L468,0x0
769 0000D0A7 L470:
770 0000D0A7 13 ff55 jbr L471
771 0000D0AA .data
772 000006bc * #
772 000006bc * #
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