![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to monitor.lst CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / fpevent|
Return to monitor.lst CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / fpevent |
Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 000002dc * .text
4 00000000 .align 1
5 00000000 .globl _monitor
6 00000000 _monitor:
7 0000C2D8 0000 .word L382
8 0000C2DA #
9 0000C2DA # #include "evt_defs.h"
10 0000C2DA #
11 0000C2DA # /*********************************************************************
12 0000C2DA # *
13 0000C2DA # * MONITOR FOR THE FPP EVENTS TESTS
14 0000C2DA # *
15 0000C2DA # * 22-Mar-85 : written
16 0000C2DA # * 10-Jul-85 : don't run pipe test if running all tests on a specified op-code
17 0000C2DA # * 16-Jul-85 : added NO-FPP test capability
18 0000C2DA # *********************************************************************/
19 0000C2DA # monitor()
20 0000C2DA # {
21 0000C2DA 13 02d0 jbr L384
22 0000C2DD L385:
23 0000C2DD # struct test_t *test_tbl; /* pointer to the test table to use */
24 0000C2DD # int no_subtests; /* number of tests in the table */
25 0000C2DD # force_loop = FALSE; /* clear the 'force loop' flag */
26 0000C2DD 4d effffffff5 clrl _force_loop
27 0000C2E3 # valid_test = FALSE; /* clear the 'a test was run' flag */
28 0000C2E3 4d efffffffef clrl _valid_test
29 0000C2E9 # cycle = 0; /* clear the cycle count */
30 0000C2E9 4d efffffffe9 clrl _cycle
31 0000C2EF # errcnt = 0; /* clear the error count */
32 0000C2EF 4d efffffffe3 clrl _errcnt
33 0000C2F5 # error = FALSE; /* clear the current error flag */
34 0000C2F5 4d efffffffdd clrl _error
35 0000C2FB # if( no_fpp_wcs ) {
36 0000C2FB 5d efffffffd7 tstl _no_fpp_wcs
37 0000C301 31 12 jeql L386
38 0000C303 # test_tbl = no_fpp_test_tbl; /* use the NO-FPP tests */
39 0000C303 0d 8f00000000 adc8 movl $_no_fpp_test_tbl,-56(fp)
40 0000C30B # no_subtests = no_fpp_test_cnt;
41 0000C30B 0d efffffffc7 adc4 movl _no_fpp_test_cnt,-60(fp)
42 0000C313 # } else {
43 0000C313 11 10 jbr L387
44 0000C315 L386:
45 0000C315 # test_tbl = fpp_test_tbl; /* use the FPP tests */
46 0000C315 0d 8f00000000 adc8 movl $_fpp_test_tbl,-56(fp)
47 0000C31D # no_subtests = fpp_test_cnt;
48 0000C31D 0d efffffffb5 adc4 movl _fpp_test_cnt,-60(fp)
49 0000C325 # }
50 0000C325 L387:
51 0000C325 # /*
52 0000C325 # * Print the Header information and enable the Data Cache if desired
53 0000C325 # */
54 0000C325 # if( prt_hdrs ) {
55 0000C325 5d efffffffad tstl _prt_hdrs
56 0000C32B 31 31 jeql L388
57 0000C32D # writes("\nFPP Events Test");
58 0000C32D .data 1
59 000002dc * L390:
60 000002dc * 0A465050204576656E7473205 .ascii "\12FPP Events Test\0"
465737400
61 000002ed * .text
62 0000C32D dd 8f000002dc pushl $L390
63 0000C333 fe 08 efffffff9e callf $8,_writes
64 0000C33A # if( no_fpp_wcs )
65 0000C33A 5d efffffff98 tstl _no_fpp_wcs
66 0000C340 31 0f jeql L391
67 0000C342 # writes(" - FPP is NOT installed");
68 0000C342 .data 1
69 000002ed * L392:
70 000002ed * 202D20465050206973204E4F5 .ascii " - FPP is NOT installed\0"
420696E7374616C6C656400
71 00000305 * .text
72 0000C342 dd 8f000002ed pushl $L392
73 0000C348 fe 08 efffffff89 callf $8,_writes
74 0000C34F # else
75 0000C34F 11 0d jbr L393
76 0000C351 L391:
77 0000C351 # writes(" - FPP is installed");
78 0000C351 .data 1
79 00000305 * L394:
80 00000305 * 202D2046505020697320696E7 .ascii " - FPP is installed\0"
374616C6C656400
81 00000319 * .text
82 0000C351 dd 8f00000305 pushl $L394
83 0000C357 fe 08 efffffff7a callf $8,_writes
84 0000C35E L393:
85 0000C35E # }
86 0000C35E # if( en_data_cache ) {
87 0000C35E L388:
88 0000C35E 5d efffffff74 tstl _en_data_cache
89 0000C364 31 1d jeql L395
90 0000C366 # if( prt_hdrs )
91 0000C366 5d efffffff6c tstl _prt_hdrs
92 0000C36C 31 0d jeql L396
93 0000C36E # writes(", Data Cache Enabled: ");
94 0000C36E .data 1
95 00000319 * L397:
96 00000319 * 2C20204461746120436163686 .ascii ", Data Cache Enabled: \0"
520456E61626C65643A2000
97 00000331 * .text
98 0000C36E dd 8f00000319 pushl $L397
99 0000C374 fe 08 efffffff5d callf $8,_writes
100 0000C37B # asm("mtpr $1,$25"); /* purge all data cache pages */
101 0000C37B L396:
102 0000C37B ad 01 19 mtpr $1,$25
103 0000C37E # asm("mtpr $1,$27");; /* enable the data cache */
104 0000C37E ad 01 1b mtpr $1,$27
105 0000C381 # } else {
106 0000C381 11 18 jbr L398
107 0000C383 L395:
108 0000C383 # if( prt_hdrs )
109 0000C383 5d efffffff4f tstl _prt_hdrs
110 0000C389 31 0d jeql L399
111 0000C38B # writes(", Data Cache Disabled: ");
112 0000C38B .data 1
113 00000331 * L400:
114 00000331 * 2C20446174612043616368652 .ascii ", Data Cache Disabled: \0"
044697361626C65643A2000
115 00000349 * .text
116 0000C38B dd 8f00000331 pushl $L400
117 0000C391 fe 08 efffffff40 callf $8,_writes
118 0000C398 # asm("mtpr $2,$27"); /* disable the data cache */
119 0000C398 L399:
120 0000C398 ad 02 1b mtpr $2,$27
121 0000C39B # }
122 0000C39B L398:
123 0000C39B # /*
124 0000C39B # * Check the run list to see if a specific test is called for
125 0000C39B # */
126 0000C39B # for( cycle = 1; ( (cycle <= count) || nonstop ); cycle++ ) {
127 0000C39B 0d 01 efffffff36 movl $1,_cycle
128 0000C3A2 L403:
129 0000C3A2 1d efffffff30 efffffff2b cmpl _cycle,_count
130 0000C3AD 51 0b jleq L9999
131 0000C3AF 5d efffffff23 tstl _nonstop
132 0000C3B5 21 03 13 0125 jeql L402
133 0000C3BA L9999:
134 0000C3BA # if( (prt_hdrs) && (cycle != 1) ) /* show we're still running */
135 0000C3BA 5d efffffff18 tstl _prt_hdrs
136 0000C3C0 31 12 jeql L404
137 0000C3C2 1d efffffff10 01 cmpl _cycle,$1
138 0000C3C9 31 09 jeql L404
139 0000C3CB # writec('.');
140 0000C3CB dd 2e pushl $46
141 0000C3CD fe 08 efffffff04 callf $8,_writec
142 0000C3D4 # if( (run_list > 0) && (run_list <= no_subtests) ) {
143 0000C3D4 L404:
144 0000C3D4 5d effffffefe tstl _run_list
145 0000C3DA 51 6e jleq L406
146 0000C3DC 1d effffffef6 adc4 cmpl _run_list,-60(fp)
147 0000C3E4 41 64 jgtr L406
148 0000C3E6 # test_no = run_list;
149 0000C3E6 0d effffffeec effffffee7 movl _run_list,_test_no
150 0000C3F1 # test_index = run_list - 1;
151 0000C3F1 3c 01 effffffee0 50 subl3 $1,_run_list,r0
152 0000C3F9 0d 50 effffffed8 movl r0,_test_index
153 0000C400 # if( (prt_hdrs) && (cycle == 1) ) {
154 0000C400 5d effffffed2 tstl _prt_hdrs
155 0000C406 31 29 jeql L407
156 0000C408 1d effffffeca 01 cmpl _cycle,$1
157 0000C40F 21 20 jneq L407
158 0000C411 # /* if( !error ) /* */
159 0000C411 # writec('\n');
160 0000C411 dd 0a pushl $10
161 0000C413 fe 08 effffffebe callf $8,_writec
162 0000C41A # writes( test_tbl[ test_index ].name );
163 0000C41A 48 03 effffffeb7 50 shll $3,_test_index,r0
164 0000C422 1c 50 adc8 50 addl3 r0,-56(fp),r0
165 0000C427 dd a004 pushl 4(r0)
166 0000C42A fe 08 effffffea7 callf $8,_writes
167 0000C431 # };
168 0000C431 L407:
169 0000C431 # (test_tbl[ test_index ].test)();
170 0000C431 0d effffffea1 50 movl _test_index,r0
171 0000C438 48 03 50 50 shll $3,r0,r0
172 0000C43C 1c 50 adc8 50 addl3 r0,-56(fp),r0
173 0000C441 0d 60 50 movl (r0),r0
174 0000C444 bf 04 60 calls $4,(r0)
175 0000C447 # }
176 0000C447 # else /* run all tests */
177 0000C447 13 008c jbr L408
178 0000C44A L406:
179 0000C44A # {
180 0000C44A # for(test_index=0; test_index<no_subtests; test_index++) {
181 0000C44A 4d effffffe88 clrl _test_index
182 0000C450 L411:
183 0000C450 1d effffffe82 adc4 cmpl _test_index,-60(fp)
184 0000C458 81 7c jgeq L410
185 0000C45A # test_no = test_index + 1;
186 0000C45A 1c 01 effffffe77 50 addl3 $1,_test_index,r0
187 0000C462 0d 50 effffffe6f movl r0,_test_no
188 0000C469 # if( (no_fpp_wcs) || /* don't run pipe test w/ FPP WCS */
189 0000C469 # (!evt_inst) || /* and a specified instruction */
190 0000C469 # (test_index != pipe_test_index) ) {
191 0000C469 5d effffffe69 tstl _no_fpp_wcs
192 0000C46F 21 15 jneq L9998
193 0000C471 5d effffffe61 tstl _evt_inst
194 0000C477 31 0d jeql L9998
195 0000C479 1d effffffe59 effffffe54 cmpl _test_index,_pipe_test_index
196 0000C484 31 47 jeql L412
197 0000C486 L9998:
198 0000C486 # if( (prt_hdrs) && (cycle == 1) ) {
199 0000C486 5d effffffe4c tstl _prt_hdrs
200 0000C48C 31 29 jeql L413
201 0000C48E 1d effffffe44 01 cmpl _cycle,$1
202 0000C495 21 20 jneq L413
203 0000C497 # /* if( !error ) /* */
204 0000C497 # writec('\n');
205 0000C497 dd 0a pushl $10
206 0000C499 fe 08 effffffe38 callf $8,_writec
207 0000C4A0 # writes( test_tbl[ test_index ].name );
208 0000C4A0 48 03 effffffe31 50 shll $3,_test_index,r0
209 0000C4A8 1c 50 adc8 50 addl3 r0,-56(fp),r0
210 0000C4AD dd a004 pushl 4(r0)
211 0000C4B0 fe 08 effffffe21 callf $8,_writes
212 0000C4B7 # };
213 0000C4B7 L413:
214 0000C4B7 # (test_tbl[ test_index ].test)();
215 0000C4B7 0d effffffe1b 50 movl _test_index,r0
216 0000C4BE 48 03 50 50 shll $3,r0,r0
217 0000C4C2 1c 50 adc8 50 addl3 r0,-56(fp),r0
218 0000C4C7 0d 60 50 movl (r0),r0
219 0000C4CA bf 04 60 calls $4,(r0)
220 0000C4CD # }
221 0000C4CD # }
222 0000C4CD L412:
223 0000C4CD L409:
224 0000C4CD 6d effffffe05 incl _test_index
225 0000C4D3 13 ff7a jbr L411
226 0000C4D6 L410:
227 0000C4D6 # } /* end of test-all-instructions */
228 0000C4D6 L408:
229 0000C4D6 # } /* end of test cycles - done with the test */
230 0000C4D6 L401:
231 0000C4D6 6d effffffdfc incl _cycle
232 0000C4DC 13 fec3 jbr L403
233 0000C4DF L402:
234 0000C4DF # cycle--; /* correct cycle count */
235 0000C4DF 7d effffffdf3 decl _cycle
236 0000C4E5 # if( prt_hdrs ) {
237 0000C4E5 5d effffffded tstl _prt_hdrs
238 0000C4EB 21 03 13 008e jeql L414
239 0000C4F0 # /* if( !error ) /* */
240 0000C4F0 # writec('\n');; /* new line if no current errors */
241 0000C4F0 dd 0a pushl $10
242 0000C4F2 fe 08 effffffddf callf $8,_writec
243 0000C4F9 # if( valid_test ) { /* were any tests actually run? */
244 0000C4F9 5d effffffdd9 tstl _valid_test
245 0000C4FF 31 5a jeql L415
246 0000C501 # writes("Cycles Complete = ");
247 0000C501 .data 1
248 00000349 * L416:
249 00000349 * 4379636C657320436F6D706C6 .ascii "Cycles Complete = \0"
57465203D2000
250 0000035c * .text
251 0000C501 dd 8f00000349 pushl $L416
252 0000C507 fe 08 effffffdca callf $8,_writes
253 0000C50E # writed( cycle );
254 0000C50E dd effffffdc4 pushl _cycle
255 0000C514 fe 08 effffffdbd callf $8,_writed
256 0000C51B # if( errcnt ) {
257 0000C51B 5d effffffdb7 tstl _errcnt
258 0000C521 31 29 jeql L418
259 0000C523 # writes(", Error Count = " );
260 0000C523 .data 1
261 0000035c * L419:
262 0000035c * 2C20204572726F7220436F756 .ascii ", Error Count = \0"
E74203D2000
263 0000036e * .text
264 0000C523 dd 8f0000035c pushl $L419
265 0000C529 fe 08 effffffda8 callf $8,_writes
266 0000C530 # writed( errcnt );
267 0000C530 dd effffffda2 pushl _errcnt
268 0000C536 fe 08 effffffd9b callf $8,_writed
269 0000C53D # writes(", Test Complete\n");
270 0000C53D .data 1
271 0000036e * L420:
272 0000036e * 2C20205465737420436F6D706 .ascii ", Test Complete\12\0"
C6574650A00
273 00000380 * .text
274 0000C53D dd 8f0000036e pushl $L420
275 0000C543 fe 08 effffffd8e callf $8,_writes
276 0000C54A # } else
277 0000C54A 11 0d jbr L421
278 0000C54C L418:
279 0000C54C # writes(", TEST PASSED -NO ERRORS!!! \n");
280 0000C54C .data 1
281 00000380 * L422:
282 00000380 * 2C20205445535420504153534 .ascii ", TEST PASSED -NO ERRORS!!! \12\0"
544202D4E4F204552524F5253
212121200A00
283 0000039f * .text
284 0000C54C dd 8f00000380 pushl $L422
285 0000C552 fe 08 effffffd7f callf $8,_writes
286 0000C559 L421:
287 0000C559 # } else {
288 0000C559 11 23 jbr L423
289 0000C55B L415:
290 0000C55B # writes("FPEVENT: no tests were run with instruction ");
291 0000C55B .data 1
292 0000039f * L424:
293 0000039f * 46504556454E543A206E6F207 .ascii "FPEVENT: no tests were run with instruction \0"
4657374732077657265207275
6E207769746820696E7374727
56374696F6E2000
294 000003cc * .text
295 0000C55B dd 8f0000039f pushl $L424
296 0000C561 fe 08 effffffd70 callf $8,_writes
297 0000C568 # writeh( evt_inst );
298 0000C568 dd effffffd6a pushl _evt_inst
299 0000C56E fe 08 effffffd63 callf $8,_writeh
300 0000C575 # writec('\n');
301 0000C575 dd 0a pushl $10
302 0000C577 fe 08 effffffd5a callf $8,_writec
303 0000C57E # }
304 0000C57E L423:
305 0000C57E # };
306 0000C57E L414:
307 0000C57E # /*
308 0000C57E # * Set up the registers to halt
309 0000C57E # */
310 0000C57E # asm("movl _errcnt,r0"); /* set error count for halt */
311 0000C57E 0d effffffd54 50 movl _errcnt,r0
312 0000C585 # asm("bneq 1f");
313 0000C585 21 0f bneq 1f
314 0000C587 # asm("tstl _valid_test"); /* were any tests run? */
315 0000C587 5d effffffd4b tstl _valid_test
316 0000C58D # asm("beql 1f"); /* r0 = 0 if no tests run */
317 0000C58D 31 07 beql 1f
318 0000C58F # asm("movl $0xCAFEBABE,r0");; /* set the no-error flag */
319 0000C58F 0d 8fcafebabe 50 movl $0xCAFEBABE,r0
320 0000C596 # asm("1:");
321 0000C596 1:
322 0000C596 # asm("movl _OPTIONS,r1"); /* restore options to r1 */
323 0000C596 0d effffffd3c 51 movl _OPTIONS,r1
324 0000C59D # asm("movl _cycle,r2"); /* move cycle count to r2 */
325 0000C59D 0d effffffd35 52 movl _cycle,r2
326 0000C5A4 # asm("movl _evt_inst,r3"); /* move inst op-code to r3 */
327 0000C5A4 0d effffffd2e 53 movl _evt_inst,r3
328 0000C5AB # asm("halt");;
329 0000C5AB 00 halt
330 0000C5AC # }
331 0000C5AC 40 ret#2
332 0000C5AD .set L382,0x0
333 0000C5AD L384:
334 0000C5AD 3c 3c 5d 5e subl3 $60,fp,sp
335 0000C5B1 13 fd29 jbr L385
336 000002dc * .data
337 000002dc * #
338 000002dc * #
338 000002dc * #
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.