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1.1 ! root 1: ! 2: #include "evt_defs.h" ! 3: ! 4: /* ! 5: ********************************************************************* ! 6: * FPP PIPELINED EVENTS TEST #1 ! 7: * ! 8: * This test will execute the following code: "LDD DIVD MOVL CVDL" ! 9: * with an alignment fault on the MOVL. We will make sure that: ! 10: * 1. The fault is detected, ! 11: * 2. the divide operation completes, and ! 12: * 3. the convert double to integer isn't executed. ! 13: * ! 14: * NOTE: pipe14 also uses this tests data patterns ! 15: ********************************************************************* ! 16: */ ! 17: pipe1() ! 18: { ! 19: asm("moval (r13),_pre_event_fp"); /* save the frame pointer */ ! 20: asm("moval (r14),_pre_event_sp"); /* save the stack pointer */ ! 21: precision = DBL; ! 22: test_event = ALIGN_CODE; /* alignment fault expected */ ! 23: exp_event = FALSE; /* ... but not yet */ ! 24: asm("movab _pipe1_ret,_event_return"); /* post event addr */ ! 25: for( index = 0; index < max_pipe1_index; index++ ) ! 26: { ! 27: dbl_value_1 = pipe1_data[index].op_1; /* get the data */ ! 28: dbl_value_2 = pipe1_data[index].op_2; ! 29: dbl_expected = pipe1_data[index].exp; ! 30: sgl_value_10 = 0; ! 31: asm(".globl _pipe1_lp1"); /* start of error loop */ ! 32: asm("_pipe1_lp1:"); ! 33: asm("bispsw $0x60"); /* enable ovfl & undfl */ ! 34: asm("ldd _dbl_value_1"); /* load the Acc. */ ! 35: exp_event = test_event; /* expect event soon */ ! 36: asm("divd _dbl_value_2"); /* start the divide */ ! 37: asm("movl _sgl_dummy1+1,_sgl_dummy2+2"); /* trigger the fault */ ! 38: asm("cvdl _sgl_value_10"); /* we shouldn't get to here */ ! 39: /* ! 40: * If we got to here then there was no event ! 41: */ ! 42: if( force_loop ) ! 43: asm("brw _pipe1_lp1");; /* loop on the error */ ! 44: exp_event = FALSE; /* reset event expected flag */ ! 45: asm("bicpsw $0x60"); /* disable ovfl & undfl evts */ ! 46: asm("movl _pre_event_fp,fp"); /* restore the frame pointer */ ! 47: asm("movl _pre_event_sp,sp"); /* restore the stack pointer */ ! 48: no_pipe1_evt();; /* report the error */ ! 49: /* ! 50: * Come here after the event ! 51: */ ! 52: asm(".globl _pipe1_ret"); ! 53: asm("_pipe1_ret:"); ! 54: asm("movl _pre_event_fp,fp"); /* restore the frame pointer */ ! 55: asm("movl _pre_event_sp,sp"); /* restore the stack pointer */ ! 56: if( force_loop ) ! 57: asm("brw _pipe1_lp1");; /* loop on the error */ ! 58: asm("bicpsw $0x60"); /* disable ovfl & undfl evts */ ! 59: if( (post_evt_acc.m != dbl_expected.m) || ! 60: (post_evt_acc.l != dbl_expected.l) ) ! 61: bad_pipe1_result(); /* incorrect result error */ ! 62: else if( sgl_value_10 ) ! 63: pipe1_queue_err(); /* queue not cleared error */ ! 64: } ! 65: } ! 66: ! 67: ! 68: ! 69: /**************************************************************************** ! 70: * Report an "EVENT NOT DETECTED" error ! 71: * ! 72: * Cycle: xx. EVT test xx. subtest xx. index = xx. No alignment fault occurred. ! 73: * inst = LDD op1, DIVD op2, MOVL op3,op4; CVDL op5 (alignment fault on the MOVL) ! 74: * op1 = xxxxxxxx xxxxxxxx, op2 = xxxxxxxx xxxxxxxx ! 75: * addr. of op3 = xxxxxxxx, addr. of op4 = xxxxxxxx ! 76: ****************************************************************************/ ! 77: no_pipe1_evt() ! 78: { ! 79: errcnt++; /* bump the error count */ ! 80: if ( prt_error ) ! 81: { ! 82: print_pipe1_err( ". No alignment fault occurred."); ! 83: writes("op1 = "); ! 84: write32h( dbl_value_1.m ); ! 85: writes(" "); ! 86: write32h( dbl_value_1.l ); ! 87: writes(", op2 = "); ! 88: write32h( dbl_value_2.m ); ! 89: writes(" "); ! 90: write32h( dbl_value_2.l ); ! 91: writes("\naddr. of ad_1 = "); ! 92: write32h( ( (int)&sgl_dummy1 )+1 ); ! 93: writes(", addr. of ad_2 = "); ! 94: write32h( ( (int)&sgl_dummy2 )+2 ); ! 95: writec('\n'); ! 96: } ! 97: if ( halt_flg ) /* halt on error? */ ! 98: pipe1_halt( 1 ); ! 99: if ( loop_on_err ) ! 100: { ! 101: force_loop = TRUE; /* set the force loop flag */ ! 102: asm("jmp _pipe1_lp1"); /* and loop */ ! 103: }; ! 104: } ! 105: ! 106: ! 107: ! 108: ! 109: /**************************************************************************** ! 110: * Report an "BAD ACCUMULATOR AFTER THE EVENT" error ! 111: * ! 112: * Cycle: xx. EVT test xx. subtest xx. index = xx. Bad final Accumulator. ! 113: * inst = LDD op1, DIVD op2, MOVL op3,op4; CVDL op5 (alignment fault on the MOVL) ! 114: * op1 = xxxxxxxx xxxxxxxx, final Acc. = xxxxxxxx xxxxxxxx ! 115: * op2 = xxxxxxxx xxxxxxxx, expected = xxxxxxxx xxxxxxxx ! 116: ****************************************************************************/ ! 117: bad_pipe1_result() ! 118: { ! 119: errcnt++; /* bump the error count */ ! 120: if ( prt_error ) ! 121: { ! 122: print_pipe1_err( ". bad final accumulator."); ! 123: writes("op1 = "); ! 124: write32h( dbl_value_1.m ); ! 125: writes(" "); ! 126: write32h( dbl_value_1.l ); ! 127: writes(", final Acc. = "); ! 128: write32h( post_evt_acc.m ); ! 129: writec(' '); ! 130: write32h( post_evt_acc.l ); ! 131: writes("\nop2 = "); ! 132: write32h( dbl_value_2.m ); ! 133: writes(" "); ! 134: write32h( dbl_value_2.l ); ! 135: writes(", expected = "); ! 136: write32h( dbl_expected.m ); ! 137: writes(" "); ! 138: write32h( dbl_expected.l ); ! 139: writec('\n'); ! 140: } ! 141: if ( halt_flg ) /* halt on error? */ ! 142: pipe1_halt( 2 ); ! 143: if ( loop_on_err ) ! 144: { ! 145: force_loop = TRUE; /* set the force loop flag */ ! 146: asm("jmp _pipe1_lp1"); /* and loop */ ! 147: }; ! 148: } ! 149: ! 150: ! 151: ! 152: ! 153: /**************************************************************************** ! 154: * Report an "FPP QUEUE NOT CLEARED BY THE EVENT" error ! 155: * ! 156: * Cycle: xx. EVT test xx. subtest xx. index = xx. FPP queue not cleared. ! 157: * inst = LDD op1, DIVD op2, MOVL op3,op4; CVDL op5 (alignment fault on the MOVL) ! 158: * op1 = xxxxxxxx xxxxxxxx, final Acc. = xxxxxxxx xxxxxxxx ! 159: * op2 = xxxxxxxx xxxxxxxx, final op5 = xxxxxxxx ! 160: ****************************************************************************/ ! 161: pipe1_queue_err() ! 162: { ! 163: errcnt++; /* bump the error count */ ! 164: if ( prt_error ) ! 165: { ! 166: print_pipe1_err( ". FPP queue not cleared." ); ! 167: writes("op1 = "); ! 168: write32h( dbl_value_1.m ); ! 169: writes(" "); ! 170: write32h( dbl_value_1.l ); ! 171: writes(", final Acc. = "); ! 172: write32h( post_evt_acc.m ); ! 173: writec(' '); ! 174: write32h( post_evt_acc.l ); ! 175: writes("\nop2 = "); ! 176: write32h( dbl_value_2.m ); ! 177: writes(" "); ! 178: write32h( dbl_value_2.l ); ! 179: writes(", final op5 = "); ! 180: write32h( sgl_value_10 ); ! 181: writec('\n'); ! 182: } ! 183: if ( halt_flg ) /* halt on error? */ ! 184: pipe1_halt( 3 ); ! 185: if ( loop_on_err ) ! 186: { ! 187: force_loop = TRUE; /* set the force loop flag */ ! 188: asm("jmp _pipe1_lp1"); /* and loop */ ! 189: }; ! 190: } ! 191: ! 192: ! 193: /**************************************************************************** ! 194: * Print an error message of the form: ! 195: * ! 196: * Cycle: xx. EVT test xx. subtest xx. <your message here>. index = xx ! 197: * inst = LDD op1, DIVD op2, MOVL op3,op4; CVDL op5 (alignment fault on the MOVL) ! 198: ****************************************************************************/ ! 199: print_pipe1_err( msg ) ! 200: char *msg; /* pointer to error message */ ! 201: { ! 202: if( errcnt == 1 ) /* 1st error? */ ! 203: writes(" \n"); /* start a new print line */ ! 204: writes("Cycle: "); ! 205: writed( cycle ); ! 206: writes(" EVT test "); ! 207: writed( test_no ); ! 208: writes(". subtest "); ! 209: writed( subtest ); ! 210: writes(". "); ! 211: writes( msg ); /* write the message */ ! 212: writes(" index = "); ! 213: writed( index ); ! 214: writes( "\ninst = LDD op1, DIVD op2, MOVL op3,op4; CVDL op5 " ); ! 215: writes( "(alignment fault on the MOVL)\n" ); ! 216: } ! 217: ! 218: ! 219: /**************************************************************************** ! 220: * Error Halt Routine ! 221: ****************************************************************************/ ! 222: pipe1_halt( code ) ! 223: int code; /* halt code to use */ ! 224: { ! 225: err_code = code; ! 226: sgl_value_1 = dbl_value_1.m; ! 227: sgl_value_2 = dbl_value_1.l; ! 228: sgl_value_3 = dbl_value_2.m; ! 229: sgl_value_4 = dbl_value_2.l; ! 230: asm("movl _test_no,r0"); /* r0 = test number */ ! 231: asm("movl _subtest,r1"); /* r1 = subtest number */ ! 232: asm("movl _err_code,r2"); /* r2 = error code */ ! 233: asm("movl _cycle,r3"); /* r3 = cycle count */ ! 234: asm("movl _sgl_value_1,r4"); /* r4 = MSW of operand 1 */ ! 235: asm("movl _sgl_value_2,r5"); /* r5 = LSW of operand 1 */ ! 236: asm("movl _sgl_value_3,r6"); /* r6 = MSW of operand 2 */ ! 237: asm("movl _sgl_value_4,r7"); /* r7 = LSW of operand 2 */ ! 238: if( code == 1 ) { ! 239: asm("movab _sgl_dummy1+1,r8"); /* r8 = 1st movl op addr. */ ! 240: asm("movab _sgl_dummy2+2,r9"); /* r9 = 2nd movl op addr. */ ! 241: asm("movl _index,r10"); /* r10 = data index */ ! 242: } ! 243: else if( code == 2 ) { ! 244: sgl_value_5 = post_evt_acc.m; ! 245: sgl_value_6 = post_evt_acc.l; ! 246: sgl_value_7 = dbl_expected.m; ! 247: sgl_value_8 = dbl_expected.l; ! 248: asm("movl _sgl_value_5,r8"); /* r8 = MSW of final acc. */ ! 249: asm("movl _sgl_value_6,r9"); /* r9 = LSW of final acc. */ ! 250: asm("movl _sgl_value_7,r10"); /* r10 = MSW of expected */ ! 251: asm("movl _sgl_value_8,r11"); /* r11 = LSW of expected */ ! 252: asm("movl _index,r12"); /* r12 = data index */ ! 253: } ! 254: else if( code == 3 ) { ! 255: sgl_value_5 = post_evt_acc.m; ! 256: sgl_value_6 = post_evt_acc.l; ! 257: sgl_value_7 = sgl_value_10; ! 258: asm("movl _sgl_value_5,r8"); /* r8 = MSW of final acc. */ ! 259: asm("movl _sgl_value_6,r9"); /* r9 = LSW of final acc. */ ! 260: asm("movl _sgl_value_7,r10"); /* r10 = integer stored */ ! 261: asm("movl _index,r11"); /* r11 = data index */ ! 262: }; ! 263: asm("halt");; /* HALT ... */ ! 264: }; ! 265:
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