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1.1 root 1: 1 00000000 LL0:
2: 2 00000000 .data
3: 3 0000065c * .text
4: 4 00000000 .align 1
5: 5 00000000 .globl _pipe1
6: 6 00000000 _pipe1:
7: 7 0000F34C 0000 .word L381
8: 8 0000F34E #
9: 9 0000F34E # #include "evt_defs.h"
10: 10 0000F34E #
11: 11 0000F34E # /*
12: 12 0000F34E # *********************************************************************
13: 13 0000F34E # * FPP PIPELINED EVENTS TEST #1
14: 14 0000F34E # *
15: 15 0000F34E # * This test will execute the following code: "LDD DIVD MOVL CVDL"
16: 16 0000F34E # * with an alignment fault on the MOVL. We will make sure that:
17: 17 0000F34E # * 1. The fault is detected,
18: 18 0000F34E # * 2. the divide operation completes, and
19: 19 0000F34E # * 3. the convert double to integer isn't executed.
20: 20 0000F34E # *
21: 21 0000F34E # * NOTE: pipe14 also uses this tests data patterns
22: 22 0000F34E # *********************************************************************
23: 23 0000F34E # */
24: 24 0000F34E # pipe1()
25: 25 0000F34E # {
26: 26 0000F34E 13 014f jbr L383
27: 27 0000F351 L384:
28: 28 0000F351 # asm("moval (r13),_pre_event_fp"); /* save the frame pointer */
29: 29 0000F351 ed 6d effffffff4 moval (r13),_pre_event_fp
30: 30 0000F358 # asm("moval (r14),_pre_event_sp"); /* save the stack pointer */
31: 31 0000F358 ed 6e efffffffed moval (r14),_pre_event_sp
32: 32 0000F35F # precision = DBL;
33: 33 0000F35F 0d 02 efffffffe6 movl $2,_precision
34: 34 0000F366 # test_event = ALIGN_CODE; /* alignment fault expected */
35: 35 0000F366 0d 35 efffffffdf movl $53,_test_event
36: 36 0000F36D # exp_event = FALSE; /* ... but not yet */
37: 37 0000F36D 4d efffffffd9 clrl _exp_event
38: 38 0000F373 # asm("movab _pipe1_ret,_event_return"); /* post event addr */
39: 39 0000F373 e9 ef000000cf efffffffce movab _pipe1_ret,_event_return
40: 40 0000F37E # for( index = 0; index < max_pipe1_index; index++ )
41: 41 0000F37E 4d efffffffc8 clrl _index
42: 42 0000F384 L387:
43: 43 0000F384 1d efffffffc2 efffffffbd cmpl _index,_max_pipe1_index
44: 44 0000F38F 91 03 13 010b jgeq L386
45: 45 0000F394 # {
46: 46 0000F394 # dbl_value_1 = pipe1_data[index].op_1; /* get the data */
47: 47 0000F394 5c 18 efffffffb1 50 mull3 $24,_index,r0
48: 48 0000F39C 0c 8f00000000 50 addl2 $_pipe1_data,r0
49: 49 0000F3A3 0d a004 efffffffa5 movl 4(r0),_dbl_value_1+4
50: 50 0000F3AB 0d 60 efffffff9a movl (r0),_dbl_value_1
51: 51 0000F3B2 # dbl_value_2 = pipe1_data[index].op_2;
52: 52 0000F3B2 5c 18 efffffff93 50 mull3 $24,_index,r0
53: 53 0000F3BA 0c 8f00000008 50 addl2 $_pipe1_data+8,r0
54: 54 0000F3C1 0d a004 efffffff87 movl 4(r0),_dbl_value_2+4
55: 55 0000F3C9 0d 60 efffffff7c movl (r0),_dbl_value_2
56: 56 0000F3D0 # dbl_expected = pipe1_data[index].exp;
57: 57 0000F3D0 5c 18 efffffff75 50 mull3 $24,_index,r0
58: 58 0000F3D8 0c 8f00000010 50 addl2 $_pipe1_data+16,r0
59: 59 0000F3DF 0d a004 efffffff69 movl 4(r0),_dbl_expected+4
60: 60 0000F3E7 0d 60 efffffff5e movl (r0),_dbl_expected
61: 61 0000F3EE # sgl_value_10 = 0;
62: 62 0000F3EE 4d efffffff58 clrl _sgl_value_10
63: 63 0000F3F4 # asm(".globl _pipe1_lp1"); /* start of error loop */
64: 64 0000F3F4 .globl _pipe1_lp1
65: 65 0000F3F4 # asm("_pipe1_lp1:");
66: 66 0000F3F4 _pipe1_lp1:
67: 67 0000F3F4 # asm("bispsw $0x60"); /* enable ovfl & undfl */
68: 68 0000F3F4 8b 8860 bispsw $0x60
69: 69 0000F3F7 # asm("ldd _dbl_value_1"); /* load the Acc. */
70: 70 0000F3F7 07 efffffff4f ldd _dbl_value_1
71: 71 0000F3FD # exp_event = test_event; /* expect event soon */
72: 72 0000F3FD 0d efffffff49 efffffff44 movl _test_event,_exp_event
73: 73 0000F408 # asm("divd _dbl_value_2"); /* start the divide */
74: 74 0000F408 f7 efffffff3e divd _dbl_value_2
75: 75 0000F40E # asm("movl _sgl_dummy1+1,_sgl_dummy2+2"); /* trigger the fault */
76: 76 0000F40E 0d efffffff39 efffffff35 movl _sgl_dummy1+1,_sgl_dummy2+2
77: 77 0000F419 # asm("cvdl _sgl_value_10"); /* we shouldn't get to here */
78: 78 0000F419 87 efffffff2d cvdl _sgl_value_10
79: 79 0000F41F # /*
80: 80 0000F41F # * If we got to here then there was no event
81: 81 0000F41F # */
82: 82 0000F41F # if( force_loop )
83: 83 0000F41F 5d efffffff27 tstl _force_loop
84: 84 0000F425 31 03 jeql L388
85: 85 0000F427 # asm("brw _pipe1_lp1");; /* loop on the error */
86: Assemb00026B0C # asm("brw _pipe1_lp1");; /* loop on the error */
87: "pipe100026B0C 86: WARNING: brw: destination label is external
88: 86 0000F427 13 ffca brw _pipe1_lp1
89: 87 0000F42A L388:
90: 88 0000F42A # exp_event = FALSE; /* reset event expected flag */
91: 89 0000F42A 4d efffffff1c clrl _exp_event
92: 90 0000F430 # asm("bicpsw $0x60"); /* disable ovfl & undfl evts */
93: 91 0000F430 9b 8860 bicpsw $0x60
94: 92 0000F433 # asm("movl _pre_event_fp,fp"); /* restore the frame pointer */
95: 93 0000F433 0d efffffff13 5d movl _pre_event_fp,fp
96: 94 0000F43A # asm("movl _pre_event_sp,sp"); /* restore the stack pointer */
97: 95 0000F43A 0d efffffff0c 5e movl _pre_event_sp,sp
98: 96 0000F441 # no_pipe1_evt();; /* report the error */
99: 97 0000F441 fe 04 ef0000005c callf $4,_no_pipe1_evt
100: 98 0000F448 # /*
101: 99 0000F448 # * Come here after the event
102: 100 0000F448 # */
103: 101 0000F448 # asm(".globl _pipe1_ret");
104: 102 0000F448 .globl _pipe1_ret
105: 103 0000F448 # asm("_pipe1_ret:");
106: 104 0000F448 _pipe1_ret:
107: 105 0000F448 # asm("movl _pre_event_fp,fp"); /* restore the frame pointer */
108: 106 0000F448 0d effffffefe 5d movl _pre_event_fp,fp
109: 107 0000F44F # asm("movl _pre_event_sp,sp"); /* restore the stack pointer */
110: 108 0000F44F 0d effffffef7 5e movl _pre_event_sp,sp
111: 109 0000F456 # if( force_loop )
112: 110 0000F456 5d effffffef0 tstl _force_loop
113: 111 0000F45C 31 03 jeql L390
114: 112 0000F45E # asm("brw _pipe1_lp1");; /* loop on the error */
115: "pipe100026B0C 113: WARNING: brw: destination label is external
116: 113 0000F45E 13 ff93 brw _pipe1_lp1
117: 114 0000F461 L390:
118: 115 0000F461 # asm("bicpsw $0x60"); /* disable ovfl & undfl evts */
119: 116 0000F461 9b 8860 bicpsw $0x60
120: 117 0000F464 # if( (post_evt_acc.m != dbl_expected.m) ||
121: 118 0000F464 # (post_evt_acc.l != dbl_expected.l) )
122: 119 0000F464 1d effffffee2 effffffedd cmpl _post_evt_acc,_dbl_expected
123: 120 0000F46F 21 0d jneq L9999
124: 121 0000F471 1d effffffed9 effffffed4 cmpl _post_evt_acc+4,_dbl_expected+4
125: 122 0000F47C 31 09 jeql L391
126: 123 0000F47E L9999:
127: 124 0000F47E # bad_pipe1_result(); /* incorrect result error */
128: 125 0000F47E fe 04 ef00000111 callf $4,_bad_pipe1_result
129: 126 0000F485 # else if( sgl_value_10 )
130: 127 0000F485 11 0f jbr L393
131: 128 0000F487 L391:
132: 129 0000F487 5d effffffebf tstl _sgl_value_10
133: 130 0000F48D 31 07 jeql L394
134: 131 0000F48F # pipe1_queue_err(); /* queue not cleared error */
135: 132 0000F48F fe 04 ef00000222 callf $4,_pipe1_queue_err
136: 133 0000F496 # }
137: 134 0000F496 L394:
138: 135 0000F496 L393:
139: 136 0000F496 L385:
140: 137 0000F496 6d effffffeb0 incl _index
141: 138 0000F49C 13 fee5 jbr L387
142: 139 0000F49F L386:
143: 140 0000F49F # }
144: 141 0000F49F 40 ret#2
145: 142 0000F4A0 .set L381,0x0
146: 143 0000F4A0 L383:
147: 144 0000F4A0 13 feae jbr L384
148: 145 0000F4A3 .data
149: 146 0000065c * .text
150: 147 0000F4A3 00 .align 1
151: 148 0000F4A4 .globl _no_pipe1_evt
152: 149 0000F4A4 _no_pipe1_evt:
153: 150 0000F4A4 0000 .word L396
154: 151 0000F4A6 #
155: 152 0000F4A6 #
156: 153 0000F4A6 #
157: 154 0000F4A6 # /****************************************************************************
158: 155 0000F4A6 # * Report an "EVENT NOT DETECTED" error
159: 156 0000F4A6 # *
160: 157 0000F4A6 # * Cycle: xx. EVT test xx. subtest xx. index = xx. No alignment fault occurred.
161: 158 0000F4A6 # * inst = LDD op1, DIVD op2, MOVL op3,op4; CVDL op5 (alignment fault on the MOVL)
162: 159 0000F4A6 # * op1 = xxxxxxxx xxxxxxxx, op2 = xxxxxxxx xxxxxxxx
163: 160 0000F4A6 # * addr. of op3 = xxxxxxxx, addr. of op4 = xxxxxxxx
164: 161 0000F4A6 # ****************************************************************************/
165: 162 0000F4A6 # no_pipe1_evt()
166: 163 0000F4A6 # {
167: 164 0000F4A6 13 00ea jbr L398
168: 165 0000F4A9 L399:
169: 166 0000F4A9 # errcnt++; /* bump the error count */
170: 167 0000F4A9 6d effffffe9d incl _errcnt
171: 168 0000F4AF # if ( prt_error )
172: 169 0000F4AF 5d effffffe97 tstl _prt_error
173: 170 0000F4B5 21 03 13 00b2 jeql L400
174: 171 0000F4BA # {
175: 172 0000F4BA # print_pipe1_err( ". No alignment fault occurred.");
176: 173 0000F4BA .data 1
177: 174 0000065c * L402:
178: 175 0000065c * 2E204E6F20616C69676E6D656 .ascii ". No alignment fault occurred.\0"
179: E74206661756C74206F636375
180: 727265642E00
181: 176 0000067b * .text
182: 177 0000F4BA dd 8f0000065c pushl $L402
183: 178 0000F4C0 fe 08 ef000002f9 callf $8,_print_pipe1_err
184: 179 0000F4C7 # writes("op1 = ");
185: 180 0000F4C7 .data 1
186: 181 0000067b * L404:
187: 182 0000067b * 6F7031203D2000 .ascii "op1 = \0"
188: 183 00000682 * .text
189: 184 0000F4C7 dd 8f0000067b pushl $L404
190: 185 0000F4CD fe 08 effffffe78 callf $8,_writes
191: 186 0000F4D4 # write32h( dbl_value_1.m );
192: 187 0000F4D4 dd effffffe72 pushl _dbl_value_1
193: 188 0000F4DA fe 08 effffffe6b callf $8,_write32h
194: 189 0000F4E1 # writes(" ");
195: 190 0000F4E1 .data 1
196: 191 00000682 * L406:
197: 192 00000682 * 2000 .ascii " \0"
198: 193 00000684 * .text
199: 194 0000F4E1 dd 8f00000682 pushl $L406
200: 195 0000F4E7 fe 08 effffffe5e callf $8,_writes
201: 196 0000F4EE # write32h( dbl_value_1.l );
202: 197 0000F4EE dd effffffe5c pushl _dbl_value_1+4
203: 198 0000F4F4 fe 08 effffffe51 callf $8,_write32h
204: 199 0000F4FB # writes(", op2 = ");
205: 200 0000F4FB .data 1
206: 201 00000684 * L407:
207: 202 00000684 * 2C2020206F7032203D2000 .ascii ", op2 = \0"
208: 203 0000068f * .text
209: 204 0000F4FB dd 8f00000684 pushl $L407
210: 205 0000F501 fe 08 effffffe44 callf $8,_writes
211: 206 0000F508 # write32h( dbl_value_2.m );
212: 207 0000F508 dd effffffe3e pushl _dbl_value_2
213: 208 0000F50E fe 08 effffffe37 callf $8,_write32h
214: 209 0000F515 # writes(" ");
215: 210 0000F515 .data 1
216: 211 0000068f * L408:
217: 212 0000068f * 2000 .ascii " \0"
218: 213 00000691 * .text
219: 214 0000F515 dd 8f0000068f pushl $L408
220: 215 0000F51B fe 08 effffffe2a callf $8,_writes
221: 216 0000F522 # write32h( dbl_value_2.l );
222: 217 0000F522 dd effffffe28 pushl _dbl_value_2+4
223: 218 0000F528 fe 08 effffffe1d callf $8,_write32h
224: 219 0000F52F # writes("\naddr. of ad_1 = ");
225: 220 0000F52F .data 1
226: 221 00000691 * L409:
227: 222 00000691 * 0A616464722E206F662061645 .ascii "\12addr. of ad_1 = \0"
228: F31203D2000
229: 223 000006a3 * .text
230: 224 0000F52F dd 8f00000691 pushl $L409
231: 225 0000F535 fe 08 effffffe10 callf $8,_writes
232: 226 0000F53C # write32h( ( (int)&sgl_dummy1 )+1 );
233: 227 0000F53C dd 8f00000001 pushl $_sgl_dummy1+1
234: 228 0000F542 fe 08 effffffe03 callf $8,_write32h
235: 229 0000F549 # writes(", addr. of ad_2 = ");
236: 230 0000F549 .data 1
237: 231 000006a3 * L410:
238: 232 000006a3 * 2C202020616464722E206F662 .ascii ", addr. of ad_2 = \0"
239: 061645F32203D2000
240: 233 000006b8 * .text
241: 234 0000F549 dd 8f000006a3 pushl $L410
242: 235 0000F54F fe 08 effffffdf6 callf $8,_writes
243: 236 0000F556 # write32h( ( (int)&sgl_dummy2 )+2 );
244: 237 0000F556 dd 8f00000002 pushl $_sgl_dummy2+2
245: 238 0000F55C fe 08 effffffde9 callf $8,_write32h
246: 239 0000F563 # writec('\n');
247: 240 0000F563 dd 0a pushl $10
248: 241 0000F565 fe 08 effffffde0 callf $8,_writec
249: 242 0000F56C # }
250: 243 0000F56C # if ( halt_flg ) /* halt on error? */
251: 244 0000F56C L400:
252: 245 0000F56C 5d effffffdda tstl _halt_flg
253: 246 0000F572 31 09 jeql L412
254: 247 0000F574 # pipe1_halt( 1 );
255: 248 0000F574 dd 01 pushl $1
256: 249 0000F576 fe 08 ef000002fb callf $8,_pipe1_halt
257: 250 0000F57D # if ( loop_on_err )
258: 251 0000F57D L412:
259: 252 0000F57D 5d effffffdc9 tstl _loop_on_err
260: 253 0000F583 31 0d jeql L414
261: 254 0000F585 # {
262: 255 0000F585 # force_loop = TRUE; /* set the force loop flag */
263: 256 0000F585 0d 01 effffffdc0 movl $1,_force_loop
264: 257 0000F58C # asm("jmp _pipe1_lp1"); /* and loop */
265: 258 0000F58C 71 effffffe62 jmp _pipe1_lp1
266: 259 0000F592 # };
267: 260 0000F592 L414:
268: 261 0000F592 # }
269: 262 0000F592 40 ret#2
270: 263 0000F593 .set L396,0x0
271: 264 0000F593 L398:
272: 265 0000F593 13 ff13 jbr L399
273: 266 0000F596 .data
274: 267 0000065c * .text
275: 268 0000F596 .align 1
276: 269 0000F596 .globl _bad_pipe1_result
277: 270 0000F596 _bad_pipe1_result:
278: 271 0000F596 0000 .word L415
279: 272 0000F598 #
280: 273 0000F598 #
281: 274 0000F598 #
282: 275 0000F598 #
283: 276 0000F598 # /****************************************************************************
284: 277 0000F598 # * Report an "BAD ACCUMULATOR AFTER THE EVENT" error
285: 278 0000F598 # *
286: 279 0000F598 # * Cycle: xx. EVT test xx. subtest xx. index = xx. Bad final Accumulator.
287: 280 0000F598 # * inst = LDD op1, DIVD op2, MOVL op3,op4; CVDL op5 (alignment fault on the MOVL)
288: 281 0000F598 # * op1 = xxxxxxxx xxxxxxxx, final Acc. = xxxxxxxx xxxxxxxx
289: 282 0000F598 # * op2 = xxxxxxxx xxxxxxxx, expected = xxxxxxxx xxxxxxxx
290: 283 0000F598 # ****************************************************************************/
291: 284 0000F598 # bad_pipe1_result()
292: 285 0000F598 # {
293: 286 0000F598 13 011a jbr L417
294: 287 0000F59B L418:
295: 288 0000F59B # errcnt++; /* bump the error count */
296: 289 0000F59B 6d effffffdab incl _errcnt
297: 290 0000F5A1 # if ( prt_error )
298: 291 0000F5A1 5d effffffda5 tstl _prt_error
299: 292 0000F5A7 21 03 13 00e2 jeql L419
300: 293 0000F5AC # {
301: 294 0000F5AC # print_pipe1_err( ". bad final accumulator.");
302: 295 0000F5AC .data 1
303: 296 000006b8 * L420:
304: 297 000006b8 * 2E206261642066696E616C206 .ascii ". bad final accumulator.\0"
305: 16363756D756C61746F722E00
306: 298 000006d1 * .text
307: 299 0000F5AC dd 8f000006b8 pushl $L420
308: 300 0000F5B2 fe 08 ef00000207 callf $8,_print_pipe1_err
309: 301 0000F5B9 # writes("op1 = ");
310: 302 0000F5B9 .data 1
311: 303 000006d1 * L421:
312: 304 000006d1 * 6F7031203D2000 .ascii "op1 = \0"
313: 305 000006d8 * .text
314: 306 0000F5B9 dd 8f000006d1 pushl $L421
315: 307 0000F5BF fe 08 effffffd86 callf $8,_writes
316: 308 0000F5C6 # write32h( dbl_value_1.m );
317: 309 0000F5C6 dd effffffd80 pushl _dbl_value_1
318: 310 0000F5CC fe 08 effffffd79 callf $8,_write32h
319: 311 0000F5D3 # writes(" ");
320: 312 0000F5D3 .data 1
321: 313 000006d8 * L422:
322: 314 000006d8 * 2000 .ascii " \0"
323: 315 000006da * .text
324: 316 0000F5D3 dd 8f000006d8 pushl $L422
325: 317 0000F5D9 fe 08 effffffd6c callf $8,_writes
326: 318 0000F5E0 # write32h( dbl_value_1.l );
327: 319 0000F5E0 dd effffffd6a pushl _dbl_value_1+4
328: 320 0000F5E6 fe 08 effffffd5f callf $8,_write32h
329: 321 0000F5ED # writes(", final Acc. = ");
330: 322 0000F5ED .data 1
331: 323 000006da * L423:
332: 324 000006da * 2C20202066696E616C2041636 .ascii ", final Acc. = \0"
333: 32E203D2000
334: 325 000006ec * .text
335: 326 0000F5ED dd 8f000006da pushl $L423
336: 327 0000F5F3 fe 08 effffffd52 callf $8,_writes
337: 328 0000F5FA # write32h( post_evt_acc.m );
338: 329 0000F5FA dd effffffd4c pushl _post_evt_acc
339: 330 0000F600 fe 08 effffffd45 callf $8,_write32h
340: 331 0000F607 # writec(' ');
341: 332 0000F607 dd 20 pushl $32
342: 333 0000F609 fe 08 effffffd3c callf $8,_writec
343: 334 0000F610 # write32h( post_evt_acc.l );
344: 335 0000F610 dd effffffd3a pushl _post_evt_acc+4
345: 336 0000F616 fe 08 effffffd2f callf $8,_write32h
346: 337 0000F61D # writes("\nop2 = ");
347: 338 0000F61D .data 1
348: 339 000006ec * L424:
349: 340 000006ec * 0A6F7032203D2000 .ascii "\12op2 = \0"
350: 341 000006f4 * .text
351: 342 0000F61D dd 8f000006ec pushl $L424
352: 343 0000F623 fe 08 effffffd22 callf $8,_writes
353: 344 0000F62A # write32h( dbl_value_2.m );
354: 345 0000F62A dd effffffd1c pushl _dbl_value_2
355: 346 0000F630 fe 08 effffffd15 callf $8,_write32h
356: 347 0000F637 # writes(" ");
357: 348 0000F637 .data 1
358: 349 000006f4 * L425:
359: 350 000006f4 * 2000 .ascii " \0"
360: 351 000006f6 * .text
361: 352 0000F637 dd 8f000006f4 pushl $L425
362: 353 0000F63D fe 08 effffffd08 callf $8,_writes
363: 354 0000F644 # write32h( dbl_value_2.l );
364: 355 0000F644 dd effffffd06 pushl _dbl_value_2+4
365: 356 0000F64A fe 08 effffffcfb callf $8,_write32h
366: 357 0000F651 # writes(", expected = ");
367: 358 0000F651 .data 1
368: 359 000006f6 * L426:
369: 360 000006f6 * 2C20202065787065637465642 .ascii ", expected = \0"
370: 020203D2000
371: 361 00000708 * .text
372: 362 0000F651 dd 8f000006f6 pushl $L426
373: 363 0000F657 fe 08 effffffcee callf $8,_writes
374: 364 0000F65E # write32h( dbl_expected.m );
375: 365 0000F65E dd effffffce8 pushl _dbl_expected
376: 366 0000F664 fe 08 effffffce1 callf $8,_write32h
377: 367 0000F66B # writes(" ");
378: 368 0000F66B .data 1
379: 369 00000708 * L427:
380: 370 00000708 * 2000 .ascii " \0"
381: 371 0000070a * .text
382: 372 0000F66B dd 8f00000708 pushl $L427
383: 373 0000F671 fe 08 effffffcd4 callf $8,_writes
384: 374 0000F678 # write32h( dbl_expected.l );
385: 375 0000F678 dd effffffcd2 pushl _dbl_expected+4
386: 376 0000F67E fe 08 effffffcc7 callf $8,_write32h
387: 377 0000F685 # writec('\n');
388: 378 0000F685 dd 0a pushl $10
389: 379 0000F687 fe 08 effffffcbe callf $8,_writec
390: 380 0000F68E # }
391: 381 0000F68E # if ( halt_flg ) /* halt on error? */
392: 382 0000F68E L419:
393: 383 0000F68E 5d effffffcb8 tstl _halt_flg
394: 384 0000F694 31 09 jeql L428
395: 385 0000F696 # pipe1_halt( 2 );
396: 386 0000F696 dd 02 pushl $2
397: 387 0000F698 fe 08 ef000001d9 callf $8,_pipe1_halt
398: 388 0000F69F # if ( loop_on_err )
399: 389 0000F69F L428:
400: 390 0000F69F 5d effffffca7 tstl _loop_on_err
401: 391 0000F6A5 31 0d jeql L429
402: 392 0000F6A7 # {
403: 393 0000F6A7 # force_loop = TRUE; /* set the force loop flag */
404: 394 0000F6A7 0d 01 effffffc9e movl $1,_force_loop
405: 395 0000F6AE # asm("jmp _pipe1_lp1"); /* and loop */
406: 396 0000F6AE 71 effffffd40 jmp _pipe1_lp1
407: 397 0000F6B4 # };
408: 398 0000F6B4 L429:
409: 399 0000F6B4 # }
410: 400 0000F6B4 40 ret#2
411: 401 0000F6B5 .set L415,0x0
412: 402 0000F6B5 L417:
413: 403 0000F6B5 13 fee3 jbr L418
414: 404 0000F6B8 .data
415: 405 0000065c * .text
416: 406 0000F6B8 .align 1
417: 407 0000F6B8 .globl _pipe1_queue_err
418: 408 0000F6B8 _pipe1_queue_err:
419: 409 0000F6B8 0000 .word L430
420: 410 0000F6BA #
421: 411 0000F6BA #
422: 412 0000F6BA #
423: 413 0000F6BA #
424: 414 0000F6BA # /****************************************************************************
425: 415 0000F6BA # * Report an "FPP QUEUE NOT CLEARED BY THE EVENT" error
426: 416 0000F6BA # *
427: 417 0000F6BA # * Cycle: xx. EVT test xx. subtest xx. index = xx. FPP queue not cleared.
428: 418 0000F6BA # * inst = LDD op1, DIVD op2, MOVL op3,op4; CVDL op5 (alignment fault on the MOVL)
429: 419 0000F6BA # * op1 = xxxxxxxx xxxxxxxx, final Acc. = xxxxxxxx xxxxxxxx
430: 420 0000F6BA # * op2 = xxxxxxxx xxxxxxxx, final op5 = xxxxxxxx
431: 421 0000F6BA # ****************************************************************************/
432: 422 0000F6BA # pipe1_queue_err()
433: 423 0000F6BA # {
434: 424 0000F6BA 13 0100 jbr L432
435: 425 0000F6BD L433:
436: 426 0000F6BD # errcnt++; /* bump the error count */
437: 427 0000F6BD 6d effffffc89 incl _errcnt
438: 428 0000F6C3 # if ( prt_error )
439: 429 0000F6C3 5d effffffc83 tstl _prt_error
440: 430 0000F6C9 21 03 13 00c8 jeql L434
441: 431 0000F6CE # {
442: 432 0000F6CE # print_pipe1_err( ". FPP queue not cleared." );
443: 433 0000F6CE .data 1
444: 434 0000070a * L435:
445: 435 0000070a * 2E20465050207175657565206 .ascii ". FPP queue not cleared.\0"
446: E6F7420636C65617265642E00
447: 436 00000723 * .text
448: 437 0000F6CE dd 8f0000070a pushl $L435
449: 438 0000F6D4 fe 08 ef000000e5 callf $8,_print_pipe1_err
450: 439 0000F6DB # writes("op1 = ");
451: 440 0000F6DB .data 1
452: 441 00000723 * L436:
453: 442 00000723 * 6F7031203D2000 .ascii "op1 = \0"
454: 443 0000072a * .text
455: 444 0000F6DB dd 8f00000723 pushl $L436
456: 445 0000F6E1 fe 08 effffffc64 callf $8,_writes
457: 446 0000F6E8 # write32h( dbl_value_1.m );
458: 447 0000F6E8 dd effffffc5e pushl _dbl_value_1
459: 448 0000F6EE fe 08 effffffc57 callf $8,_write32h
460: 449 0000F6F5 # writes(" ");
461: 450 0000F6F5 .data 1
462: 451 0000072a * L437:
463: 452 0000072a * 2000 .ascii " \0"
464: 453 0000072c * .text
465: 454 0000F6F5 dd 8f0000072a pushl $L437
466: 455 0000F6FB fe 08 effffffc4a callf $8,_writes
467: 456 0000F702 # write32h( dbl_value_1.l );
468: 457 0000F702 dd effffffc48 pushl _dbl_value_1+4
469: 458 0000F708 fe 08 effffffc3d callf $8,_write32h
470: 459 0000F70F # writes(", final Acc. = ");
471: 460 0000F70F .data 1
472: 461 0000072c * L438:
473: 462 0000072c * 2C20202066696E616C2041636 .ascii ", final Acc. = \0"
474: 32E203D2000
475: 463 0000073e * .text
476: 464 0000F70F dd 8f0000072c pushl $L438
477: 465 0000F715 fe 08 effffffc30 callf $8,_writes
478: 466 0000F71C # write32h( post_evt_acc.m );
479: 467 0000F71C dd effffffc2a pushl _post_evt_acc
480: 468 0000F722 fe 08 effffffc23 callf $8,_write32h
481: 469 0000F729 # writec(' ');
482: 470 0000F729 dd 20 pushl $32
483: 471 0000F72B fe 08 effffffc1a callf $8,_writec
484: 472 0000F732 # write32h( post_evt_acc.l );
485: 473 0000F732 dd effffffc18 pushl _post_evt_acc+4
486: 474 0000F738 fe 08 effffffc0d callf $8,_write32h
487: 475 0000F73F # writes("\nop2 = ");
488: 476 0000F73F .data 1
489: 477 0000073e * L439:
490: 478 0000073e * 0A6F7032203D2000 .ascii "\12op2 = \0"
491: 479 00000746 * .text
492: 480 0000F73F dd 8f0000073e pushl $L439
493: 481 0000F745 fe 08 effffffc00 callf $8,_writes
494: 482 0000F74C # write32h( dbl_value_2.m );
495: 483 0000F74C dd effffffbfa pushl _dbl_value_2
496: 484 0000F752 fe 08 effffffbf3 callf $8,_write32h
497: 485 0000F759 # writes(" ");
498: 486 0000F759 .data 1
499: 487 00000746 * L440:
500: 488 00000746 * 2000 .ascii " \0"
501: 489 00000748 * .text
502: 490 0000F759 dd 8f00000746 pushl $L440
503: 491 0000F75F fe 08 effffffbe6 callf $8,_writes
504: 492 0000F766 # write32h( dbl_value_2.l );
505: 493 0000F766 dd effffffbe4 pushl _dbl_value_2+4
506: 494 0000F76C fe 08 effffffbd9 callf $8,_write32h
507: 495 0000F773 # writes(", final op5 = ");
508: 496 0000F773 .data 1
509: 497 00000748 * L441:
510: 498 00000748 * 2C2020202066696E616C206F7 .ascii ", final op5 = \0"
511: 035203D2000
512: 499 0000075a * .text
513: 500 0000F773 dd 8f00000748 pushl $L441
514: 501 0000F779 fe 08 effffffbcc callf $8,_writes
515: 502 0000F780 # write32h( sgl_value_10 );
516: 503 0000F780 dd effffffbc6 pushl _sgl_value_10
517: 504 0000F786 fe 08 effffffbbf callf $8,_write32h
518: 505 0000F78D # writec('\n');
519: 506 0000F78D dd 0a pushl $10
520: 507 0000F78F fe 08 effffffbb6 callf $8,_writec
521: 508 0000F796 # }
522: 509 0000F796 # if ( halt_flg ) /* halt on error? */
523: 510 0000F796 L434:
524: 511 0000F796 5d effffffbb0 tstl _halt_flg
525: 512 0000F79C 31 09 jeql L442
526: 513 0000F79E # pipe1_halt( 3 );
527: 514 0000F79E dd 03 pushl $3
528: 515 0000F7A0 fe 08 ef000000d1 callf $8,_pipe1_halt
529: 516 0000F7A7 # if ( loop_on_err )
530: 517 0000F7A7 L442:
531: 518 0000F7A7 5d effffffb9f tstl _loop_on_err
532: 519 0000F7AD 31 0d jeql L443
533: 520 0000F7AF # {
534: 521 0000F7AF # force_loop = TRUE; /* set the force loop flag */
535: 522 0000F7AF 0d 01 effffffb96 movl $1,_force_loop
536: 523 0000F7B6 # asm("jmp _pipe1_lp1"); /* and loop */
537: 524 0000F7B6 71 effffffc38 jmp _pipe1_lp1
538: 525 0000F7BC # };
539: 526 0000F7BC L443:
540: 527 0000F7BC # }
541: 528 0000F7BC 40 ret#2
542: 529 0000F7BD .set L430,0x0
543: 530 0000F7BD L432:
544: 531 0000F7BD 13 fefd jbr L433
545: 532 0000F7C0 .data
546: 533 0000065c * .text
547: 534 0000F7C0 .align 1
548: 535 0000F7C0 .globl _print_pipe1_err
549: 536 0000F7C0 _print_pipe1_err:
550: 537 0000F7C0 0000 .word L444
551: 538 0000F7C2 #
552: 539 0000F7C2 #
553: 540 0000F7C2 # /****************************************************************************
554: 541 0000F7C2 # * Print an error message of the form:
555: 542 0000F7C2 # *
556: 543 0000F7C2 # * Cycle: xx. EVT test xx. subtest xx. <your message here>. index = xx
557: 544 0000F7C2 # * inst = LDD op1, DIVD op2, MOVL op3,op4; CVDL op5 (alignment fault on the MOVL)
558: 545 0000F7C2 # ****************************************************************************/
559: 546 0000F7C2 # print_pipe1_err( msg )
560: 547 0000F7C2 # char *msg; /* pointer to error message */
561: 548 0000F7C2 # {
562: 549 0000F7C2 13 00b0 jbr L446
563: 550 0000F7C5 L447:
564: 551 0000F7C5 # if( errcnt == 1 ) /* 1st error? */
565: 552 0000F7C5 1d effffffb81 01 cmpl _errcnt,$1
566: 553 0000F7CC 21 0d jneq L448
567: 554 0000F7CE # writes(" \n"); /* start a new print line */
568: 555 0000F7CE .data 1
569: 556 0000075a * L449:
570: 557 0000075a * 200A00 .ascii " \12\0"
571: 558 0000075d * .text
572: 559 0000F7CE dd 8f0000075a pushl $L449
573: 560 0000F7D4 fe 08 effffffb71 callf $8,_writes
574: 561 0000F7DB # writes("Cycle: ");
575: 562 0000F7DB L448:
576: 563 0000F7DB .data 1
577: 564 0000075d * L450:
578: 565 0000075d * 4379636C653A2000 .ascii "Cycle: \0"
579: 566 00000765 * .text
580: 567 0000F7DB dd 8f0000075d pushl $L450
581: 568 0000F7E1 fe 08 effffffb64 callf $8,_writes
582: 569 0000F7E8 # writed( cycle );
583: 570 0000F7E8 dd effffffb5e pushl _cycle
584: 571 0000F7EE fe 08 effffffb57 callf $8,_writed
585: 572 0000F7F5 # writes(" EVT test ");
586: 573 0000F7F5 .data 1
587: 574 00000765 * L452:
588: 575 00000765 * 202045565420746573742000 .ascii " EVT test \0"
589: 576 00000771 * .text
590: 577 0000F7F5 dd 8f00000765 pushl $L452
591: 578 0000F7FB fe 08 effffffb4a callf $8,_writes
592: 579 0000F802 # writed( test_no );
593: 580 0000F802 dd effffffb44 pushl _test_no
594: 581 0000F808 fe 08 effffffb3d callf $8,_writed
595: 582 0000F80F # writes(". subtest ");
596: 583 0000F80F .data 1
597: 584 00000771 * L453:
598: 585 00000771 * 2E20737562746573742000 .ascii ". subtest \0"
599: 586 0000077c * .text
600: 587 0000F80F dd 8f00000771 pushl $L453
601: 588 0000F815 fe 08 effffffb30 callf $8,_writes
602: 589 0000F81C # writed( subtest );
603: 590 0000F81C dd effffffb2a pushl _subtest
604: 591 0000F822 fe 08 effffffb23 callf $8,_writed
605: 592 0000F829 # writes(". ");
606: 593 0000F829 .data 1
607: 594 0000077c * L454:
608: 595 0000077c * 2E2000 .ascii ". \0"
609: 596 0000077f * .text
610: 597 0000F829 dd 8f0000077c pushl $L454
611: 598 0000F82F fe 08 effffffb16 callf $8,_writes
612: 599 0000F836 # writes( msg ); /* write the message */
613: 600 0000F836 dd ad04 pushl 4(fp)
614: 601 0000F839 fe 08 effffffb0c callf $8,_writes
615: 602 0000F840 # writes(" index = ");
616: 603 0000F840 .data 1
617: 604 0000077f * L455:
618: 605 0000077f * 20696E646578203D2000 .ascii " index = \0"
619: 606 00000789 * .text
620: 607 0000F840 dd 8f0000077f pushl $L455
621: 608 0000F846 fe 08 effffffaff callf $8,_writes
622: 609 0000F84D # writed( index );
623: 610 0000F84D dd effffffaf9 pushl _index
624: 611 0000F853 fe 08 effffffaf2 callf $8,_writed
625: 612 0000F85A # writes( "\ninst = LDD op1, DIVD op2, MOVL op3,op4; CVDL op5 " );
626: 613 0000F85A .data 1
627: 614 00000789 * L456:
628: 615 00000789 * 0A696E7374203D204C4444206 .ascii "\12inst = LDD op1, DIVD op2, MOVL op3,op4; CVDL op5 \0"
629: F70312C2044495644206F7032
630: 2C204D4F564C206F70332C6F7
631: 0343B204356444C206F703520
632: 00
633: 616 000007bc * .text
634: 617 0000F85A dd 8f00000789 pushl $L456
635: 618 0000F860 fe 08 effffffae5 callf $8,_writes
636: 619 0000F867 # writes( "(alignment fault on the MOVL)\n" );
637: 620 0000F867 .data 1
638: 621 000007bc * L457:
639: 622 000007bc * 28616C69676E6D656E7420666 .ascii "(alignment fault on the MOVL)\12\0"
640: 1756C74206F6E20746865204D
641: 4F564C290A00
642: 623 000007db * .text
643: 624 0000F867 dd 8f000007bc pushl $L457
644: 625 0000F86D fe 08 effffffad8 callf $8,_writes
645: 626 0000F874 # }
646: 627 0000F874 40 ret#2
647: 628 0000F875 .set L444,0x0
648: 629 0000F875 L446:
649: 630 0000F875 13 ff4d jbr L447
650: 631 0000F878 .data
651: 632 0000065c * .text
652: 633 0000F878 .align 1
653: 634 0000F878 .globl _pipe1_halt
654: 635 0000F878 _pipe1_halt:
655: 636 0000F878 0000 .word L458
656: 637 0000F87A #
657: 638 0000F87A #
658: 639 0000F87A # /****************************************************************************
659: 640 0000F87A # * Error Halt Routine
660: 641 0000F87A # ****************************************************************************/
661: 642 0000F87A # pipe1_halt( code )
662: 643 0000F87A # int code; /* halt code to use */
663: 644 0000F87A # {
664: 645 0000F87A 13 0126 jbr L460
665: 646 0000F87D L461:
666: 647 0000F87D # err_code = code;
667: 648 0000F87D 0d ad04 effffffac7 movl 4(fp),_err_code
668: 649 0000F885 # sgl_value_1 = dbl_value_1.m;
669: 650 0000F885 0d effffffac1 effffffabc movl _dbl_value_1,_sgl_value_1
670: 651 0000F890 # sgl_value_2 = dbl_value_1.l;
671: 652 0000F890 0d effffffaba effffffab1 movl _dbl_value_1+4,_sgl_value_2
672: 653 0000F89B # sgl_value_3 = dbl_value_2.m;
673: 654 0000F89B 0d effffffaab effffffaa6 movl _dbl_value_2,_sgl_value_3
674: 655 0000F8A6 # sgl_value_4 = dbl_value_2.l;
675: 656 0000F8A6 0d effffffaa4 effffffa9b movl _dbl_value_2+4,_sgl_value_4
676: 657 0000F8B1 # asm("movl _test_no,r0"); /* r0 = test number */
677: 658 0000F8B1 0d effffffa95 50 movl _test_no,r0
678: 659 0000F8B8 # asm("movl _subtest,r1"); /* r1 = subtest number */
679: 660 0000F8B8 0d effffffa8e 51 movl _subtest,r1
680: 661 0000F8BF # asm("movl _err_code,r2"); /* r2 = error code */
681: 662 0000F8BF 0d effffffa87 52 movl _err_code,r2
682: 663 0000F8C6 # asm("movl _cycle,r3"); /* r3 = cycle count */
683: 664 0000F8C6 0d effffffa80 53 movl _cycle,r3
684: 665 0000F8CD # asm("movl _sgl_value_1,r4"); /* r4 = MSW of operand 1 */
685: 666 0000F8CD 0d effffffa79 54 movl _sgl_value_1,r4
686: 667 0000F8D4 # asm("movl _sgl_value_2,r5"); /* r5 = LSW of operand 1 */
687: 668 0000F8D4 0d effffffa72 55 movl _sgl_value_2,r5
688: 669 0000F8DB # asm("movl _sgl_value_3,r6"); /* r6 = MSW of operand 2 */
689: 670 0000F8DB 0d effffffa6b 56 movl _sgl_value_3,r6
690: 671 0000F8E2 # asm("movl _sgl_value_4,r7"); /* r7 = LSW of operand 2 */
691: 672 0000F8E2 0d effffffa64 57 movl _sgl_value_4,r7
692: 673 0000F8E9 # if( code == 1 ) {
693: 674 0000F8E9 1d ad04 01 cmpl 4(fp),$1
694: 675 0000F8ED 21 18 jneq L462
695: 676 0000F8EF # asm("movab _sgl_dummy1+1,r8"); /* r8 = 1st movl op addr. */
696: 677 0000F8EF e9 effffffa58 58 movab _sgl_dummy1+1,r8
697: 678 0000F8F6 # asm("movab _sgl_dummy2+2,r9"); /* r9 = 2nd movl op addr. */
698: 679 0000F8F6 e9 effffffa52 59 movab _sgl_dummy2+2,r9
699: 680 0000F8FD # asm("movl _index,r10"); /* r10 = data index */
700: 681 0000F8FD 0d effffffa49 5a movl _index,r10
701: 682 0000F904 # }
702: 683 0000F904 # else if( code == 2 ) {
703: 684 0000F904 13 009a jbr L463
704: 685 0000F907 L462:
705: 686 0000F907 1d ad04 02 cmpl 4(fp),$2
706: 687 0000F90B 21 51 jneq L464
707: 688 0000F90D # sgl_value_5 = post_evt_acc.m;
708: 689 0000F90D 0d effffffa39 effffffa34 movl _post_evt_acc,_sgl_value_5
709: 690 0000F918 # sgl_value_6 = post_evt_acc.l;
710: 691 0000F918 0d effffffa32 effffffa29 movl _post_evt_acc+4,_sgl_value_6
711: 692 0000F923 # sgl_value_7 = dbl_expected.m;
712: 693 0000F923 0d effffffa23 effffffa1e movl _dbl_expected,_sgl_value_7
713: 694 0000F92E # sgl_value_8 = dbl_expected.l;
714: 695 0000F92E 0d effffffa1c effffffa13 movl _dbl_expected+4,_sgl_value_8
715: 696 0000F939 # asm("movl _sgl_value_5,r8"); /* r8 = MSW of final acc. */
716: 697 0000F939 0d effffffa0d 58 movl _sgl_value_5,r8
717: 698 0000F940 # asm("movl _sgl_value_6,r9"); /* r9 = LSW of final acc. */
718: 699 0000F940 0d effffffa06 59 movl _sgl_value_6,r9
719: 700 0000F947 # asm("movl _sgl_value_7,r10"); /* r10 = MSW of expected */
720: 701 0000F947 0d effffff9ff 5a movl _sgl_value_7,r10
721: 702 0000F94E # asm("movl _sgl_value_8,r11"); /* r11 = LSW of expected */
722: 703 0000F94E 0d effffff9f8 5b movl _sgl_value_8,r11
723: 704 0000F955 # asm("movl _index,r12"); /* r12 = data index */
724: 705 0000F955 0d effffff9f1 5c movl _index,r12
725: 706 0000F95C # }
726: 707 0000F95C # else if( code == 3 ) {
727: 708 0000F95C 11 43 jbr L465
728: 709 0000F95E L464:
729: 710 0000F95E 1d ad04 03 cmpl 4(fp),$3
730: 711 0000F962 21 3d jneq L466
731: 712 0000F964 # sgl_value_5 = post_evt_acc.m;
732: 713 0000F964 0d effffff9e2 effffff9dd movl _post_evt_acc,_sgl_value_5
733: 714 0000F96F # sgl_value_6 = post_evt_acc.l;
734: 715 0000F96F 0d effffff9db effffff9d2 movl _post_evt_acc+4,_sgl_value_6
735: 716 0000F97A # sgl_value_7 = sgl_value_10;
736: 717 0000F97A 0d effffff9cc effffff9c7 movl _sgl_value_10,_sgl_value_7
737: 718 0000F985 # asm("movl _sgl_value_5,r8"); /* r8 = MSW of final acc. */
738: 719 0000F985 0d effffff9c1 58 movl _sgl_value_5,r8
739: 720 0000F98C # asm("movl _sgl_value_6,r9"); /* r9 = LSW of final acc. */
740: 721 0000F98C 0d effffff9ba 59 movl _sgl_value_6,r9
741: 722 0000F993 # asm("movl _sgl_value_7,r10"); /* r10 = integer stored */
742: 723 0000F993 0d effffff9b3 5a movl _sgl_value_7,r10
743: 724 0000F99A # asm("movl _index,r11"); /* r11 = data index */
744: 725 0000F99A 0d effffff9ac 5b movl _index,r11
745: 726 0000F9A1 # };
746: 727 0000F9A1 L466:
747: 728 0000F9A1 L465:
748: 729 0000F9A1 L463:
749: 730 0000F9A1 # asm("halt");; /* HALT ... */
750: 731 0000F9A1 00 halt
751: 732 0000F9A2 # };
752: 733 0000F9A2 40 ret#2
753: 734 0000F9A3 .set L458,0x0
754: 735 0000F9A3 L460:
755: 736 0000F9A3 13 fed7 jbr L461
756: 737 0000F9A6 .data
757: 738 0000065c * #
758: 738 0000065c * #
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.