Annotation of cci/d/fpevent/pipe12.c, revision 1.1.1.1

1.1       root        1: 
                      2: 
                      3: #include "evt_defs.h"
                      4: 
                      5: /*
                      6:  *********************************************************************
                      7:  *     FPP PIPELINED EVENTS TEST #12
                      8:  *
                      9:  *  This test will execute the following code: "LDD CVDF LDD"
                     10:  * with an overflow fault on the CVDF. We will make sure that:
                     11:  * 1. The fault is detected, and
                     12:  * 2. the 2nd load instruction is not executed.
                     13:  *********************************************************************
                     14: */
                     15: pipe12()
                     16: {
                     17:        asm("moval (r13),_pre_event_fp");       /* save the frame pointer */
                     18:        asm("moval (r14),_pre_event_sp");       /* save the stack pointer */
                     19:        precision = DBL;
                     20:        test_event = ARITH_CODE;                /* expect an arithmetic fault */
                     21:        exp_code = FLT_OVFL_CODE;               /*  - specificly underflow    */
                     22:        exp_event = FALSE;                      /* ... but not yet            */
                     23:        asm("movab _pipe12_ret,_event_return"); /* set event return address  */
                     24:        max_index = cvdf_ov_cnt;                /* set max operand index      */
                     25:        for( index = 0; index < max_index; index++ )
                     26:        {
                     27:             dbl_ld_acc = cvdf_ov_dat[index].op_1;      /* get the Acc data  */
                     28:             dbl_value_1.m = 0x12345678;                /* dummy load data   */
                     29:             dbl_value_1.l = 0xfedcba98;
                     30:             asm(".globl _pipe12_lp1");
                     31:             asm("_pipe12_lp1:");
                     32:             asm("bispsw $0x60");                       /* enable ovfl&undfl */
                     33:             asm("ldd _dbl_ld_acc");                    /* load the Acc.     */
                     34:             exp_event = test_event;                    /* expect event soon */
                     35:             asm("cvdf");                               /* trigger the event */
                     36:             asm("ldd _dbl_value_1");           /* we shouldn't get to here  */
                     37: /*
                     38:  * If we got to here then there was no event
                     39: */
                     40:             if( force_loop )
                     41:                  asm("brw _pipe12_lp1");;      /* loop on the error         */
                     42:             exp_event = FALSE;                 /* reset event expected flag */
                     43:             asm("bicpsw $0x60");               /* disable ovfl & undfl evts */
                     44:             asm("movl _pre_event_fp,fp");      /* restore the frame pointer */
                     45:             asm("movl _pre_event_sp,sp");      /* restore the stack pointer */
                     46:             no_pipe12_evt();;                  /* report the error          */
                     47: /*
                     48:  * Come here after the event
                     49: */
                     50:             asm(".globl _pipe12_ret");
                     51:             asm("_pipe12_ret:");
                     52:             asm("movl _pre_event_fp,fp");      /* restore the frame pointer */
                     53:             asm("movl _pre_event_sp,sp");      /* restore the stack pointer */
                     54:             if( force_loop )
                     55:                  asm("brw _pipe12_lp1");;      /* loop on the error         */
                     56:             asm("bicpsw $0x60");               /* disable ovfl & undfl evts */
                     57:             if( (post_evt_acc.m == dbl_value_1.m) &&   /* was the 2nd 'LDD' */
                     58:                 (post_evt_acc.l == dbl_value_1.l) )    /*    executed?      */
                     59:                  pipe12_queue_er();            /* queue not cleared error   */
                     60:             else if( post_evt_acc.m )          /* was the Acc. cleared?     */
                     61:                  bad_pipe12_result();          /* incorrect result error    */
                     62:             
                     63:        }
                     64: }
                     65: 
                     66: 
                     67: 
                     68: /****************************************************************************
                     69: *              Report an "EVENT NOT DETECTED" error
                     70: *
                     71: * Cycle: xx. EVT test xx. subtest xx. No overflow fault seen. index = xx
                     72: * inst = LDD op1, CVDF, LDD op2    (overflow fault on the CVDF)
                     73: * op1 = xxxxxxxx xxxxxxxx
                     74: ****************************************************************************/
                     75: no_pipe12_evt()
                     76: {
                     77:        errcnt++;                               /* bump the error count    */
                     78:        if ( prt_error ) 
                     79:        {
                     80:             print_pipe12_er( ". No overflow fault seen." );
                     81:             writes("op1 = ");
                     82:             write32h( dbl_ld_acc.m );
                     83:             writec(' ');
                     84:             write32h( dbl_ld_acc.l );
                     85:             writec('\n');
                     86:        }
                     87:        if ( halt_flg )                         /* halt on error?          */
                     88:             pipe12_halt( 1 );                  /* halt with a code of 1   */
                     89:        if ( loop_on_err ) 
                     90:        {
                     91:             force_loop = TRUE;                 /* set the force loop flag */
                     92:             asm("jmp _pipe12_lp1");            /* and loop                */
                     93:        };
                     94: }
                     95: 
                     96: 
                     97: 
                     98: 
                     99: /****************************************************************************
                    100: *              Report an "BAD ACCUMULATOR AFTER THE EVENT" error
                    101: *
                    102: * Cycle: xx. EVT test xx. subtest xx. Bad final Accumulator. index = xx
                    103: * inst = LDD op1, CVDF, LDD op2    (overflow fault on the CVDF)
                    104: * The 2nd LOAD DOUBLE instruction should not be executed.
                    105: * op1 = xxxxxxxx xxxxxxxx, final Acc. = xxxxxxxx
                    106: * op2 = xxxxxxxx xxxxxxxx,   expected = xxxxxxxx 
                    107: ****************************************************************************/
                    108: bad_pipe12_result()
                    109: {
                    110:        errcnt++;                               /* bump the error count    */
                    111:        if ( prt_error ) 
                    112:        {
                    113:             print_pipe12_er( ". Bad final Accumulator" );
                    114:             writes(
                    115:              "The 2nd LOAD DOUBLE INSTRUCTION should not be executed\n");
                    116:             writes("op1 = ");
                    117:             write32h( dbl_ld_acc.m );
                    118:             writec(' ');
                    119:             write32h( dbl_ld_acc.l );
                    120:             writes(", final Acc. = ");
                    121:             write32h( post_evt_acc.m );
                    122:             writes("op2 = ");
                    123:             write32h( dbl_value_1.m );
                    124:             writec(' ');
                    125:             write32h( dbl_value_1.l );
                    126:             writes(",   expected = ");
                    127:             write32h( 0 );             /* expected = floating '0.0' */
                    128:             writec('\n');
                    129:        }
                    130:        if ( halt_flg )                         /* halt on error?           */
                    131:             pipe12_halt( 2 );                  /* halt with a code of 2    */
                    132:        if ( loop_on_err ) 
                    133:        {
                    134:             force_loop = TRUE;         /* set the force loop flag */
                    135:             asm("jmp _pipe12_lp1");    /* and loop                */
                    136:        };
                    137: }
                    138: 
                    139: 
                    140: 
                    141: 
                    142: 
                    143: /****************************************************************************
                    144: *              Report an "FPP queue not cleared" message
                    145: *
                    146: * Cycle: xx. EVT test xx. subtest xx. Fpp queue not cleared. index = xx
                    147: * inst = LDD op1, CVDF, LDD op2    (overflow fault on the CVDF)
                    148: * The 2nd load double instruction was apparently executed.
                    149: * op1 = xxxxxxxx xxxxxxxx, final Acc. = xxxxxxxx xxxxxxxx
                    150: * op2 = xxxxxxxx xxxxxxxx,   expected = xxxxxxxx xxxxxxxx
                    151: ****************************************************************************/
                    152: pipe12_queue_er()
                    153: {
                    154:        errcnt++;                               /* bump the error count    */
                    155:        if ( prt_error ) 
                    156:        {
                    157:             print_pipe12_er( ". Fpp queue not cleared" );
                    158:             writes(
                    159:              "The 2nd load double instruction was apparently executed.\n");
                    160:             writes("op1 = ");
                    161:             write32h( dbl_ld_acc.m );
                    162:             writec(' ');
                    163:             write32h( dbl_ld_acc.l );
                    164:             writes(", final Acc. = ");
                    165:             write32h( post_evt_acc.m );
                    166:             writec(' ');
                    167:             write32h( post_evt_acc.l );
                    168:             writes("\nop2 = ");
                    169:             write32h( dbl_value_1.m );
                    170:             writec(' ');
                    171:             write32h( dbl_value_1.l );
                    172:             writes(",   expected = ");
                    173:             write32h( 0x );                    /* expected = floating '0' */
                    174:             writec(' ');
                    175:             write32h( 0 );
                    176:             writec('\n');
                    177:        }
                    178:        if ( halt_flg )                         /* halt on error?           */
                    179:             pipe12_halt( 3 );                  /* halt with a code of 3    */
                    180:        if ( loop_on_err ) 
                    181:        {
                    182:             force_loop = TRUE;         /* set the force loop flag */
                    183:             asm("jmp _pipe12_lp1");    /* and loop                */
                    184:        };
                    185: }
                    186: 
                    187: 
                    188: 
                    189: 
                    190: /****************************************************************************
                    191: *              Report an error message of the form:
                    192: *
                    193: * Cycle: xx. EVT test xx. subtest xx. <your message here> index = xx
                    194: * inst = LDD op1, CVDF, LDD op2    (overflow fault on the CVDF)
                    195: ****************************************************************************/
                    196: print_pipe12_er( msg )
                    197: char *msg;                                     /* error message to print   */
                    198: {
                    199:             if( errcnt == 1 )                  /* 1st error?               */
                    200:                  writes(" \n");                /* start a new print line   */
                    201:             writes("Cycle: ");
                    202:             writed( cycle );
                    203:             writes("  EVT test ");
                    204:             writed( test_no );
                    205:             writes(". subtest ");
                    206:             writed( subtest );
                    207:             writes( msg );                     /* print the message */
                    208:             writes(" index = ");
                    209:             writed( index );
                    210:             writes(
                    211:           "\ninst = LDD op1, CVDF, LDD op2    (overflow fault on the CVDF)\n");
                    212: }
                    213: 
                    214: 
                    215: 
                    216: /****************************************************************************
                    217: *              halt on error routine
                    218: ****************************************************************************/
                    219: pipe12_halt( code )
                    220: int code;                              /* error code to halt with */
                    221: {
                    222:        err_code = code;
                    223:        sgl_value_1 = dbl_ld_acc.m;
                    224:        sgl_value_2 = dbl_ld_acc.l;
                    225:        sgl_value_3 = dbl_value_1.m;
                    226:        sgl_value_4 = dbl_value_1.l;
                    227:        sgl_value_5 = post_evt_acc.m;
                    228:        sgl_value_6 = post_evt_acc.l;
                    229:        asm("movl _test_no,r0");                /* r0  = test number       */
                    230:        asm("movl _subtest,r1");                /* r1  = subtest number    */
                    231:        asm("movl _err_code,r2");               /* r2  = error code        */
                    232:        asm("movl _cycle,r3");                  /* r3  = cycle count       */
                    233:        asm("movl _sgl_value_1,r4");            /* r4  = MSW of 1st load.  */
                    234:        asm("movl _sgl_value_2,r5");            /* r5  = LSW of 1st load.  */
                    235:        asm("movl _sgl_value_3,r6");            /* r6  = MSW of 2nd load.  */
                    236:        asm("movl _sgl_value_4,r7");            /* r7  = LSW of 2nd load.  */
                    237:        asm("movl _sgl_value_5,r8");            /* r8  = MSW of final Acc. */
                    238:        asm("movl _sgl_value_6,r9");            /* r9  = LSW of final Acc. */
                    239:        asm("clrl r10");                        /* r10 = expected ( '0' )  */
                    240:        asm("movl _index,r11");                 /* r11 = data index        */
                    241:        asm("halt");                            /* HALT ...                */
                    242: }

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