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Power 6/32 Unix version 1.21

#include "evt_defs.h"

/*
 *********************************************************************
 *	FPP PIPELINED EVENTS TEST #14
 *
 *  This test will execute the following code: "LDD DIVD MULL3 NEGD"
 * with an integer overflow fault on the MULL3. We will make sure that:
 * 1. The fault is detected, and
 * 2. the NEGD instruction is not executed.
 *
 * NOTE: This instruction uses the same data as pipe1
 *********************************************************************
*/
pipe14()
{
	asm("moval (r13),_pre_event_fp");	/* save the frame pointer */
	asm("moval (r14),_pre_event_sp");	/* save the stack pointer */
	precision  = DBL;
	test_event = ARITH_CODE;		/* expect an arithmetic fault */
	exp_code   = INT_OVFL_CODE;		/*  - specificly underflow    */
	exp_event  = FALSE;			/* ... but not yet            */
	asm("movab _pipe14_ret,_event_return"); /* set event return address  */
	for( index = 0; index < max_pipe1_index; index++ )
	{
	     dbl_ld_acc   = pipe1_data[index].op_1;	/* get operand 1     */
	     dbl_value_1  = pipe1_data[index].op_2;	/* get operand 2     */
	     dbl_expected = pipe1_data[index].exp;	/* get expected Acc. */
	     asm("bispsw $0x60");			/* enable ovfl,undfl */
	     asm(".globl _pipe14_lp1");
	     asm("_pipe14_lp1:");
	     asm("movl $0x40404040,r0");		/* get the 'mull3'   */
	     asm("movl $0x55005500,r2");		/*    data patterns  */
	     asm("ldd _dbl_ld_acc");			/* load the Acc.     */
	     exp_event = test_event;			/* expect event soon */
	     asm("divd _dbl_value_1");			/* do the divide     */
	     asm("mull3 r0,r2,_dbl_value_3");		/* trigger the fault */
	     asm("nop");				/* shouldn't get here*/
	     asm("negd");				/* shouldn't get here*/
/*
 * If we got to here then there was no event
*/
	     if( force_loop )
		  asm("brw _pipe14_lp1");;	/* loop on the error         */
	     exp_event = FALSE;			/* reset event expected flag */
	     asm("movl _pre_event_fp,fp");	/* restore the frame pointer */
	     asm("movl _pre_event_sp,sp");	/* restore the stack pointer */
	     asm("bicpsw $0x60");		/* disable ovfl & undfl evts */
	     no_pipe14_evt();;			/* report the error          */
/*
 * Come here after the event
*/
	     asm(".globl _pipe14_ret");
	     asm("_pipe14_ret:");
	     asm("movl _pre_event_fp,fp");	/* restore the frame pointer */
	     asm("movl _pre_event_sp,sp");	/* restore the stack pointer */
	     if( force_loop )
		  asm("brw _pipe14_lp1");;	/* loop on the error         */
	     asm("bicpsw $0x60");		/* disable ovfl & undfl evts */
	     if( (post_evt_acc.m == (dbl_expected.m ^ 0x80000000)) &&
	         (post_evt_acc.l ==  dbl_expected.l) )  /* was Acc. negated? */
		  pipe14_queue_er();		/* queue not cleared error   */
	     else if( (post_evt_acc.m != dbl_expected.m) ||
	              (post_evt_acc.l != dbl_expected.l) )  /* Acc. = exp.?  */
		  bad_pipe14_result();		/* incorrect result error    */
	     
	}
}



/****************************************************************************
*		Report an "EVENT NOT DETECTED" error
*
* Cycle: xx. EVT test xx. subtest xx. No overflow fault seen. index = xx
* inst = LDD op1; DIVD op2; MULL3,op3,op4,op5; NEGD (integer overflow on MULL3)
* op1 = xxxxxxxx xxxxxxxx,   op3 = xxxxxxxx
* op2 = xxxxxxxx xxxxxxxx,   op4 = xxxxxxxx
****************************************************************************/
no_pipe14_evt()
{
	errcnt++;				/* bump the error count    */
	if ( prt_error ) 
	{
	     print_pipe14_er( ". No overflow fault seen." );
	     writes("op1 = ");
	     write32h( dbl_ld_acc.m );
	     writec(' ');
	     write32h( dbl_ld_acc.l );
	     writes(",   op3 = ");
	     write32h( 0x40404040 );
	     writes("\nop2 = ");
	     write32h( dbl_value_1.m );
	     writec(' ');
	     write32h( dbl_value_1.l );
	     writes(",   op4 = ");
	     write32h( 0x55005500 );
	     writec('\n');
	}
	if ( halt_flg ) 			/* halt on error?          */
	     pipe14_halt( 1 );			/* halt with a code of 1   */
	if ( loop_on_err ) 
	{
	     force_loop = TRUE;			/* set the force loop flag */
	     asm("jmp _pipe14_lp1");		/* and loop                */
	};
}




/****************************************************************************
*		Report an "BAD ACCUMULATOR AFTER THE EVENT" error
*
* Cycle: xx. EVT test xx. subtest xx. Bad final Accumulator. indexd = xx
* inst = LDD op1; DIVD op2; MULL3,op3,op4,op5; NEGD (integer overflow on MULL3)
* The NEGD instruction should not be executed.
* op1 = xxxxxxxx xxxxxxxx,  final Acc. = xxxxxxxx xxxxxxxx,  op3 = xxxxxxxx
* op2 = xxxxxxxx xxxxxxxx,    expected = xxxxxxxx xxxxxxxx,  op4 = xxxxxxxx
****************************************************************************/
bad_pipe14_result()
{
	errcnt++;				/* bump the error count    */
	if ( prt_error ) 
	{
	     print_pipe14_er( ". Bad final Accumulator" );
	     writes(
	      "The NEGD INSTRUCTION should not be executed\n");
	     writes("op1 = ");
	     write32h( dbl_ld_acc.m );
	     writec(' ');
	     write32h( dbl_ld_acc.l );
	     writes(",  final Acc. = ");
	     write32h( post_evt_acc.m );
	     writec(' ');
	     write32h( post_evt_acc.l );
	     writes(",  op3 = ");
	     write32h( 0x40404040 );
	     writes("\nop2 = ");
	     write32h( dbl_value_1.m );
	     writec(' ');
	     write32h( dbl_value_1.l );
	     writes(",    expected = ");
	     write32h( dbl_expected.m );
	     writec(' ');
	     write32h( dbl_expected.l );
	     writes(",  op4 = ");
	     write32h( 0x55005500 );
	     writec('\n');
	}
	if ( halt_flg ) 			/* halt on error?           */
	     pipe14_halt( 2 );			/* halt with a code of 2    */
	if ( loop_on_err ) 
	{
	     force_loop = TRUE;		/* set the force loop flag */
	     asm("jmp _pipe14_lp1");	/* and loop                */
	};
}





/****************************************************************************
*		Report an "FPP queue not cleared" message
*
* Cycle: xx. EVT test xx. subtest xx. Fpp queue not cleared. index = xx
* inst = LDD op1; DIVD op2; MULL3,op3,op4,op5; NEGD (integer overflow on MULL3)
* The NEGD instruction was apparently executed.
* op1 = xxxxxxxx xxxxxxxx, final Acc. = xxxxxxxx xxxxxxxx,  op3 = xxxxxxxx
* op2 = xxxxxxxx xxxxxxxx,   expected = xxxxxxxx xxxxxxxx,  op4 = xxxxxxxx
****************************************************************************/
pipe14_queue_er()
{
	errcnt++;				/* bump the error count    */
	if ( prt_error ) 
	{
	     print_pipe14_er( ". Fpp queue not cleared" );
	     writes(
	      "The 2nd load double instruction was apparently executed.\n");
	     writes("op1 = ");
	     write32h( dbl_ld_acc.m );
	     writec(' ');
	     write32h( dbl_ld_acc.l );
	     writes(",  final Acc. = ");
	     write32h( post_evt_acc.m );
	     writec(' ');
	     write32h( post_evt_acc.l );
	     writes(",  op3 = ");
	     write32h( 0x40404040 );
	     writes("\nop2 = ");
	     write32h( dbl_value_1.m );
	     writec(' ');
	     write32h( dbl_value_1.l );
	     writes(",    expected = ");
	     write32h( dbl_expected.m );
	     writec(' ');
	     write32h( dbl_expected.l );
	     writes(",  op4 = ");
	     write32h( 0x55005500 );
	     writec('\n');
	}
	if ( halt_flg ) 			/* halt on error?           */
	     pipe14_halt( 3 );			/* halt with a code of 3    */
	if ( loop_on_err ) 
	{
	     force_loop = TRUE;		/* set the force loop flag */
	     asm("jmp _pipe14_lp1");	/* and loop                */
	};
}




/****************************************************************************
*		Report an error message of the form:
*
* Cycle: xx. EVT test xx. subtest xx. <your message here> index = xx
* inst = LDD op1; DIVD op2; MULL3,op3,op4,op5; NEGD (integer overflow on MULL3)
****************************************************************************/
print_pipe14_er( msg )
char *msg;					/* error message to print   */
{
	     if( errcnt == 1 )			/* 1st error?               */
		  writes("\n\n");		/* start a new print line   */
	     writes("Cycle: ");
	     writed( cycle );
	     writes("  EVT test ");
	     writed( test_no );
	     writes(". subtest ");
	     writed( subtest );
	     writes( msg );			/* print the message */
	     writes(" index = ");
	     writed( index );
	     writes("\ninst = LDD op1; DIVD op2; MULL3,op3,op4,op5; NEGD"); 
	     writes(" (integer overflow on MULL3)\n");
}



/****************************************************************************
*		halt on error routine
****************************************************************************/
pipe14_halt( code )
int code;				/* error code to halt with */
{
	err_code = code;
	sgl_value_1 = dbl_ld_acc.m;
	sgl_value_2 = dbl_ld_acc.l;
	sgl_value_3 = dbl_value_1.m;
	sgl_value_4 = dbl_value_1.l;
	sgl_value_5 = post_evt_acc.m;
	sgl_value_6 = post_evt_acc.l;
	sgl_value_7 = dbl_expected.m;
	sgl_value_8 = dbl_expected.l;
	asm("movl _test_no,r0");		/* r0  = test number       */
	asm("movl _subtest,r1");		/* r1  = subtest number    */
	asm("movl _err_code,r2");		/* r2  = error code        */
	asm("movl _cycle,r3");			/* r3  = cycle count       */
	asm("movl _sgl_value_1,r4");		/* r4  = MSW of 1st load.  */
	asm("movl _sgl_value_2,r5");		/* r5  = LSW of 1st load.  */
	asm("movl _sgl_value_3,r6");		/* r6  = MSW of 2nd load.  */
	asm("movl _sgl_value_4,r7");		/* r7  = LSW of 2nd load.  */
	asm("movl _sgl_value_5,r8");		/* r8  = MSW of final Acc. */
	asm("movl _sgl_value_6,r9");		/* r9  = LSW of final Acc. */
	asm("movl _sgl_value_7,r10");		/* r10 = MSW of exp. Acc.  */
	asm("movl _sgl_value_8,r11");		/* r11 = LSW of exp. Acc.  */
	asm("movl _index,r12");			/* r12 = data index        */
	asm("halt");				/* HALT ...                */
}

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