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1.1 ! root 1: ! 2: #include "evt_defs.h" ! 3: ! 4: /* ! 5: ********************************************************************* ! 6: * FPP PIPELINED EVENTS TEST #17 ! 7: * ! 8: * This test will execute a large number of ADDF instructions with ! 9: * clock events active. It will ensure that: ! 10: * 1. A clock event occurrs during the ADDF sequence, and ! 11: * 2. the result of the add sequence is correct. ! 12: * ! 13: * At each clock interrupt the ADDF's should be stopped and the queue ! 14: * cleared. If the queue isn't cleared then we'll get too many ADDF ! 15: * operations run and end up with the wrong result. ! 16: * The ADDFs will be run with cache misses and with cache hits. ! 17: * There is a finite chance that the clock event will occur after we ! 18: * have reset the RTC_OCCURRED flag but before the ADDFs have started ! 19: * or that it will have occurred after the ADDFs were done but before ! 20: * we check the flag again. With 128 ADDFs the chance is small but to ! 21: * be sure, we'll do it all twice. What the hell. ! 22: * This routine uses the special clock event handler found in the ! 23: * test initializer. ! 24: ********************************************************************* ! 25: */ ! 26: pipe17() ! 27: { ! 28: precision = SGL; ! 29: exp_event = FALSE; /* don't expect fpp events */ ! 30: sgl_value_1 = 0x40800000; /* add floating +1.0's */ ! 31: sgl_expected = 0x44000000; /* expect a floating +128 */ ! 32: i_cache_hit = FALSE; /* run with cache misses */ ! 33: test_clock_add(); /* test w/ positive Acc. */ ! 34: test_clock_add(); /* ...run the test twice */ ! 35: i_cache_hit = TRUE; /* and run with cache hits */ ! 36: test_clock_add(); /* for 2 more times */ ! 37: test_clock_add(); ! 38: sgl_value_1 = 0xc0800000; /* add floating -1.0's */ ! 39: sgl_expected = 0xc4000000; /* expect a floating -128 */ ! 40: i_cache_hit = FALSE; /* run with cache misses */ ! 41: test_clock_add(); /* test w/ negative Acc. */ ! 42: test_clock_add(); /* ...run the test twice */ ! 43: i_cache_hit = TRUE; /* and run with cache hits */ ! 44: test_clock_add(); /* for 2 more times */ ! 45: test_clock_add(); ! 46: } ! 47: ! 48: ! 49: ! 50: /**************************************************************************** ! 51: * ! 52: * Verify that the results of 128 ADDFs is correct. ! 53: * ! 54: ****************************************************************************/ ! 55: test_clock_add() ! 56: { ! 57: asm(".globl test_clock_lp"); /* loop from here on errors */ ! 58: asm("test_clock_lp:"); ! 59: clock_add(); /* do 128 addf's */ ! 60: if( !rtc_occurred ) ! 61: who_pulled_the_plug(); /* something is wrong here */ ! 62: else { /* we got a clock event!! */ ! 63: asm("stf _sgl_st_acc"); /* store the Accumlator */ ! 64: if( sgl_st_acc != sgl_expected ) ! 65: { ! 66: errcnt++; /* bump the error count */ ! 67: if( prt_error ) ! 68: print_clock_er(); /* print the error message */ ! 69: if( halt_flg ) ! 70: pipe17_halt( 1 ); /* halt with a code of 1 */ ! 71: if( loop_on_err ) { ! 72: force_loop = TRUE; /* loop on the error */ ! 73: asm("jmp test_clock_lp"); ! 74: } ! 75: } /* end of store error */ ! 76: } /* end of clock event found */ ! 77: } ! 78: ! 79: ! 80: ! 81: ! 82: ! 83: ! 84: /**************************************************************************** ! 85: * ! 86: * DO 128 SINGLE PRECISION ADDs ! 87: * ! 88: * Run a series of 128 ADDF instructions with the clock enabled. Run the ! 89: * series untill there was a clock event during the series or we run out ! 90: * of patience. -It takes a while to run out of patience!! ! 91: * If we are running with instruction cache misses then bump the Code Cache ! 92: * Key each time through. ! 93: * ! 94: ****************************************************************************/ ! 95: clock_add() ! 96: { ! 97: clock_retrys = 1000000; /* allow 1 million retrys */ ! 98: asm(".globl clock_add_lp"); /* loop from here till RTC */ ! 99: asm("clock_add_lp:"); ! 100: if( !i_cache_hit ) { ! 101: if( ++Codek >= 255 ) { /* get next key, key = max? */ ! 102: Codek = 1; /* reset the cache key */ ! 103: asm("mtpr $1,$23"); /* and purge the cache */ ! 104: }; ! 105: asm("mtpr _Codek,$13"); /* Set the new cache key */ ! 106: }; ! 107: asm("clrl r0"); /* get a floating '0.0' */ ! 108: asm("ldf r0"); /* clear the accumulator */ ! 109: asm("bispsw $0x60"); /* enable ovfl, undfl evts */ ! 110: asm("mtpr $1,$8"); /* lower IPL -enable clock */ ! 111: asm("nop"); ! 112: asm("movl _sgl_value_1,r6"); /* get the operand */ ! 113: asm("clrl _rtc_occurred"); /* clear clock event flag */ ! 114: ! 115: /* ! 116: * Now do 128 ADDF instructions ! 117: */ ! 118: asm("addf r6"); /* ADDF #001 */ ! 119: asm("addf r6"); /* ADDF #002 */ ! 120: asm("addf r6"); /* ADDF #003 */ ! 121: asm("addf r6"); /* ADDF #004 */ ! 122: asm("addf r6"); /* ADDF #005 */ ! 123: asm("addf r6"); /* ADDF #006 */ ! 124: asm("addf r6"); /* ADDF #007 */ ! 125: asm("addf r6"); /* ADDF #008 */ ! 126: asm("addf r6"); /* ADDF #009 */ ! 127: asm("addf r6"); /* ADDF #010 */ ! 128: asm("addf r6"); /* ADDF #011 */ ! 129: asm("addf r6"); /* ADDF #012 */ ! 130: asm("addf r6"); /* ADDF #013 */ ! 131: asm("addf r6"); /* ADDF #014 */ ! 132: asm("addf r6"); /* ADDF #015 */ ! 133: asm("addf r6"); /* ADDF #016 */ ! 134: asm("addf r6"); /* ADDF #017 */ ! 135: asm("addf r6"); /* ADDF #018 */ ! 136: asm("addf r6"); /* ADDF #019 */ ! 137: asm("addf r6"); /* ADDF #020 */ ! 138: asm("addf r6"); /* ADDF #021 */ ! 139: asm("addf r6"); /* ADDF #022 */ ! 140: asm("addf r6"); /* ADDF #023 */ ! 141: asm("addf r6"); /* ADDF #024 */ ! 142: asm("addf r6"); /* ADDF #025 */ ! 143: asm("addf r6"); /* ADDF #026 */ ! 144: asm("addf r6"); /* ADDF #027 */ ! 145: asm("addf r6"); /* ADDF #028 */ ! 146: asm("addf r6"); /* ADDF #029 */ ! 147: asm("addf r6"); /* ADDF #030 */ ! 148: asm("addf r6"); /* ADDF #031 */ ! 149: asm("addf r6"); /* ADDF #032 */ ! 150: asm("addf r6"); /* ADDF #033 */ ! 151: asm("addf r6"); /* ADDF #034 */ ! 152: asm("addf r6"); /* ADDF #035 */ ! 153: asm("addf r6"); /* ADDF #036 */ ! 154: asm("addf r6"); /* ADDF #037 */ ! 155: asm("addf r6"); /* ADDF #038 */ ! 156: asm("addf r6"); /* ADDF #039 */ ! 157: asm("addf r6"); /* ADDF #040 */ ! 158: asm("addf r6"); /* ADDF #041 */ ! 159: asm("addf r6"); /* ADDF #042 */ ! 160: asm("addf r6"); /* ADDF #043 */ ! 161: asm("addf r6"); /* ADDF #044 */ ! 162: asm("addf r6"); /* ADDF #045 */ ! 163: asm("addf r6"); /* ADDF #046 */ ! 164: asm("addf r6"); /* ADDF #047 */ ! 165: asm("addf r6"); /* ADDF #048 */ ! 166: asm("addf r6"); /* ADDF #049 */ ! 167: asm("addf r6"); /* ADDF #050 */ ! 168: asm("addf r6"); /* ADDF #051 */ ! 169: asm("addf r6"); /* ADDF #052 */ ! 170: asm("addf r6"); /* ADDF #053 */ ! 171: asm("addf r6"); /* ADDF #054 */ ! 172: asm("addf r6"); /* ADDF #055 */ ! 173: asm("addf r6"); /* ADDF #056 */ ! 174: asm("addf r6"); /* ADDF #057 */ ! 175: asm("addf r6"); /* ADDF #058 */ ! 176: asm("addf r6"); /* ADDF #059 */ ! 177: asm("addf r6"); /* ADDF #060 */ ! 178: asm("addf r6"); /* ADDF #061 */ ! 179: asm("addf r6"); /* ADDF #062 */ ! 180: asm("addf r6"); /* ADDF #063 */ ! 181: asm("addf r6"); /* ADDF #064 */ ! 182: asm("addf r6"); /* ADDF #065 */ ! 183: asm("addf r6"); /* ADDF #066 */ ! 184: asm("addf r6"); /* ADDF #067 */ ! 185: asm("addf r6"); /* ADDF #068 */ ! 186: asm("addf r6"); /* ADDF #069 */ ! 187: asm("addf r6"); /* ADDF #070 */ ! 188: asm("addf r6"); /* ADDF #071 */ ! 189: asm("addf r6"); /* ADDF #072 */ ! 190: asm("addf r6"); /* ADDF #073 */ ! 191: asm("addf r6"); /* ADDF #074 */ ! 192: asm("addf r6"); /* ADDF #075 */ ! 193: asm("addf r6"); /* ADDF #076 */ ! 194: asm("addf r6"); /* ADDF #077 */ ! 195: asm("addf r6"); /* ADDF #078 */ ! 196: asm("addf r6"); /* ADDF #079 */ ! 197: asm("addf r6"); /* ADDF #080 */ ! 198: asm("addf r6"); /* ADDF #081 */ ! 199: asm("addf r6"); /* ADDF #082 */ ! 200: asm("addf r6"); /* ADDF #083 */ ! 201: asm("addf r6"); /* ADDF #084 */ ! 202: asm("addf r6"); /* ADDF #085 */ ! 203: asm("addf r6"); /* ADDF #086 */ ! 204: asm("addf r6"); /* ADDF #087 */ ! 205: asm("addf r6"); /* ADDF #088 */ ! 206: asm("addf r6"); /* ADDF #089 */ ! 207: asm("addf r6"); /* ADDF #090 */ ! 208: asm("addf r6"); /* ADDF #091 */ ! 209: asm("addf r6"); /* ADDF #092 */ ! 210: asm("addf r6"); /* ADDF #093 */ ! 211: asm("addf r6"); /* ADDF #094 */ ! 212: asm("addf r6"); /* ADDF #095 */ ! 213: asm("addf r6"); /* ADDF #096 */ ! 214: asm("addf r6"); /* ADDF #097 */ ! 215: asm("addf r6"); /* ADDF #098 */ ! 216: asm("addf r6"); /* ADDF #099 */ ! 217: asm("addf r6"); /* ADDF #100 */ ! 218: asm("addf r6"); /* ADDF #101 */ ! 219: asm("addf r6"); /* ADDF #102 */ ! 220: asm("addf r6"); /* ADDF #103 */ ! 221: asm("addf r6"); /* ADDF #104 */ ! 222: asm("addf r6"); /* ADDF #105 */ ! 223: asm("addf r6"); /* ADDF #106 */ ! 224: asm("addf r6"); /* ADDF #107 */ ! 225: asm("addf r6"); /* ADDF #108 */ ! 226: asm("addf r6"); /* ADDF #109 */ ! 227: asm("addf r6"); /* ADDF #110 */ ! 228: asm("addf r6"); /* ADDF #111 */ ! 229: asm("addf r6"); /* ADDF #112 */ ! 230: asm("addf r6"); /* ADDF #113 */ ! 231: asm("addf r6"); /* ADDF #114 */ ! 232: asm("addf r6"); /* ADDF #115 */ ! 233: asm("addf r6"); /* ADDF #116 */ ! 234: asm("addf r6"); /* ADDF #117 */ ! 235: asm("addf r6"); /* ADDF #118 */ ! 236: asm("addf r6"); /* ADDF #119 */ ! 237: asm("addf r6"); /* ADDF #120 */ ! 238: asm("addf r6"); /* ADDF #121 */ ! 239: asm("addf r6"); /* ADDF #122 */ ! 240: asm("addf r6"); /* ADDF #123 */ ! 241: asm("addf r6"); /* ADDF #124 */ ! 242: asm("addf r6"); /* ADDF #125 */ ! 243: asm("addf r6"); /* ADDF #126 */ ! 244: asm("addf r6"); /* ADDF #127 */ ! 245: asm("addf r6"); /* ADDF #128 */ ! 246: /* ! 247: * Thank god that's over with!!! now raise the IPL ! 248: */ ! 249: ! 250: asm("mtpr $0x1f,$8"); /* disable clock events */ ! 251: if( ( force_loop ) || ! 252: ( (clock_retrys-- ) && /* keep trying to get */ ! 253: (!rtc_occurred) ) ) /* a clock event */ ! 254: asm("jmp clock_add_lp");; ! 255: asm("bicpsw $0x60"); /* disable ovfl & undfl */ ! 256: } ! 257: ! 258: ! 259: ! 260: ! 261: ! 262: /**************************************************************************** ! 263: * Report an Bad Result Error ! 264: * ! 265: * Cycle: xx. EVT test xx. subtest xx. wrong ADDF result with Clock Events ! 266: * Testing clock event during 128 ADDF's. -instruction cache {hits / misses} ! 267: * operand = xxxxxxxx, result = xxxxxxxx, expected = xxxxxxxx ! 268: ****************************************************************************/ ! 269: print_clock_er() ! 270: { ! 271: if( !error ) { /* 1st error? */ ! 272: writes(" \n"); /* start a new print line */ ! 273: error = TRUE; ! 274: } ! 275: writes("Cycle: "); ! 276: writed( cycle ); ! 277: writes(" EVT test "); ! 278: writed( test_no ); ! 279: writes(". subtest "); ! 280: writed( subtest ); ! 281: writes(". wrong ADDF result with Clock Events\n"); ! 282: writes( ! 283: "Testing clock event during 128 ADDF's with instruction cache "); ! 284: if( i_cache_hit ) ! 285: writes("hits\n"); ! 286: else ! 287: writes("misses\n"); ! 288: writes("operand = "); ! 289: write32h( sgl_value_1 ); /* write the operand */ ! 290: writes(", result = "); ! 291: write32h( sgl_st_acc ); ! 292: writes(", expected = "); ! 293: write32h( sgl_expected ); ! 294: writec('\n'); ! 295: } ! 296: ! 297: ! 298: ! 299: /**************************************************************************** ! 300: * Report that no clock events were seen ! 301: * ! 302: * Cycle: xx. EVT test xx. subtest xx. no Clock Events were detected ! 303: * Testing clock event during 128 ADDF's. -instruction cache {hits / misses} ! 304: ****************************************************************************/ ! 305: who_pulled_the_plug() ! 306: { ! 307: if( prt_error ) ! 308: { ! 309: if( !error ) { /* 1st error? */ ! 310: writes(" \n"); /* start a new print line */ ! 311: error = TRUE; ! 312: } ! 313: writes("Cycle: "); ! 314: writed( cycle ); ! 315: writes(" EVT test "); ! 316: writed( test_no ); ! 317: writes(". subtest "); ! 318: writed( subtest ); ! 319: writes(". No Clock Events were detected\n"); ! 320: writes( ! 321: "\nTesting clock event during 128 ADDF's with instruction cache "); ! 322: if( i_cache_hit ) ! 323: writes("hits\n"); ! 324: else ! 325: writes("misses\n"); ! 326: } ! 327: if( halt_flg ) ! 328: pipe17_halt( 2 ); /* halt with code = 2 */ ! 329: } ! 330: ! 331: ! 332: ! 333: ! 334: ! 335: /**************************************************************************** ! 336: * halt on error routine ! 337: ****************************************************************************/ ! 338: pipe17_halt( code ) ! 339: int code; /* error code to halt with */ ! 340: { ! 341: err_code = code; ! 342: asm("movl _test_no,r0"); /* r0 = test number */ ! 343: asm("movl _subtest,r1"); /* r1 = subtest number */ ! 344: asm("movl _err_code,r2"); /* r2 = error code */ ! 345: asm("movl _cycle,r3"); /* r3 = cycle count */ ! 346: asm("movl _sgl_value_1,r4"); /* r4 = operand used */ ! 347: asm("movl _sgl_st_acc,r5"); /* r5 = final value */ ! 348: asm("movl _sgl_expected,r6"); /* r6 = expected value */ ! 349: asm("movl _i_cache_hit,r7"); /* r7 = 1 if cache hits */ ! 350: asm("halt"); /* HALT ... */ ! 351: } ! 352: ! 353:
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