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1.1 root 1:
2: #include "evt_defs.h"
3:
4: /*
5: *********************************************************************
6: * FPP PIPELINED EVENTS TEST #4
7: *
8: * This test will execute the following code: "LDF MULF MULL3 NEGF"
9: * with an alignment fault on the MULL3. We will make sure that:
10: * 1. The fault is detected,
11: * 2. the floating multiply operation completes,
12: * 3. the negate instruction is not executed.
13: *********************************************************************
14: */
15: pipe4()
16: {
17: asm("moval (r13),_pre_event_fp"); /* save the frame pointer */
18: asm("moval (r14),_pre_event_sp"); /* save the stack pointer */
19: precision = SGL;
20: test_event = ALIGN_CODE; /* alignment fault expected */
21: exp_event = FALSE; /* ... but not yet */
22: asm("movab _pipe4_ret,_event_return"); /* post event addr */
23: for( index = 0; index < max_pipe4_index; index++ )
24: {
25: dbl_ld_acc = pipe4_data[index].op_1; /* get the data */
26: dbl_value_1 = pipe4_data[index].op_2;
27: dbl_expected = pipe4_data[index].exp;
28: sgl_value_1 = 0x12345;
29: sgl_value_2 = -12345;
30: asm(".globl _pipe4_lp1");
31: asm("_pipe4_lp1:");
32: asm("bispsw $0x60"); /* enable ovfl & undfl */
33: asm("ldf _dbl_ld_acc"); /* load the Acc. */
34: exp_event = test_event; /* expect event soon */
35: asm("mulf _dbl_value_1");
36: asm("mull3 _sgl_value_1,_sgl_value_2,_sgl_value_3+3");
37: asm("negf");
38: /*
39: * If we got to here then there was no event
40: */
41: if( force_loop )
42: asm("brw _pipe4_lp1");; /* loop on the error */
43: exp_event = FALSE; /* reset event expected flag */
44: asm("movl _pre_event_fp,fp"); /* restore the frame pointer */
45: asm("movl _pre_event_sp,sp"); /* restore the stack pointer */
46: asm("bicpsw $0x60"); /* disable ovfl & undfl evts */
47: no_pipe4_evt();; /* report the error */
48: /*
49: * Come here after the event
50: */
51: asm(".globl _pipe4_ret");
52: asm("_pipe4_ret:");
53: asm("movl _pre_event_fp,fp"); /* restore the frame pointer */
54: asm("movl _pre_event_sp,sp"); /* restore the stack pointer */
55: if( force_loop )
56: asm("brw _pipe4_lp1");; /* loop on the error */
57: asm("bicpsw $0x60"); /* disable ovfl & undfl evts */
58: if( post_evt_acc.m == (dbl_expected.m ^ 0x80000000) )
59: pipe4_queue_er(); /* fpp queue not cleared */
60: else if( post_evt_acc.m != dbl_expected.m )
61: bad_pipe4_result(); /* incorrect result error */
62: }
63: }
64:
65:
66:
67: /****************************************************************************
68: * Report an "EVENT NOT DETECTED" error
69: *
70: * Cycle: xx. EVT test xx. subtest xx. no alignment fault. index = xx
71: * inst = LDF op1, MULF op2, MULL3 op3,op4,op5 (alignment fault on MULL3)
72: * op1 = xxxxxxxx, op2 = xxxxxxxx
73: * op3 = xxxxxxxx, op4 = xxxxxxxx, addr op5 = xxxxxxxx
74: ****************************************************************************/
75: no_pipe4_evt()
76: {
77: errcnt++; /* bump the error count */
78: if ( prt_error )
79: {
80: print_pipe4_er( ". no alignment fault.");
81: writes("op1 = ");
82: write32h( dbl_ld_acc.m );
83: writes(", op2 = ");
84: write32h( dbl_value_1.m );
85: writes("\nop3 = ");
86: write32h( sgl_value_1 );
87: writes(", op4 = ");
88: write32h( sgl_value_2 );
89: writes(", addr of op5 = ");
90: write32h( ( (int)&sgl_value_3 )+1 );
91: writec('\n');
92: }
93: if ( halt_flg ) /* halt on error? */
94: pipe4_halt( 1 );
95: if ( loop_on_err )
96: {
97: force_loop = TRUE; /* set the force loop flag */
98: asm("jmp _pipe4_lp1"); /* and loop */
99: };
100: }
101:
102:
103:
104:
105: /****************************************************************************
106: * Report an "BAD ACCUMULATOR AFTER THE EVENT" error
107: *
108: * Cycle: xx. EVT test xx. subtest xx. Bad final Accumulator. index = xx
109: * inst = LDF op1, MULF op2, MULL3 op3,op4,op5 (alignment fault on MULL3)
110: * The NEGF should not have been executed.
111: * op1 = xxxxxxxx, op2 = xxxxxxxx, final Acc. = xxxxxxxx, expected = xxxxxxxx
112: * op3 = xxxxxxxx, op4 = xxxxxxxx, addr op5 = xxxxxxxx
113: ****************************************************************************/
114: bad_pipe4_result()
115: {
116: errcnt++; /* bump the error count */
117: if ( prt_error )
118: {
119: print_pipe4_er(". Bad final Accumulator.");
120: writes("The NEGF should not have been executed.\n");
121: writes("op1 = ");
122: write32h( dbl_value_1.m );
123: writes(", op2 = ");
124: write32h( dbl_value_2.m );
125: writes(", final Acc. = ");
126: write32h( post_evt_acc.m );
127: writes(", expected = ");
128: write32h( dbl_expected.m );
129: writes("\nop3 = ");
130: write32h( sgl_value_1 );
131: writes(", op4 = ");
132: write32h( sgl_value_2 );
133: writes(", addr of op5 = ");
134: write32h( ( (int)&sgl_value_3 )+1 );
135: writec('\n');
136: }
137: if ( halt_flg ) /* halt on error? */
138: pipe4_halt( 2 );
139: if ( loop_on_err )
140: {
141: force_loop = TRUE; /* set the force loop flag */
142: asm("jmp _pipe4_lp1"); /* and loop */
143: };
144: }
145:
146:
147:
148:
149:
150: /****************************************************************************
151: * Report an "FPP Queue apparently not cleared" error
152: *
153: * Cycle: xx. EVT test xx. subtest xx. Fpp Queue not cleared. index = xx
154: * inst = LDF op1, MULF op2, MULL3 op3,op4,op5, NEGF (alignment fault on MULL3)
155: * The NEGF should not have been executed but apparently was.
156: * op1 = xxxxxxxx, op2 = xxxxxxxx, final Acc. = xxxxxxxx, expected = xxxxxxxx
157: * op3 = xxxxxxxx, op4 = xxxxxxxx, addr op5 = xxxxxxxx
158: ****************************************************************************/
159: pipe4_queue_er()
160: {
161: errcnt++; /* bump the error count */
162: if ( prt_error )
163: {
164: print_pipe4_er(". Fpp Queue not cleared.");
165: writes(
166: "The NEGF should not have been executed but apparently was.\n");
167: writes("op1 = ");
168: write32h( dbl_value_1.m );
169: writes(", op2 = ");
170: write32h( dbl_value_2.m );
171: writes(", final Acc. = ");
172: write32h( post_evt_acc.m );
173: writes(", expected = ");
174: write32h( dbl_expected.m );
175: writes("\nop3 = ");
176: write32h( sgl_value_1 );
177: writes(", op4 = ");
178: write32h( sgl_value_2 );
179: writes(", addr of op5 = ");
180: write32h( ( (int)&sgl_value_3 )+1 );
181: writec('\n');
182: }
183: if ( halt_flg ) /* halt on error? */
184: pipe4_halt( 3 );
185: if ( loop_on_err )
186: {
187: force_loop = TRUE; /* set the force loop flag */
188: asm("jmp _pipe4_lp1"); /* and loop */
189: };
190: }
191:
192:
193:
194: /****************************************************************************
195: * print an error message of the form:
196: *
197: * Cycle: xx. EVT test xx. subtest xx. <your message here> index = xx
198: * inst = LDF op1; MULF op2; MULL3 op3,op4,op5; NEGF; (alignment fault on MULL3)
199: ****************************************************************************/
200: print_pipe4_er( msg )
201: char *msg; /* error message to print */
202: {
203: if( errcnt == 1 ) /* 1st error? */
204: writes(" \n"); /* start a new print line */
205: writes("Cycle: ");
206: writed( cycle );
207: writes(" EVT test ");
208: writed( test_no );
209: writes(". subtest ");
210: writed( subtest );
211: writes( msg ); /* print the error message */
212: writes(" index = ");
213: writed( index );
214: writes("\ninst = LDF op1; MULF op2; MULL3 op3,op4,op5; NEGF");
215: writes(" (alignment fault on MULL3)\n");
216: }
217:
218:
219:
220: /****************************************************************************
221: * Halt on Error routine
222: ****************************************************************************/
223: pipe4_halt( code )
224: int code; /* error code to halt with */
225: {
226: err_code = code;
227: sgl_value_4 = dbl_ld_acc.m;
228: sgl_value_5 = dbl_value_1.m;
229: asm("movl _test_no,r0"); /* r0 = test number */
230: asm("movl _subtest,r1"); /* r1 = subtest number */
231: asm("movl _err_code,r2"); /* r2 = error code */
232: asm("movl _cycle,r3"); /* r3 = cycle count */
233: asm("movl _sgl_value_4,r4"); /* r4 = floating operand 1 */
234: asm("movl _sgl_value_5,r5"); /* r5 = floating operand 2 */
235: asm("movl _sgl_value_1,r6"); /* r6 = integer operand 1 */
236: asm("movl _sgl_value_2,r7"); /* r7 = integer operand 2 */
237: asm("moval _sgl_value_3,r8");
238: asm("incl r8"); /* r8 = addr causing event */
239: if( code == 1 )
240: asm("movl _index,r9"); /* r9 = data index */
241: else {
242: sgl_value_6 = post_evt_acc.m;
243: sgl_value_7 = dbl_expected.m;
244: asm("movl _sgl_value_6,r9"); /* r9 = final accumulator */
245: asm("movl _sgl_value_7,r10"); /* r10 = expected acc. */
246: asm("movl _index,r11"); /* r11 = data index */
247: }
248: asm("halt");; /* HALT ... */
249: }
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