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Power 6/32 Unix version 1.21

#include "evt_defs.h"

/*
 *********************************************************************
 *	FPP PIPELINED EVENTS TEST #4
 *
 *  This test will execute the following code: "LDF MULF MULL3 NEGF"
 * with an alignment fault on the MULL3. We will make sure that:
 * 1. The fault is detected, 
 * 2. the floating multiply operation completes,
 * 3. the negate instruction is not executed.
 *********************************************************************
*/
pipe4()
{
	asm("moval (r13),_pre_event_fp");	/* save the frame pointer */
	asm("moval (r14),_pre_event_sp");	/* save the stack pointer */
	precision = SGL;
	test_event = ALIGN_CODE;		/* alignment fault expected */
	exp_event = FALSE;			/* ... but not yet          */
	asm("movab _pipe4_ret,_event_return"); /* post event addr */
	for( index = 0; index < max_pipe4_index; index++ )
	{
	     dbl_ld_acc =   pipe4_data[index].op_1;	/* get the data */
	     dbl_value_1 =  pipe4_data[index].op_2;
	     dbl_expected = pipe4_data[index].exp;
	     sgl_value_1  = 0x12345;
	     sgl_value_2  = -12345;
	     asm(".globl _pipe4_lp1");
	     asm("_pipe4_lp1:");
	     asm("bispsw $0x60");		/* enable ovfl & undfl */
	     asm("ldf _dbl_ld_acc");		/* load the Acc.       */
	     exp_event = test_event;		/* expect event soon   */
	     asm("mulf _dbl_value_1");
	     asm("mull3 _sgl_value_1,_sgl_value_2,_sgl_value_3+3");
	     asm("negf");
/*
 * If we got to here then there was no event
*/
	     if( force_loop )
		  asm("brw _pipe4_lp1");;	/* loop on the error         */
	     exp_event = FALSE;			/* reset event expected flag */
	     asm("movl _pre_event_fp,fp");	/* restore the frame pointer */
	     asm("movl _pre_event_sp,sp");	/* restore the stack pointer */
	     asm("bicpsw $0x60");		/* disable ovfl & undfl evts */
	     no_pipe4_evt();;			/* report the error          */
/*
 * Come here after the event
*/
	     asm(".globl _pipe4_ret");
	     asm("_pipe4_ret:");
	     asm("movl _pre_event_fp,fp");	/* restore the frame pointer */
	     asm("movl _pre_event_sp,sp");	/* restore the stack pointer */
	     if( force_loop )
		  asm("brw _pipe4_lp1");;	/* loop on the error         */
	     asm("bicpsw $0x60");		/* disable ovfl & undfl evts */
	     if( post_evt_acc.m == (dbl_expected.m ^ 0x80000000) )
		  pipe4_queue_er();		/* fpp queue not cleared     */
	     else if( post_evt_acc.m != dbl_expected.m )
		  bad_pipe4_result();		/* incorrect result error    */
	}
}



/****************************************************************************
*		Report an "EVENT NOT DETECTED" error
*
* Cycle: xx. EVT test xx. subtest xx. no alignment fault. index = xx
* inst = LDF op1, MULF op2, MULL3 op3,op4,op5 (alignment fault on MULL3)
* op1 = xxxxxxxx,  op2 = xxxxxxxx 
* op3 = xxxxxxxx,  op4 = xxxxxxxx,  addr op5 = xxxxxxxx 
****************************************************************************/
no_pipe4_evt()
{
	errcnt++;				/* bump the error count    */
	if ( prt_error ) 
	{
	     print_pipe4_er( ". no alignment fault.");
	     writes("op1 = ");
	     write32h( dbl_ld_acc.m );
	     writes(",  op2 = ");
	     write32h( dbl_value_1.m );
	     writes("\nop3 = ");
	     write32h( sgl_value_1 );
	     writes(",  op4 = ");
	     write32h( sgl_value_2 );
	     writes(",  addr of op5 = ");
	     write32h( ( (int)&sgl_value_3 )+1 );
	     writec('\n');
	}
	if ( halt_flg ) 			/* halt on error?           */
	     pipe4_halt( 1 );
	if ( loop_on_err ) 
	{
	     force_loop = TRUE;		/* set the force loop flag */
	     asm("jmp _pipe4_lp1");	/* and loop                */
	};
}




/****************************************************************************
*		Report an "BAD ACCUMULATOR AFTER THE EVENT" error
*
* Cycle: xx. EVT test xx. subtest xx. Bad final Accumulator. index = xx
* inst = LDF op1, MULF op2, MULL3 op3,op4,op5 (alignment fault on MULL3)
* The NEGF should not have been executed.
* op1 = xxxxxxxx, op2 = xxxxxxxx, final Acc. = xxxxxxxx, expected = xxxxxxxx 
* op3 = xxxxxxxx, op4 = xxxxxxxx,   addr op5 = xxxxxxxx 
****************************************************************************/
bad_pipe4_result()
{
	errcnt++;				/* bump the error count    */
	if ( prt_error ) 
	{
	     print_pipe4_er(". Bad final Accumulator.");
	     writes("The NEGF should not have been executed.\n");
	     writes("op1 = ");
	     write32h( dbl_value_1.m );
	     writes(", op2 = ");
	     write32h( dbl_value_2.m );
	     writes(", final Acc. = ");
	     write32h( post_evt_acc.m );
	     writes(", expected   = ");
	     write32h( dbl_expected.m );
	     writes("\nop3 = ");
	     write32h( sgl_value_1 );
	     writes(", op4 = ");
	     write32h( sgl_value_2 );
	     writes(",   addr of op5 = ");
	     write32h( ( (int)&sgl_value_3 )+1 );
	     writec('\n');
	}
	if ( halt_flg ) 			/* halt on error?           */
	     pipe4_halt( 2 );
	if ( loop_on_err ) 
	{
	     force_loop = TRUE;		/* set the force loop flag */
	     asm("jmp _pipe4_lp1");	/* and loop                */
	};
}





/****************************************************************************
*		Report an "FPP Queue apparently not cleared" error
*
* Cycle: xx. EVT test xx. subtest xx. Fpp Queue not cleared. index = xx
* inst = LDF op1, MULF op2, MULL3 op3,op4,op5, NEGF (alignment fault on MULL3)
* The NEGF should not have been executed but apparently was.
* op1 = xxxxxxxx, op2 = xxxxxxxx, final Acc. = xxxxxxxx, expected = xxxxxxxx 
* op3 = xxxxxxxx, op4 = xxxxxxxx,   addr op5 = xxxxxxxx 
****************************************************************************/
pipe4_queue_er()
{
	errcnt++;				/* bump the error count    */
	if ( prt_error ) 
	{
	     print_pipe4_er(". Fpp Queue not cleared.");
	     writes(
	     "The NEGF should not have been executed but apparently was.\n");
	     writes("op1 = ");
	     write32h( dbl_value_1.m );
	     writes(", op2 = ");
	     write32h( dbl_value_2.m );
	     writes(", final Acc. = ");
	     write32h( post_evt_acc.m );
	     writes(", expected   = ");
	     write32h( dbl_expected.m );
	     writes("\nop3 = ");
	     write32h( sgl_value_1 );
	     writes(", op4 = ");
	     write32h( sgl_value_2 );
	     writes(",   addr of op5 = ");
	     write32h( ( (int)&sgl_value_3 )+1 );
	     writec('\n');
	}
	if ( halt_flg ) 			/* halt on error?           */
	     pipe4_halt( 3 );
	if ( loop_on_err ) 
	{
	     force_loop = TRUE;		/* set the force loop flag */
	     asm("jmp _pipe4_lp1");	/* and loop                */
	};
}



/****************************************************************************
*		print an error message of the form:
*
* Cycle: xx. EVT test xx. subtest xx. <your message here> index = xx
* inst = LDF op1; MULF op2; MULL3 op3,op4,op5; NEGF; (alignment fault on MULL3)
****************************************************************************/
print_pipe4_er( msg )
char *msg;					/* error message to print  */
{
	     if( errcnt == 1 )			/* 1st error?              */
		  writes(" \n");		/* start a new print line  */
	     writes("Cycle: ");
	     writed( cycle );
	     writes("  EVT test ");
	     writed( test_no );
	     writes(". subtest ");
	     writed( subtest );
	     writes( msg );			/* print the error message */
	     writes(" index = ");
	     writed( index );
	     writes("\ninst = LDF op1; MULF op2; MULL3 op3,op4,op5; NEGF");
	     writes(" (alignment fault on MULL3)\n");
}



/****************************************************************************
*		Halt on Error routine
****************************************************************************/
pipe4_halt( code )
int code;					/* error code to halt with */
{
	err_code = code;
	sgl_value_4 = dbl_ld_acc.m;
	sgl_value_5 = dbl_value_1.m;
	asm("movl _test_no,r0");		/* r0  = test number        */
	asm("movl _subtest,r1");		/* r1  = subtest number     */
	asm("movl _err_code,r2");		/* r2  = error code         */
	asm("movl _cycle,r3");			/* r3  = cycle count        */
	asm("movl _sgl_value_4,r4");		/* r4  = floating operand 1 */
	asm("movl _sgl_value_5,r5");		/* r5  = floating operand 2 */
	asm("movl _sgl_value_1,r6");		/* r6  = integer operand 1  */
	asm("movl _sgl_value_2,r7");		/* r7  = integer operand 2  */
	asm("moval _sgl_value_3,r8");
	asm("incl r8");				/* r8  = addr causing event */
	if( code == 1 )
	     asm("movl _index,r9");		/* r9  = data index         */
	else {
	     sgl_value_6 = post_evt_acc.m;
	     sgl_value_7 = dbl_expected.m;
	     asm("movl _sgl_value_6,r9");	/* r9  = final accumulator  */
	     asm("movl _sgl_value_7,r10");	/* r10 = expected acc.      */
	     asm("movl _index,r11");		/* r11 = data index         */
	}
	asm("halt");;				/* HALT ...                 */
}

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