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Power 6/32 Unix version 1.21
#include "evt_defs.h"
/*
*********************************************************************
* FPP PIPELINED EVENTS TEST #5
*
* This test will execute the following code: "LDD MULD LDF"
* with an reserved operand fault on the MULD. We will make sure that:
* 1. The fault is detected,
* 2. the negate instruction is not executed.
*********************************************************************
*/
pipe5()
{
asm("moval (r13),_pre_event_fp"); /* save the frame pointer */
asm("moval (r14),_pre_event_sp"); /* save the stack pointer */
precision = DBL;
test_event = RESOP_CODE; /* reserved op fault expected */
exp_event = FALSE; /* ... but not yet */
asm("movab _pipe5_ret,_event_return"); /* post event addr */
for( index = 0; index < flt_resop_cnt; index++ )
{
dbl_ld_acc = acc_data[ index ];
dbl_value_1 = flt_resops[ index ].op_1;
dbl_value_3.m = 0x12345678; /* get dummy load value */
dbl_value_3.l = 0xabcdef01; /* get dummy load value */
asm(".globl _pipe5_lp1");
asm("_pipe5_lp1:");
asm("bispsw $0x60"); /* enable ovfl & undfl */
asm("ldd _dbl_ld_acc"); /* load the Acc. */
exp_event = test_event; /* expect event soon */
asm("muld _dbl_value_1"); /* cause the event */
asm("ldd _dbl_value_3"); /* we shouldn't get here */
/*
* If we got to here then there was no event
*/
if( force_loop )
asm("brw _pipe5_lp1");; /* loop on the error */
exp_event = FALSE; /* reset event expected flag */
asm("movl _pre_event_fp,fp"); /* restore the frame pointer */
asm("movl _pre_event_sp,sp"); /* restore the stack pointer */
asm("bicpsw $0x60"); /* disable ovfl & undfl evts */
no_pipe5_evt();; /* report the error */
/*
* Come here after the event
*/
asm(".globl _pipe5_ret");
asm("_pipe5_ret:");
asm("movl _pre_event_fp,fp"); /* restore the frame pointer */
asm("movl _pre_event_sp,sp"); /* restore the stack pointer */
if( force_loop )
asm("brw _pipe5_lp1");; /* loop on the error */
asm("bicpsw $0x60"); /* disable ovfl & undfl evts */
if( post_evt_acc.m == dbl_value_3.m )
pipe5_queue(); /* fpp queue not cleared */
else if( post_evt_acc.m ) /* was the Acc. cleared? */
bad_pipe5_result(); /* incorrect result error */
}
}
/****************************************************************************
* Report an "EVENT NOT DETECTED" error
*
* Cycle: xx. EVT test xx. subtest xx. no reserved op fault. index = xx
* inst = LDD op1, MULD op2, LDF op3 (reserved operand fault on MULL3)
* op1 = xxxxxxxx xxxxxxxx, op2 = xxxxxxxx xxxxxxxx, op3 = xxxxxxxx
****************************************************************************/
no_pipe5_evt()
{
errcnt++; /* bump the error count */
if ( prt_error )
{
print_pipe5_er( ". no reserved op fault.");
writes("op1 = ");
write32h( dbl_ld_acc.m );
writec(' ');
write32h( dbl_ld_acc.l );
writes(", op2 = ");
write32h( dbl_value_1.m );
writec(' ');
write32h( dbl_value_1.l );
writes(", op3 = ");
write32h( dbl_value_3.m );
writec('\n');
}
if ( halt_flg ) /* halt on error? */
pipe5_halt( 1 );
if ( loop_on_err )
{
force_loop = TRUE; /* set the force loop flag */
asm("jmp _pipe5_lp1"); /* and loop */
};
}
/****************************************************************************
* Report an "BAD ACCUMULATOR AFTER THE EVENT" error
*
* Cycle: xx. EVT test xx. subtest xx. Bad final Accumulator. index = xx
* inst = LDD op1, MULD op2, LDF op3 (reserved operand fault on MULL3)
* The LDF should not have been executed.
* op1 = xxxxxxxx xxxxxxxx, final Acc. = xxxxxxxx xxxxxxxx
* op2 = xxxxxxxx xxxxxxxx, expected = xxxxxxxx xxxxxxxx
* op3 = xxxxxxxx
****************************************************************************/
bad_pipe5_result()
{
errcnt++; /* bump the error count */
if ( prt_error )
{
print_pipe5_er(". Bad final Accumulator.");
writes("The LDF should not have been executed.\n");
writes("op1 = ");
write32h( dbl_value_1.m );
writec(' ');
write32h( dbl_value_1.l );
writes(", final Acc. = ");
write32h( post_evt_acc.m );
writec(' ');
write32h( post_evt_acc.l );
writes("\nop2 = ");
write32h( dbl_value_2.m );
writec(' ');
write32h( dbl_value_2.l );
writes(", expected = ");
write32h( 0 );
writec(' ');
write32h( 0 );
writes("\nop_3 = ");
write32h( dbl_value_3.m );
writec('\n');
}
if ( halt_flg ) /* halt on error? */
pipe5_halt( 2 );
if ( loop_on_err )
{
force_loop = TRUE; /* set the force loop flag */
asm("jmp _pipe5_lp1"); /* and loop */
};
}
/****************************************************************************
* Report an "FPP Queue apparently not cleared" error
*
* Cycle: xx. EVT test xx. subtest xx. Fpp Queue not cleared. index = xx
* inst = LDD op1, MULD op2, LDF op3 (reserved operand fault on MULD)
* The LDF should not have been executed but apparently was.
* op1 = xxxxxxxx xxxxxxxx, final Acc. = xxxxxxxx xxxxxxxx
* op2 = xxxxxxxx xxxxxxxx, expected = xxxxxxxx xxxxxxxx
* op3 = xxxxxxxx
****************************************************************************/
pipe5_queue()
{
errcnt++; /* bump the error count */
if ( prt_error )
{
print_pipe5_er(". Fpp Queue not cleared.");
writes(
"The NEGF should not have been executed but apparently was.\n");
writes("op1 = ");
write32h( dbl_value_1.m );
writec(' ');
write32h( dbl_value_1.l );
writes(", final Acc. = ");
write32h( post_evt_acc.m );
writec(' ');
write32h( post_evt_acc.l );
writes("\nop2 = ");
write32h( dbl_value_2.m );
writec(' ');
write32h( dbl_value_2.l );
writes(", expected = ");
write32h( 0 );
writec(' ');
write32h( 0 );
writes("\nop_3 = ");
write32h( dbl_value_3.m );
writec('\n');
}
if ( halt_flg ) /* halt on error? */
pipe5_halt( 3 );
if ( loop_on_err )
{
force_loop = TRUE; /* set the force loop flag */
asm("jmp _pipe5_lp1"); /* and loop */
};
}
/****************************************************************************
* print an error message of the form:
*
* Cycle: xx. EVT test xx. subtest xx. <your message here> index = xx
* inst = LDD op1, MULD op2, LDF op3 (reserved operand fault on MULD)
****************************************************************************/
print_pipe5_er( msg )
char *msg; /* error message to print */
{
if( errcnt == 1 ) /* 1st error? */
writes(" \n"); /* start a new print line */
writes("Cycle: ");
writed( cycle );
writes(" EVT test ");
writed( test_no );
writes(". subtest ");
writed( subtest );
writes( msg ); /* print the error message */
writes(" index = ");
writed( index );
writes("\ninst = LDD op1; MULD op2; LDFop3");
writes(" (reserved operand fault on MULL3)\n");
}
/****************************************************************************
* Halt on Error routine
****************************************************************************/
pipe5_halt( code )
int code; /* error code to halt with */
{
err_code = code;
sgl_value_4 = dbl_ld_acc.m;
sgl_value_5 = dbl_ld_acc.l;
sgl_value_6 = dbl_value_1.m;
sgl_value_7 = dbl_value_1.l;
asm("movl _test_no,r0"); /* r0 = test number */
asm("movl _subtest,r1"); /* r1 = subtest number */
asm("movl _err_code,r2"); /* r2 = error code */
asm("movl _cycle,r3"); /* r3 = cycle count */
asm("movl _sgl_value_4,r4"); /* r4 = MSW of operand 1 */
asm("movl _sgl_value_5,r5"); /* r5 = LSW of operand 1 */
asm("movl _sgl_value_6,r6"); /* r6 = MSW of operand 2 */
asm("movl _sgl_value_7,r7"); /* r7 = LSW of operand 2 */
asm("movl _sgl_value_8,r8"); /* r8 = operand 3 */
if( code == 1 )
asm("movl _index,r9"); /* r9 = data index */
else {
sgl_value_6 = post_evt_acc.m;
sgl_value_7 = post_evt_acc.l;
asm("movl _sgl_value_6,r9"); /* r9 = MSW of final acc. */
asm("movl _sgl_value_7,r10"); /* r10 = LSW of final acc. */
asm("movl _index,r11"); /* r11 = data index */
}
asm("halt");; /* HALT ... */
}
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