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1.1 ! root 1: ! 2: #include "evt_defs.h" ! 3: #define MAX_POS 0x7fffffff; ! 4: /* ! 5: ********************************************************************* ! 6: * FPP PIPELINED EVENTS TEST #6 ! 7: * ! 8: * This test will execute the following code: "LDD MULD ADDL2 MULD 0" ! 9: * with an integer overflow fault on the ADDL2. We will make sure that: ! 10: * 1. The fault is detected, ! 11: * 2. the 1st multiply operation completes, and ! 12: * 3. the 2nd multiply instruction is not executed. ! 13: * ! 14: * NOTE: this instruction uses the same data as pipe2 ! 15: ********************************************************************* ! 16: */ ! 17: pipe6() ! 18: { ! 19: asm("moval (r13),_pre_event_fp"); /* save the frame pointer */ ! 20: asm("moval (r14),_pre_event_sp"); /* save the stack pointer */ ! 21: precision = DBL; ! 22: test_event = ARITH_CODE; /* expect an arithmetic fault */ ! 23: exp_code = INT_OVFL_CODE; /* -specificly int overflow */ ! 24: exp_event = FALSE; /* ... but not yet */ ! 25: asm("movab _pipe6_ret,_event_return"); /* set post event return addr */ ! 26: dbl_value_2.m = dbl_value_2.l = 0; /* clear the 2nd MULD operand */ ! 27: for( index = 0; index < max_pipe2_index; index++ ) ! 28: { ! 29: sgl_value_1 = 0x789abcde; /* get the integer ovfl data */ ! 30: sgl_value_2 = MAX_POS; /* max integer (7fffffff) */ ! 31: dbl_ld_acc = pipe2_data[index].op_1; /* get the data */ ! 32: dbl_value_1 = pipe2_data[index].op_2; ! 33: dbl_expected = pipe2_data[index].exp; ! 34: asm(".globl _pipe6_lp1"); ! 35: asm("_pipe6_lp1:"); ! 36: asm("bispsw $0x60"); /* enable ovfl,undfl */ ! 37: asm("ldd _dbl_ld_acc"); /* load the Acc. */ ! 38: exp_event = test_event; /* expect event soon */ ! 39: asm("muld _dbl_value_1"); /* start the multiply*/ ! 40: asm("addl2 _sgl_value_1,_sgl_value_2"); /* trigger the fault */ ! 41: asm("muld _dbl_value_2"); /* shouldn't get here*/ ! 42: /* ! 43: * If we got to here then there was no event ! 44: */ ! 45: if( force_loop ) ! 46: asm("brw _pipe6_lp1");; /* loop on the error */ ! 47: exp_event = FALSE; /* reset event expected flag */ ! 48: asm("movl _pre_event_fp,fp"); /* restore the frame pointer */ ! 49: asm("movl _pre_event_sp,sp"); /* restore the stack pointer */ ! 50: asm("bicpsw $0x60"); /* disable ovfl & undfl evts */ ! 51: no_pipe6_evt();; /* report the error */ ! 52: /* ! 53: * Come here after the event ! 54: */ ! 55: asm(".globl _pipe6_ret"); ! 56: asm("_pipe6_ret:"); ! 57: asm("movl _pre_event_fp,fp"); /* restore the frame pointer */ ! 58: asm("movl _pre_event_sp,sp"); /* restore the stack pointer */ ! 59: if( force_loop ) ! 60: asm("brw _pipe6_lp1");; /* loop on the error */ ! 61: asm("bicpsw $0x60"); /* disable ovfl & undfl evts */ ! 62: if( (post_evt_acc.m != dbl_expected.m) || ! 63: (post_evt_acc.l != dbl_expected.l) ) ! 64: { ! 65: if( (!post_evt_acc.m) && (!post_evt_acc.l) ) ! 66: pipe6_queue_er(); /* queue not cleared error */ ! 67: else ! 68: bad_pipe6_result(); /* incorrect result error */ ! 69: } ! 70: } ! 71: } ! 72: ! 73: ! 74: ! 75: /**************************************************************************** ! 76: * Report an "EVENT NOT DETECTED" error ! 77: * ! 78: * Cycle: xx. EVT test xx. subtest xx. No Integer Overflow fault. index = xx ! 79: * inst = LDD op1, MULD op2, ADDL2 op3,op4, MULD op5 (Int. Overflow on ADDL2) ! 80: * op1 = xxxxxxxx xxxxxxxx, op3 = xxxxxxxx ! 81: * op2 = xxxxxxxx xxxxxxxx, initial op4 = xxxxxxxx, final op4 = xxxxxxxx ! 82: ****************************************************************************/ ! 83: no_pipe6_evt() ! 84: { ! 85: errcnt++; /* bump the error count */ ! 86: if ( prt_error ) ! 87: { ! 88: print_pipe6_err( " No Integer Overflow fault." ); ! 89: writes("op1 = "); ! 90: write32h( dbl_ld_acc.m ); ! 91: writes(" "); ! 92: write32h( dbl_ld_acc.l ); ! 93: writes(", op3 = "); ! 94: write32h( sgl_value_1 ); ! 95: writes("\nop2 = "); ! 96: write32h( dbl_value_1.m ); ! 97: writes(" "); ! 98: write32h( dbl_value_1.l ); ! 99: writes(", initial op4 = "); ! 100: sgl_dummy1 = MAX_POS; ! 101: write32h( sgl_dummy1 ); ! 102: writes(", final op4 = "); ! 103: write32h( sgl_value_2 ); ! 104: writec('\n'); ! 105: } ! 106: if ( halt_flg ) /* halt on error? */ ! 107: pipe6_halt( 1 ); /* halt with a code of 1 */ ! 108: if ( loop_on_err ) ! 109: { ! 110: force_loop = TRUE; /* set the force loop flag */ ! 111: asm("jmp _pipe6_lp1"); /* and loop */ ! 112: }; ! 113: } ! 114: ! 115: ! 116: ! 117: ! 118: /**************************************************************************** ! 119: * Report an "BAD ACCUMULATOR AFTER THE EVENT" error ! 120: * ! 121: * Cycle: xx. EVT test xx. subtest xx. . Bad final Accumulator. index = xx ! 122: * inst = LDD op1, MULD op2, ADDL2 op3,op4, MULD op5 (Int. Overflow on ADDL2) ! 123: * The 2nd MULD should not be executed. ! 124: * op1 = xxxxxxxx xxxxxxxx, final Acc. = xxxxxxxx xxxxxxxx ! 125: * op2 = xxxxxxxx xxxxxxxx, expected = xxxxxxxx xxxxxxxx ! 126: * op5 = xxxxxxxx xxxxxxxx ! 127: ****************************************************************************/ ! 128: bad_pipe6_result() ! 129: { ! 130: errcnt++; /* bump the error count */ ! 131: if ( prt_error ) ! 132: { ! 133: print_pipe6_err( ". Bad final Accumulator." ); ! 134: writes("The 2nd MULD should not be executed\n"); ! 135: writes("op1 = "); ! 136: write32h( dbl_ld_acc.m ); ! 137: writes(" "); ! 138: write32h( dbl_ld_acc.l ); ! 139: writes(", final Acc. = "); ! 140: write32h( post_evt_acc.m ); ! 141: writec(' '); ! 142: write32h( post_evt_acc.l ); ! 143: writes("\nop2 = "); ! 144: write32h( dbl_value_1.m ); ! 145: writes(" "); ! 146: write32h( dbl_value_1.l ); ! 147: writes(", expected = "); ! 148: write32h( dbl_expected.m ); ! 149: writes(" "); ! 150: write32h( dbl_expected.l ); ! 151: writes("\nop5 = "); ! 152: write32h( dbl_value_2.m ); ! 153: writes(" "); ! 154: write32h( dbl_value_2.l ); ! 155: writec('\n'); ! 156: } ! 157: if ( halt_flg ) /* halt on error? */ ! 158: pipe6_halt( 2 ); /* halt with a code of 2 */ ! 159: if ( loop_on_err ) ! 160: { ! 161: force_loop = TRUE; /* set the force loop flag */ ! 162: asm("jmp _pipe6_lp1"); /* and loop */ ! 163: }; ! 164: } ! 165: ! 166: ! 167: ! 168: ! 169: /**************************************************************************** ! 170: * Report an "FPP Queue not cleared" error ! 171: * ! 172: * Cycle: xx. EVT test xx. subtest xx. . FPP queue not cleared. index = xx ! 173: * inst = LDD op1, MULD op2, ADDL2 op3,op4, MULD op5 (Int. Overflow on ADDL2) ! 174: * The 2nd MULD should not have been executed but apparently was. ! 175: * op1 = xxxxxxxx xxxxxxxx, final Acc. = xxxxxxxx xxxxxxxx ! 176: * op2 = xxxxxxxx xxxxxxxx, expected = xxxxxxxx xxxxxxxx ! 177: * op5 = xxxxxxxx xxxxxxxx ! 178: ****************************************************************************/ ! 179: pipe6_queue_er() ! 180: { ! 181: errcnt++; /* bump the error count */ ! 182: if ( prt_error ) ! 183: { ! 184: print_pipe6_err( ". FPP queue not cleared." ); ! 185: writes( ! 186: "The 2nd MULD should not have been executed but apparently was.\n"); ! 187: writes("op1 = "); ! 188: write32h( dbl_ld_acc.m ); ! 189: writes(" "); ! 190: write32h( dbl_ld_acc.l ); ! 191: writes(", final Acc. = "); ! 192: write32h( post_evt_acc.m ); ! 193: writec(' '); ! 194: write32h( post_evt_acc.l ); ! 195: writes("\nop2 = "); ! 196: write32h( dbl_value_1.m ); ! 197: writes(" "); ! 198: write32h( dbl_value_1.l ); ! 199: writes(", expected = "); ! 200: write32h( dbl_expected.m ); ! 201: writes(" "); ! 202: write32h( dbl_expected.l ); ! 203: writes("\nop5 = "); ! 204: write32h( dbl_value_2.m ); ! 205: writes(" "); ! 206: write32h( dbl_value_2.l ); ! 207: writec('\n'); ! 208: } ! 209: if ( halt_flg ) /* halt on error? */ ! 210: pipe6_halt( 3 ); /* halt with a code of 3 */ ! 211: if ( loop_on_err ) ! 212: { ! 213: force_loop = TRUE; /* set the force loop flag */ ! 214: asm("jmp _pipe6_lp1"); /* and loop */ ! 215: }; ! 216: } ! 217: ! 218: ! 219: ! 220: ! 221: ! 222: /**************************************************************************** ! 223: * Report an error message of the form ! 224: * ! 225: * Cycle: xx. EVT test xx. subtest xx. <your message here> index = xx ! 226: * inst = LDD op1, MULD op2, ADDL2 op3,op4, MULD op5 (Int. Overflow on ADDL2) ! 227: ****************************************************************************/ ! 228: print_pipe6_err( msg ) ! 229: char *msg; /* pointer to error message */ ! 230: { ! 231: if( errcnt == 1 ) /* 1st error? */ ! 232: writes(" \n"); /* start a new print line */ ! 233: writes("Cycle: "); ! 234: writed( cycle ); ! 235: writes(" EVT test "); ! 236: writed( test_no ); ! 237: writes(". subtest "); ! 238: writed( subtest ); ! 239: writes( msg ); /* print the error message */ ! 240: writes(" index = "); ! 241: writed( index ); ! 242: writes("\ninst = LDD op1, MULD op2, ADDL2 op3,op4, MULD op5"); ! 243: writes(" (Integer Overflow on ADDL2)\n"); ! 244: } ! 245: ! 246: ! 247: /**************************************************************************** ! 248: * Error Halt Routine ! 249: ****************************************************************************/ ! 250: pipe6_halt( code ) ! 251: int code; /* halt code to use */ ! 252: { ! 253: err_code = code; ! 254: sgl_value_3 = MAX_POS; /* initial op4 data */ ! 255: sgl_value_4 = dbl_ld_acc.m; ! 256: sgl_value_5 = dbl_ld_acc.l; ! 257: sgl_value_6 = dbl_value_1.m; ! 258: sgl_value_7 = dbl_value_1.l; ! 259: asm("movl _test_no,r0"); /* r0 = test number */ ! 260: asm("movl _subtest,r1"); /* r1 = subtest number */ ! 261: asm("movl _err_code,r2"); /* r2 = error code */ ! 262: asm("movl _cycle,r3"); /* r3 = cycle count */ ! 263: asm("movl _sgl_value_4,r4"); /* r4 = MSW of operand 1 */ ! 264: asm("movl _sgl_value_5,r5"); /* r5 = LSW of operand 1 */ ! 265: asm("movl _sgl_value_6,r6"); /* r6 = MSW of operand 2 */ ! 266: asm("movl _sgl_value_7,r7"); /* r7 = LSW of operand 2 */ ! 267: if( code == 1 ) { ! 268: asm("movl _sgl_value_1,r8"); /* r8 = operand 3 */ ! 269: asm("movl _sgl_value_3,r9"); /* r9 = operand 2, initial */ ! 270: asm("movl _sgl_value_2,r10"); /* r10 = operand 2, final */ ! 271: asm("movl _index,r11"); /* r11 = data index */ ! 272: asm("halt"); /* HALT ... */ ! 273: } else { ! 274: sgl_value_1 = post_evt_acc.m; ! 275: sgl_value_2 = post_evt_acc.l; ! 276: sgl_value_3 = dbl_expected.m; ! 277: sgl_value_4 = dbl_expected.l; ! 278: sgl_value_5 = dbl_value_2.m; ! 279: sgl_value_6 = dbl_value_2.l; ! 280: asm("movl _sgl_value_1,r8"); /* r8 = MSW of final acc. */ ! 281: asm("movl _sgl_value_2,r9"); /* r9 = LSW of final acc. */ ! 282: asm("movl _sgl_value_3,r10"); /* r10 = MSW of expected */ ! 283: asm("movl _sgl_value_4,r11"); /* r11 = LSW of expected */ ! 284: asm("movl _sgl_value_5,r12"); /* r12 = MSW of 2nd MULD op */ ! 285: asm("movl _sgl_value_6,r13"); /* r13 = LSW of 2nd MULD op */ ! 286: asm("movl _index,r14"); /* r14 = data index */ ! 287: } ! 288: asm("halt"); /* HALT ... */ ! 289: }
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