|
|
1.1 ! root 1: ! 2: #include "evt_defs.h" ! 3: #define MAX_POS 0x7fffffff; ! 4: ! 5: /* ! 6: ********************************************************************* ! 7: * FPP PIPELINED EVENTS TEST #7 ! 8: * ! 9: * This test will execute the following code: "LDF DIVF MULL3 NEGF" ! 10: * with an integer overflow fault on the MULL3. We will make sure that: ! 11: * 1. The fault is detected, ! 12: * 2. the floating divide operation completes, ! 13: * 3. and that the negate doesn't complete ! 14: ********************************************************************* ! 15: */ ! 16: pipe7() ! 17: { ! 18: asm("moval (r13),_pre_event_fp"); /* save the frame pointer */ ! 19: asm("moval (r14),_pre_event_sp"); /* save the stack pointer */ ! 20: precision = SGL; ! 21: test_event = ARITH_CODE; /* expect an arithmetic fault */ ! 22: exp_code = INT_OVFL_CODE; /* -specificly int overflow */ ! 23: exp_event = FALSE; /* ... but not yet */ ! 24: asm("movab _pipe7_ret,_event_return"); /* post event addr */ ! 25: for( index = 0; index < max_pipe7_index; index++ ) ! 26: { ! 27: dbl_ld_acc = pipe7_data[index].op_1; /* get the data */ ! 28: dbl_value_1 = pipe7_data[index].op_2; ! 29: dbl_expected = pipe7_data[index].exp; ! 30: sgl_value_1 = 0x12345; /* get overflow data */ ! 31: sgl_value_2 = MAX_POS; ! 32: asm("bispsw $0x60"); /* enable ovfl,undfl */ ! 33: asm(".globl _pipe7_lp1"); ! 34: asm("_pipe7_lp1:"); ! 35: asm("ldf _dbl_ld_acc"); /* load the Acc. */ ! 36: exp_event = test_event; /* expect event soon */ ! 37: asm("divf _dbl_value_1"); /* divide by op.#2 */ ! 38: asm("mull3 _sgl_value_1,_sgl_value_2,_sgl_value_3"); ! 39: asm("negf"); ! 40: /* ! 41: * If we got to here then there was no event ! 42: */ ! 43: if( force_loop ) ! 44: asm("brw _pipe7_lp1");; /* loop on the error */ ! 45: exp_event = FALSE; /* reset event expected flag */ ! 46: asm("movl _pre_event_fp,fp"); /* restore the frame pointer */ ! 47: asm("movl _pre_event_sp,sp"); /* restore the stack pointer */ ! 48: asm("bicpsw $0x60"); /* disable ovfl & undfl evts */ ! 49: no_pipe7_evt();; /* report the error */ ! 50: /* ! 51: * Come here after the event ! 52: */ ! 53: asm(".globl _pipe7_ret"); ! 54: asm("_pipe7_ret:"); ! 55: asm("movl _pre_event_fp,fp"); /* restore the frame pointer */ ! 56: asm("movl _pre_event_sp,sp"); /* restore the stack pointer */ ! 57: if( force_loop ) ! 58: asm("brw _pipe7_lp1");; /* loop on the error */ ! 59: asm("bicpsw $0x60"); /* disable ovfl & undfl evts */ ! 60: if( post_evt_acc.m == (dbl_expected.m ^ 0x80000000) ) ! 61: pipe7_queue_er(); /* fpp queue not cleared */ ! 62: else if( post_evt_acc.m != dbl_expected.m ) ! 63: bad_pipe7_result(); /* incorrect result error */ ! 64: } ! 65: } ! 66: ! 67: ! 68: ! 69: /**************************************************************************** ! 70: * Report an "EVENT NOT DETECTED" error ! 71: * ! 72: * Cycle: xx. EVT test xx. subtest xx. no integer overflow fault. index = xx ! 73: * inst = LDF op1, DIVF op2, MULL3 op3,op4,op5, NEGF (int. overflow on MULL3) ! 74: * op1 = xxxxxxxx, op2 = xxxxxxxx ! 75: * op3 = xxxxxxxx, op4 = xxxxxxxx, op5 = xxxxxxxx ! 76: ****************************************************************************/ ! 77: no_pipe7_evt() ! 78: { ! 79: errcnt++; /* bump the error count */ ! 80: if ( prt_error ) ! 81: { ! 82: print_pipe7_er( ". no integer overflow fault."); ! 83: writes("op1 = "); ! 84: write32h( dbl_ld_acc.m ); ! 85: writes(", op2 = "); ! 86: write32h( dbl_value_1.m ); ! 87: writes("\nop3 = "); ! 88: write32h( sgl_value_1 ); ! 89: writes(", op4 = "); ! 90: write32h( sgl_value_2 ); ! 91: writes(", op5 = "); ! 92: write32h( sgl_value_3 ); ! 93: writec('\n'); ! 94: } ! 95: if ( halt_flg ) /* halt on error? */ ! 96: pipe7_halt( 1 ); ! 97: if ( loop_on_err ) ! 98: { ! 99: force_loop = TRUE; /* set the force loop flag */ ! 100: asm("jmp _pipe7_lp1"); /* and loop */ ! 101: }; ! 102: } ! 103: ! 104: ! 105: ! 106: ! 107: /**************************************************************************** ! 108: * Report an "BAD ACCUMULATOR AFTER THE EVENT" error ! 109: * ! 110: * Cycle: xx. EVT test xx. subtest xx. Bad final Accumulator. index = xx ! 111: * inst = LDF op1, DIVF op2, MULL3 op3,op4,op5, NEGF (int. overflow on MULL3) ! 112: * The NEGF should not have been executed. ! 113: * op1 = xxxxxxxx, final Acc. = xxxxxxxx, op3 = xxxxxxxx ! 114: * op2 = xxxxxxxx, expected = xxxxxxxx, op4 = xxxxxxxx, op5 = xxxxxxxx ! 115: ****************************************************************************/ ! 116: bad_pipe7_result() ! 117: { ! 118: errcnt++; /* bump the error count */ ! 119: if ( prt_error ) ! 120: { ! 121: print_pipe7_er(". Bad final Accumulator."); ! 122: writes("The NEGF should not have been executed.\n"); ! 123: writes("op1 = "); ! 124: write32h( dbl_value_1.m ); ! 125: writes(", final Acc. = "); ! 126: write32h( post_evt_acc.m ); ! 127: writes(", op3 = "); ! 128: write32h( sgl_value_1 ); ! 129: writes("\nop2 = "); ! 130: write32h( dbl_value_2.m ); ! 131: writes(", expected = "); ! 132: write32h( dbl_expected.m ); ! 133: writes(", op4 = "); ! 134: write32h( sgl_value_2 ); ! 135: writes(", op5 = "); ! 136: write32h( sgl_value_3 ); ! 137: writec('\n'); ! 138: } ! 139: if ( halt_flg ) /* halt on error? */ ! 140: pipe7_halt( 2 ); ! 141: if ( loop_on_err ) ! 142: { ! 143: force_loop = TRUE; /* set the force loop flag */ ! 144: asm("jmp _pipe7_lp1"); /* and loop */ ! 145: }; ! 146: } ! 147: ! 148: ! 149: ! 150: ! 151: ! 152: /**************************************************************************** ! 153: * Report an "FPP Queue apparently not cleared" error ! 154: * ! 155: * Cycle: xx. EVT test xx. subtest xx. too many instructions run. index = xx ! 156: * inst = LDF op1, DIVF op2, MULL3 op3,op4,op5, NEGF (int. overflow on MULL3) ! 157: * The NEGF should not have been executed but apparently was. ! 158: * op1 = xxxxxxxx, final Acc. = xxxxxxxx, op3 = xxxxxxxx ! 159: * op2 = xxxxxxxx, expected = xxxxxxxx, op4 = xxxxxxxx, op5 = xxxxxxxx ! 160: ****************************************************************************/ ! 161: pipe7_queue_er() ! 162: { ! 163: errcnt++; /* bump the error count */ ! 164: if ( prt_error ) ! 165: { ! 166: print_pipe7_er(". Fpp Queue not cleared."); ! 167: writes( ! 168: "The NEGF should not have been executed but apparently was.\n"); ! 169: writes("op1 = "); ! 170: write32h( dbl_value_1.m ); ! 171: writes(", final Acc. = "); ! 172: write32h( post_evt_acc.m ); ! 173: writes(", op3 = "); ! 174: write32h( sgl_value_1 ); ! 175: writes("\nop2 = "); ! 176: write32h( dbl_value_2.m ); ! 177: writes(", expected = "); ! 178: write32h( dbl_expected.m ); ! 179: writes(", op4 = "); ! 180: write32h( sgl_value_2 ); ! 181: writes(", op5 = "); ! 182: write32h( sgl_value_3 ); ! 183: writec('\n'); ! 184: } ! 185: if ( halt_flg ) /* halt on error? */ ! 186: pipe7_halt( 3 ); ! 187: if ( loop_on_err ) ! 188: { ! 189: force_loop = TRUE; /* set the force loop flag */ ! 190: asm("jmp _pipe7_lp1"); /* and loop */ ! 191: }; ! 192: } ! 193: ! 194: ! 195: ! 196: /**************************************************************************** ! 197: * print an error message of the form: ! 198: * ! 199: * Cycle: xx. EVT test xx. subtest xx. <your message here> index = xx ! 200: * inst = LDF op1, DIVF op2, MULL3 op3,op4,op5, NEGF (int. overflow on MULL3) ! 201: ****************************************************************************/ ! 202: print_pipe7_er( msg ) ! 203: char *msg; /* error message to print */ ! 204: { ! 205: if( errcnt == 1 ) /* 1st error? */ ! 206: writes(" \n"); /* start a new print line */ ! 207: writes("Cycle: "); ! 208: writed( cycle ); ! 209: writes(" EVT test "); ! 210: writed( test_no ); ! 211: writes(". subtest "); ! 212: writed( subtest ); ! 213: writes( msg ); /* print the error message */ ! 214: writes(" index = "); ! 215: writed( index ); ! 216: writes("\ninst = LDF op1, DIVF op2, MULL3 op3,op4,op5, NEGF"); ! 217: writes(" (int. overflow on MULL3)\n"); ! 218: } ! 219: ! 220: ! 221: ! 222: /**************************************************************************** ! 223: * Halt on Error routine ! 224: ****************************************************************************/ ! 225: pipe7_halt( code ) ! 226: int code; /* error code to halt with */ ! 227: { ! 228: err_code = code; ! 229: sgl_value_4 = dbl_ld_acc.m; ! 230: sgl_value_5 = dbl_value_1.m; ! 231: asm("movl _test_no,r0"); /* r0 = test number */ ! 232: asm("movl _subtest,r1"); /* r1 = subtest number */ ! 233: asm("movl _err_code,r2"); /* r2 = error code */ ! 234: asm("movl _cycle,r3"); /* r3 = cycle count */ ! 235: asm("movl _sgl_value_4,r4"); /* r4 = floating operand 1 */ ! 236: asm("movl _sgl_value_5,r5"); /* r5 = floating operand 2 */ ! 237: asm("movl _sgl_value_1,r6"); /* r6 = integer operand 1 */ ! 238: asm("movl _sgl_value_2,r7"); /* r7 = integer operand 2 */ ! 239: asm("movl _sgl_value_3,r8"); /* r8 = final int. value */ ! 240: if( code == 1 ) ! 241: asm("movl _index,r9"); /* r9 = data index */ ! 242: else { ! 243: sgl_value_6 = post_evt_acc.m; ! 244: sgl_value_7 = dbl_expected.m; ! 245: asm("movl _sgl_value_6,r9"); /* r9 = final accumulator */ ! 246: asm("movl _sgl_value_7,r10"); /* r10 = expected acc. */ ! 247: asm("movl _index,r11"); /* r11 = data index */ ! 248: } ! 249: asm("halt");; /* HALT ... */ ! 250: }
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.