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1.1 root 1:
2: #include "evt_defs.h"
3:
4: /*
5: ********************************************************************
6: *
7: * MONITOR FOR THE FPP RESERVED OPERAND EVENT TEST
8: *
9: * 22-Mar-85 : written
10: * 16-Jul-85 : changed to match "resop_tbl" changes
11: * 24-Jul-85 : don't run LOGF with the "no-fpp" firmware
12: *
13: ********************************************************************
14: */
15: resop_test()
16: {
17: event_msg = "Reserved Operand";
18: test_event = RESOP_CODE;
19: disable_mask = 0; /* don't disable any events */
20: evt_disabled = FALSE; /* expected event is enabled */
21: if( evt_inst ) { /* was the op-code specified? */
22: inst_index = get_resop_index( evt_inst );
23: if( inst_index < 0 ) {
24: if( (prt_hdrs) && (cycle == 1) ) { /* no reserved ops */
25: writes(
26: "There are no floating RESERVED OPERANDS with op-code" );
27: writeh( evt_inst ); /* print the ersatz op-code */
28: writec('\n');
29: error = TRUE; /* needed for line feed control */
30: }
31: } else
32: test_resop_inst(); /* test the instruction */
33: } else /* test all applicable op-codes */
34: for(inst_index=0; inst_index < size_resop_tbl; inst_index++)
35: if( (!no_fpp_wcs) ||
36: (resop_tbl[inst_index].inst_code != LOGF_OP_CODE) )
37: test_resop_inst();
38: }
39:
40:
41:
42: /*
43: ***************************************************************************
44: *
45: * Run the Reserved Operand Fault on one instruction
46: *
47: ***************************************************************************
48: */
49: test_resop_inst()
50: {
51: valid_test = TRUE; /* a test is being run */
52: op_code = resop_tbl[ inst_index ].inst_code;
53: op_name = resop_tbl[ inst_index ].name;
54: precision = resop_tbl[ inst_index ].precision;
55: no_ops = resop_tbl[ inst_index ].no_operands;
56: data_ptr = resop_tbl[ inst_index ].evt_data;
57: max_index = *resop_tbl[ inst_index ].evt_data_cnt;
58: if( precision == SGL ) {
59: sgl_op = TRUE;
60: acc_ld_size = SGL; /* use a sgl precision Acc. */
61: } else {
62: sgl_op = FALSE;
63: acc_ld_size = DBL; /* use a dbl precision Acc. */
64: }
65: if( (prt_hdrs) && (cycle == 1) ) {
66: if( (!evt_inst) && /* print a line feed if */
67: (op_code == SUBD_OP_CODE) ) /* the 1st line is full */
68: writes("\n ");
69: writes( op_name ); /* print the instruction's name */
70: }
71: test_inst();
72: }
73:
74:
75:
76: /*
77: ***************************************************************************
78: *
79: * GET THE INSTRUCTION TABLE INDEX FOR AN OP-CODE
80: *
81: * Given the op_code of an instruction, return the instruction's index in
82: * the reserved operand instruction table. Return a negative number if the
83: * op-code isn't in the table.
84: *
85: * LOGF won't give reserved operand events with the "no-fpp" WCS firmware
86: * so return a negative number if it is the test instruction.
87: *
88: **************************************************************************
89: */
90: get_resop_index( op_code )
91: {
92: int x;
93: x = 0;
94: while( (resop_tbl[x].inst_code != op_code) && (x < size_resop_tbl) )
95: x++;
96: if( x == size_resop_tbl )
97: x = -1;
98: if( (no_fpp_wcs) && (resop_tbl[inst_index].inst_code == LOGF_OP_CODE) )
99: x = -1; /* don't test LOGF w/ no-fpp WCS */
100: return( x );
101: }
102:
103:
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