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Power 6/32 Unix version 1.21

#include "evt_defs.h"

/*
 ********************************************************************
 *
 *	MONITOR FOR THE FPP RESERVED OPERAND EVENT TEST
 *
 *  22-Mar-85  : written
 *  16-Jul-85  : changed to match "resop_tbl" changes
 *  24-Jul-85  : don't run LOGF with the "no-fpp" firmware
 *
 ********************************************************************
*/
resop_test()
{
	event_msg = "Reserved Operand";
	test_event = RESOP_CODE;
	disable_mask = 0;		/* don't disable any events   */
	evt_disabled = FALSE;		/* expected event is enabled  */
	if( evt_inst ) {		/* was the op-code specified? */
	      inst_index = get_resop_index( evt_inst );
	      if( inst_index < 0 ) { 
	           if( (prt_hdrs) && (cycle == 1) ) {  /* no reserved ops */
			 writes(
		     "There are no floating RESERVED OPERANDS with op-code" );
			 writeh( evt_inst );	/* print the ersatz op-code */
			 writec('\n');
			 error = TRUE;	/* needed for line feed control */
		   }
	      } else 
		   test_resop_inst();	/* test the instruction */
	} else				/* test all applicable op-codes */
	      for(inst_index=0; inst_index < size_resop_tbl; inst_index++)
		   if( (!no_fpp_wcs) || 
		       (resop_tbl[inst_index].inst_code != LOGF_OP_CODE) )
			 test_resop_inst();
}
 


/*
 ***************************************************************************
 *
 *		Run the Reserved Operand Fault on one instruction
 *
 ***************************************************************************
*/
test_resop_inst()
{
	valid_test = TRUE;		/* a test is being run */
	op_code    =  resop_tbl[ inst_index ].inst_code;
	op_name    =  resop_tbl[ inst_index ].name;
	precision  =  resop_tbl[ inst_index ].precision;
	no_ops     =  resop_tbl[ inst_index ].no_operands;
	data_ptr   =  resop_tbl[ inst_index ].evt_data;
	max_index  = *resop_tbl[ inst_index ].evt_data_cnt;
	if( precision == SGL ) {
	      sgl_op = TRUE;
	      acc_ld_size = SGL;	/* use a sgl precision Acc. */
	} else {
	      sgl_op = FALSE;
	      acc_ld_size = DBL;	/* use a dbl precision Acc. */
	} 
	if( (prt_hdrs) && (cycle == 1) ) {
	      if( (!evt_inst) && 		/* print a line feed if   */
		  (op_code == SUBD_OP_CODE) ) 	/*   the 1st line is full */
		   writes("\n                       ");
	      writes( op_name );	/* print the instruction's name */
	}
	test_inst();
}



/*
 ***************************************************************************
 *
 *		GET THE INSTRUCTION TABLE INDEX FOR AN OP-CODE
 *
 *  Given the op_code of an instruction, return the instruction's index in
 *  the reserved operand instruction table. Return a negative number if the
 *  op-code isn't in the table.
 *
 *  LOGF won't give reserved operand events with the "no-fpp" WCS firmware
 *  so return a negative number if it is the test instruction.
 *
 **************************************************************************
*/
get_resop_index( op_code )
{
int x;
	x = 0;
	while( (resop_tbl[x].inst_code != op_code) && (x < size_resop_tbl) )
	     x++;
	if( x == size_resop_tbl ) 
	     x = -1;
	if( (no_fpp_wcs) && (resop_tbl[inst_index].inst_code == LOGF_OP_CODE) )
	     x = -1;			/* don't test LOGF w/ no-fpp WCS */
	return( x );
}

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