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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / fpevent|
Return to resop_test.lst CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / fpevent |
Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 00000218 * .text
4 00000000 .align 1
5 00000000 .globl _resop_test
6 00000000 _resop_test:
7 0000E02C 0000 .word L381
8 0000E02E #
9 0000E02E # #include "evt_defs.h"
10 0000E02E #
11 0000E02E # /*
12 0000E02E # ********************************************************************
13 0000E02E # *
14 0000E02E # * MONITOR FOR THE FPP RESERVED OPERAND EVENT TEST
15 0000E02E # *
16 0000E02E # * 22-Mar-85 : written
17 0000E02E # * 16-Jul-85 : changed to match "resop_tbl" changes
18 0000E02E # * 24-Jul-85 : don't run LOGF with the "no-fpp" firmware
19 0000E02E # *
20 0000E02E # ********************************************************************
21 0000E02E # */
22 0000E02E # resop_test()
23 0000E02E # {
24 0000E02E 13 00c4 jbr L383
25 0000E031 L384:
26 0000E031 # event_msg = "Reserved Operand";
27 0000E031 .data 1
28 00000218 * L385:
29 00000218 * 5265736572766564204F70657 .ascii "Reserved Operand\0"
2616E6400
30 00000229 * .text
31 0000E031 0d 8f00000218 effffffff0 movl $L385,_event_msg
32 0000E03C # test_event = RESOP_CODE;
33 0000E03C 0d 2d efffffffe9 movl $45,_test_event
34 0000E043 # disable_mask = 0; /* don't disable any events */
35 0000E043 4b efffffffe3 clrw _disable_mask
36 0000E049 # evt_disabled = FALSE; /* expected event is enabled */
37 0000E049 4d efffffffdd clrl _evt_disabled
38 0000E04F # if( evt_inst ) { /* was the op-code specified? */
39 0000E04F 5d efffffffd7 tstl _evt_inst
40 0000E055 31 62 jeql L386
41 0000E057 # inst_index = get_resop_index( evt_inst );
42 0000E057 dd efffffffcf pushl _evt_inst
43 0000E05D fe 08 ef00000182 callf $8,_get_resop_index
44 0000E064 0d 50 efffffffc1 movl r0,_inst_index
45 0000E06B # if( inst_index < 0 ) {
46 0000E06B 5d efffffffbb tstl _inst_index
47 0000E071 81 3d jgeq L388
48 0000E073 # if( (prt_hdrs) && (cycle == 1) ) { /* no reserved ops */
49 0000E073 5d efffffffb3 tstl _prt_hdrs
50 0000E079 31 33 jeql L389
51 0000E07B 1d efffffffab 01 cmpl _cycle,$1
52 0000E082 21 2a jneq L389
53 0000E084 # writes(
54 0000E084 # "There are no floating RESERVED OPERANDS with op-code" );
55 0000E084 .data 1
56 00000229 * L391:
57 00000229 * 546865726520617265206E6F2 .ascii "There are no floating RESERVED OPERANDS with op-code\0"
0666C6F6174696E6720524553
4552564544204F504552414E4
4532077697468206F702D636F
646500
58 0000025e * .text
59 0000E084 dd 8f00000229 pushl $L391
60 0000E08A fe 08 efffffff9b callf $8,_writes
61 0000E091 # writeh( evt_inst ); /* print the ersatz op-code */
62 0000E091 dd efffffff95 pushl _evt_inst
63 0000E097 fe 08 efffffff8e callf $8,_writeh
64 0000E09E # writec('\n');
65 0000E09E dd 0a pushl $10
66 0000E0A0 fe 08 efffffff85 callf $8,_writec
67 0000E0A7 # error = TRUE; /* needed for line feed control */
68 0000E0A7 0d 01 efffffff7e movl $1,_error
69 0000E0AE # }
70 0000E0AE # } else
71 0000E0AE L389:
72 0000E0AE 11 07 jbr L394
73 0000E0B0 L388:
74 0000E0B0 # test_resop_inst(); /* test the instruction */
75 0000E0B0 fe 04 ef00000041 callf $4,_test_resop_inst
76 0000E0B7 L394:
77 0000E0B7 # } else /* test all applicable op-codes */
78 0000E0B7 11 3b jbr L396
79 0000E0B9 L386:
80 0000E0B9 # for(inst_index=0; inst_index < size_resop_tbl; inst_index++)
81 0000E0B9 4d efffffff6d clrl _inst_index
82 0000E0BF L399:
83 0000E0BF 1d efffffff67 efffffff62 cmpl _inst_index,_size_resop_tbl
84 0000E0CA 81 28 jgeq L398
85 0000E0CC # if( (!no_fpp_wcs) ||
86 0000E0CC # (resop_tbl[inst_index].inst_code != LOGF_OP_CODE) )
87 0000E0CC 5d efffffff5a tstl _no_fpp_wcs
88 0000E0D2 31 11 jeql L9999
89 0000E0D4 5c 18 efffffff51 50 mull3 $24,_inst_index,r0
90 0000E0DC 1d e000000000 35 cmpl _resop_tbl(r0),$53
91 0000E0E3 31 07 jeql L400
92 0000E0E5 L9999:
93 0000E0E5 # test_resop_inst();
94 0000E0E5 fe 04 ef0000000c callf $4,_test_resop_inst
95 0000E0EC # }
96 0000E0EC L400:
97 0000E0EC L397:
98 0000E0EC 6d efffffff3a incl _inst_index
99 0000E0F2 11 cb jbr L399
100 0000E0F4 L398:
101 0000E0F4 L396:
102 0000E0F4 40 ret#2
103 0000E0F5 .set L381,0x0
104 0000E0F5 L383:
105 0000E0F5 13 ff39 jbr L384
106 0000E0F8 .data
107 00000218 * .text
108 0000E0F8 .align 1
109 0000E0F8 .globl _test_resop_inst
110 0000E0F8 _test_resop_inst:
111 0000E0F8 0000 .word L401
112 0000E0FA #
113 0000E0FA #
114 0000E0FA #
115 0000E0FA # /*
116 0000E0FA # ***************************************************************************
117 0000E0FA # *
118 0000E0FA # * Run the Reserved Operand Fault on one instruction
119 0000E0FA # *
120 0000E0FA # ***************************************************************************
121 0000E0FA # */
122 0000E0FA # test_resop_inst()
123 0000E0FA # {
124 0000E0FA 13 00e5 jbr L403
125 0000E0FD L404:
126 0000E0FD # valid_test = TRUE; /* a test is being run */
127 0000E0FD 0d 01 efffffff28 movl $1,_valid_test
128 0000E104 # op_code = resop_tbl[ inst_index ].inst_code;
129 0000E104 5c 18 efffffff21 50 mull3 $24,_inst_index,r0
130 0000E10C 0d e000000000 efffffff15 movl _resop_tbl(r0),_op_code
131 0000E117 # op_name = resop_tbl[ inst_index ].name;
132 0000E117 5c 18 efffffff0e 50 mull3 $24,_inst_index,r0
133 0000E11F 0d e000000004 efffffff02 movl _resop_tbl+4(r0),_op_name
134 0000E12A # precision = resop_tbl[ inst_index ].precision;
135 0000E12A 5c 18 effffffefb 50 mull3 $24,_inst_index,r0
136 0000E132 0d e00000000c effffffeef movl _resop_tbl+12(r0),_precision
137 0000E13D # no_ops = resop_tbl[ inst_index ].no_operands;
138 0000E13D 5c 18 effffffee8 50 mull3 $24,_inst_index,r0
139 0000E145 0d e000000008 effffffedc movl _resop_tbl+8(r0),_no_ops
140 0000E150 # data_ptr = resop_tbl[ inst_index ].evt_data;
141 0000E150 5c 18 effffffed5 50 mull3 $24,_inst_index,r0
142 0000E158 0d e000000010 effffffec9 movl _resop_tbl+16(r0),_data_ptr
143 0000E163 # max_index = *resop_tbl[ inst_index ].evt_data_cnt;
144 0000E163 5c 18 effffffec2 50 mull3 $24,_inst_index,r0
145 0000E16B 0d f000000014 effffffeb6 movl *_resop_tbl+20(r0),_max_index
146 0000E176 # if( precision == SGL ) {
147 0000E176 1d effffffeb0 01 cmpl _precision,$1
148 0000E17D 21 10 jneq L405
149 0000E17F # sgl_op = TRUE;
150 0000E17F 0d 01 effffffea6 movl $1,_sgl_op
151 0000E186 # acc_ld_size = SGL; /* use a sgl precision Acc. */
152 0000E186 0d 01 effffffe9f movl $1,_acc_ld_size
153 0000E18D # } else {
154 0000E18D 11 0d jbr L406
155 0000E18F L405:
156 0000E18F # sgl_op = FALSE;
157 0000E18F 4d effffffe97 clrl _sgl_op
158 0000E195 # acc_ld_size = DBL; /* use a dbl precision Acc. */
159 0000E195 0d 02 effffffe90 movl $2,_acc_ld_size
160 0000E19C # }
161 0000E19C L406:
162 0000E19C # if( (prt_hdrs) && (cycle == 1) ) {
163 0000E19C 5d effffffe8a tstl _prt_hdrs
164 0000E1A2 31 36 jeql L407
165 0000E1A4 1d effffffe82 01 cmpl _cycle,$1
166 0000E1AB 21 2d jneq L407
167 0000E1AD # if( (!evt_inst) && /* print a line feed if */
168 0000E1AD # (op_code == SUBD_OP_CODE) ) /* the 1st line is full */
169 0000E1AD 5d effffffe79 tstl _evt_inst
170 0000E1B3 21 18 jneq L408
171 0000E1B5 1d effffffe71 8900d7 cmpl _op_code,$215
172 0000E1BE 21 0d jneq L408
173 0000E1C0 # writes("\n ");
174 0000E1C0 .data 1
175 0000025e * L409:
176 0000025e * 0A20202020202020202020202 .ascii "\12 \0"
0202020202020202020202000
177 00000277 * .text
178 0000E1C0 dd 8f0000025e pushl $L409
179 0000E1C6 fe 08 effffffe5f callf $8,_writes
180 0000E1CD # writes( op_name ); /* print the instruction's name */
181 0000E1CD L408:
182 0000E1CD dd effffffe59 pushl _op_name
183 0000E1D3 fe 08 effffffe52 callf $8,_writes
184 0000E1DA # }
185 0000E1DA # test_inst();
186 0000E1DA L407:
187 0000E1DA fe 04 effffffe4b callf $4,_test_inst
188 0000E1E1 # }
189 0000E1E1 40 ret#2
190 0000E1E2 .set L401,0x0
191 0000E1E2 L403:
192 0000E1E2 13 ff18 jbr L404
193 0000E1E5 .data
194 00000218 * .text
195 0000E1E5 00 .align 1
196 0000E1E6 .globl _get_resop_index
197 0000E1E6 _get_resop_index:
198 0000E1E6 0000 .word L411
199 0000E1E8 #
200 0000E1E8 #
201 0000E1E8 #
202 0000E1E8 # /*
203 0000E1E8 # ***************************************************************************
204 0000E1E8 # *
205 0000E1E8 # * GET THE INSTRUCTION TABLE INDEX FOR AN OP-CODE
206 0000E1E8 # *
207 0000E1E8 # * Given the op_code of an instruction, return the instruction's index in
208 0000E1E8 # * the reserved operand instruction table. Return a negative number if the
209 0000E1E8 # * op-code isn't in the table.
210 0000E1E8 # *
211 0000E1E8 # * LOGF won't give reserved operand events with the "no-fpp" WCS firmware
212 0000E1E8 # * so return a negative number if it is the test instruction.
213 0000E1E8 # *
214 0000E1E8 # **************************************************************************
215 0000E1E8 # */
216 0000E1E8 # get_resop_index( op_code )
217 0000E1E8 # {
218 0000E1E8 11 52 jbr L413
219 0000E1EA L414:
220 0000E1EA # int x;
221 0000E1EA # x = 0;
222 0000E1EA 4d adc8 clrl -56(fp)
223 0000E1ED # while( (resop_tbl[x].inst_code != op_code) && (x < size_resop_tbl) )
224 0000E1ED L415:
225 0000E1ED 5c 18 adc8 50 mull3 $24,-56(fp),r0
226 0000E1F2 1d e000000000 ad04 cmpl _resop_tbl(r0),4(fp)
227 0000E1FA 31 0f jeql L416
228 0000E1FC 1d adc8 effffffe28 cmpl -56(fp),_size_resop_tbl
229 0000E204 81 05 jgeq L416
230 0000E206 # x++;
231 0000E206 6d adc8 incl -56(fp)
232 0000E209 11 e2 jbr L415
233 0000E20B L416:
234 0000E20B # if( x == size_resop_tbl )
235 0000E20B 1d adc8 effffffe19 cmpl -56(fp),_size_resop_tbl
236 0000E213 21 04 jneq L417
237 0000E215 # x = -1;
238 0000E215 ec 01 adc8 mnegl $1,-56(fp)
239 0000E219 # if( (no_fpp_wcs) && (resop_tbl[inst_index].inst_code == LOGF_OP_CODE) )
240 0000E219 L417:
241 0000E219 5d effffffe0d tstl _no_fpp_wcs
242 0000E21F 31 15 jeql L418
243 0000E221 5c 18 effffffe04 50 mull3 $24,_inst_index,r0
244 0000E229 1d e000000000 35 cmpl _resop_tbl(r0),$53
245 0000E230 21 04 jneq L418
246 0000E232 # x = -1; /* don't test LOGF w/ no-fpp WCS */
247 0000E232 ec 01 adc8 mnegl $1,-56(fp)
248 0000E236 # return( x );
249 0000E236 L418:
250 0000E236 0d adc8 50 movl -56(fp),r0
251 0000E23A 40 ret#1
252 0000E23B # }
253 0000E23B 40 ret#1
254 0000E23C .set L411,0x0
255 0000E23C L413:
256 0000E23C 3c 38 5d 5e subl3 $56,fp,sp
257 0000E240 11 a8 jbr L414
258 0000E242 .data
259 00000218 * #
260 00000218 * #
260 00000218 * #
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