File:  [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / fpevent / test_0_ops.s
Revision 1.1.1.1 (vendor branch): download - view: text, annotated - select for diffs
Sun Jul 28 12:30:17 2019 UTC (7 years ago) by root
Branches: bsd, MAIN
CVS tags: v121, HEAD
Power 6/32 Unix version 1.21



# ***************************************************************************
# *
# *		Test an instruction that has no operands
# *
# *  Only the 1 byte instruction and some NOPs will go into the code buffer.
# *
# *  30-May-85 : added pipelined tests
# *  22-Jul-85 : don't run pipeline 2 test w/ emulated instructions
# ***************************************************************************
	.text
	.align	1
	.globl	_test_0_ops
_test_0_ops:
	.word	0
/*
 * Set the sizes for loading and for storing the accumulator
*/
	cmpl	$SGL,_precision
	bneq	1f
	movl	$SGL,_acc_ld_size		/* set ACC. load size      */
	movl	$SGL,_acc_st_size		/* set ACC. store size     */
	jmp	2f
1:
	movl	$DBL,_acc_ld_size		/* set ACC. load size      */
	movl	$DBL,_acc_st_size		/* set ACC. store size     */
	cmpl	_op_code,$CVDF_OP_CODE		/* "cvdf" instruction?     */
	bneq	2f
	movl	$SGL,_acc_st_size		/* store sgl acc. for cvdf */
2:
	callf	$4,_test_0_no_pipe		/* test w/o pipelineing    */
	callf	$4,_test_0_pipe1		/* test pipeline test #1   */
	cmpl	_test_event,$FPM_CODE		/* Is this the FPM test?   */
	beql	1f				/* don't run pipe #2 w/ FPM */
	callf	$4,_test_0_pipe2		/* test pipeline test #2   */
1:	ret					/* return                  */




# ***************************************************************************
# *
# *   TEST A NO OPERAND INSTRUCTION WITH NO FPP INSTRUCTION IN FRONT OF IT
# *
# ***************************************************************************
	.text
	.align	1
	.globl	_test_0_no_pipe
_test_0_no_pipe:
	.word	0
	clrl	_pipe_test			/* reset the pipe-test flag */
	callf	$4,_pack_inst			/* pack the instr's code   */
	pushl	$_load_regs			/* buffer for loading regs */
	callf	$8,_fill_reg_buf		/* fill the buffer         */
	pushl	$_exp_regs			/* expected reg values     */
	callf	$8,_fill_reg_buf		/* fill the buffer         */
/*
 * test the instruction 
*/
	clrl	_index
3:
	mull3	$4,_index,r0			/* get longword offset     */
	movl	*_data_ptr[r0],_dbl_ld_acc	/* get load data's MSW     */
	incl	r0
	movl	*_data_ptr[r0],_dbl_ld_acc+4 	/* get load data's LSW     */
2:
	callf	$4,_run_code			/* execute the instruction */
	tstl	_force_loop
	bneq	2b				/* loop on an error        */
	cmpl	_index,_max_index		/* last data pattern?      */
	bgeq	1f
	incl	_index				/* bump the index          */
	jmp	3b				/* test next data pattern  */
1:
	ret					/* return to test_code     */




# ***************************************************************************
# *
# *   TEST A NO OPERAND INSTRUCTION WITH A LOAD INSTRUCION IN FRONT OF IT
# *
# ***************************************************************************
	.text
	.align	1
	.globl	_test_0_pipe1
_test_0_pipe1:
	.word	0
	movl	$1,_pipe_test			/* set the pipe_test flag  */
	movl	$0x62,_addr_code_p1		/* set the addr mode       */
	cmpl	$DBL,_acc_ld_size		/* DBL or SGL ACC?         */
	beql	1f
	movl	$LDF_OP_CODE,_pipe_inst1	/* pipe inst = load single */
	brb	2f
1:	movl	$LDD_OP_CODE,_pipe_inst1	/* pipe inst = load double */
2:
	callf	$4,_pack_inst			/* pack the instr's code   */
	pushl	$_load_regs			/* buffer for loading regs */
	callf	$8,_fill_reg_buf		/* fill the buffer         */
	pushl	$_exp_regs			/* expected reg values     */
	callf	$8,_fill_reg_buf		/* fill the buffer         */
	moval	_dbl_ld_acc,_load_regs+8	/* R2 points to the data   */
	moval	_dbl_ld_acc,_exp_regs+8		/* R2 points to the data   */
/*
 * test the instruction 
*/
	clrl	_index
3:
	mull3	$4,_index,r0			/* get longword offset     */
	movl	*_data_ptr[r0],_dbl_ld_acc	/* get load data's MSW     */
	incl	r0
	movl	*_data_ptr[r0],_dbl_ld_acc+4 	/* get load data's LSW     */
2:
	callf	$4,_run_code			/* execute the instruction */
	tstl	_force_loop
	bneq	2b				/* loop on an error        */
	cmpl	_index,_max_index		/* last data pattern?      */
	bgeq	1f
	incl	_index				/* bump the index          */
	jmp	3b				/* test next data pattern  */
1:
	clrl	_pipe_test			/* reset the pipe-test flag */
	ret					/* return to test_code     */




# ***************************************************************************
# *
# *   TEST A NO OPERAND INSTRUCTION WITH AN ADD INSTRUCION IN FRONT OF IT
# *
# ***************************************************************************
	.text
	.align	1
	.globl	_test_0_pipe2
_test_0_pipe2:
	.word	0
	movl	$2,_pipe_test			/* set the pipe_test flag */
	movl	$0x62,_addr_code_p1		/* set the addr mode      */
	cmpl	$DBL,_acc_ld_size		/* DBL or SGL ACC?        */
	beql	1f
	movl	$ADDF_OP_CODE,_pipe_inst1	/* pipe inst = add single */
	brb	2f
1:	movl	$ADDD_OP_CODE,_pipe_inst1	/* pipe inst = add double */
2:
	callf	$4,_pack_inst			/* pack the instr's code  */
	pushl	$_load_regs			/* buffer for loading regs */
	callf	$8,_fill_reg_buf		/* fill the buffer        */
	pushl	$_exp_regs			/* expected reg values    */
	callf	$8,_fill_reg_buf		/* fill the buffer        */
	moval	_dbl_ld_acc,_load_regs+8	/* R2 points to the data  */
	moval	_dbl_ld_acc,_exp_regs+8		/* R2 points to the data  */
/*
 * test the instruction 
*/
	clrl	_index
3:
	mull3	$4,_index,r0			/* get longword offset     */
	movl	*_data_ptr[r0],_dbl_ld_acc	/* get load data's MSW     */
	incl	r0
	movl	*_data_ptr[r0],_dbl_ld_acc+4 	/* get load data's LSW     */
2:
	callf	$4,_run_code			/* execute the instruction */
	tstl	_force_loop
	bneq	2b				/* loop on an error        */
	cmpl	_index,_max_index		/* last data pattern?      */
	bgeq	1f
	incl	_index				/* bump the index          */
	jmp	3b				/* test next data pattern  */
1:
	clrl	_pipe_test			/* reset the pipe-test flag */
	ret					/* return to test_code     */




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