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Power 6/32 Unix version 1.21

#include "evt_defs.h"

/*
 ********************************************************************
 *
 *	MONITOR FOR THE FPP UNDERFLOW EVENT TEST
 *
 *  25-Mar-85  JJM: written
 *  29-Mar-85  JJM: mauled the beast for CVDF (cvdf has ovfl but no undfl)
 *
 ********************************************************************
*/
undfl_test()
{
	event_msg = "Underflow";
	test_event = ARITH_CODE;	/* expect an arithmetic fault */
	exp_code = FLT_UNDFL_CODE;	/*  -specificly floating underflow */
	if( evt_inst )			/* was the op-code specified? */
	{
	      inst_index = get_ovfl_index( evt_inst );
	      if( (inst_index < 0) || 
		  (ovfl_tbl[inst_index].undfl_data == null_data) )
	      {
	            if( (prt_hdrs) && (cycle == 1) ) 
		    {
			 writes(
			  "There are no UNDERFLOW faults with op-code ");
			 writeh( evt_inst );	/* print the ersatz op-code */
			 writec('\n');
			 error = TRUE;		/* needed for line feeds */
		    }
	      } else 
		    test_undfl_inst();		/* test the instruction */
	} else				/* test all applicable op-codes */
	      for(inst_index=0; inst_index < size_ovfl_tbl; inst_index++)
	      {
		    data_ptr   =  ovfl_tbl[ inst_index ].undfl_data;
		    if( data_ptr != null_data )
		          test_undfl_inst();	/* test the instruction */
	      }
}
 


/*
 ********************************************************************
 *
 *	TEST THE UNDERFLOW EVENT ON AN INSTRUCTION 
 *
 ********************************************************************
*/
test_undfl_inst()
{
	valid_test = TRUE;		/* a test is being run */
	op_code    =  ovfl_tbl[ inst_index ].inst_code;
	op_name    =  ovfl_tbl[ inst_index ].name;
	no_ops     =  ovfl_tbl[ inst_index ].no_operands;
	precision  =  ovfl_tbl[ inst_index ].precision;
	data_ptr   =  ovfl_tbl[ inst_index ].undfl_data;
	max_index  = *ovfl_tbl[ inst_index ].undfl_cnt;
	if( precision == SGL ) {
	     sgl_op = TRUE;
	     acc_ld_size = SGL;	/* use a sgl precision Acc. */
	} else {
	     sgl_op = FALSE;
	     acc_ld_size = DBL;	/* use a dbl precision Acc. */
	}
	if( (prt_hdrs) && (cycle == 1) ) 
	     writes( op_name );
	disable_mask = 0;		/* all events enabled   */
	evt_disabled = FALSE;
	test_inst();			/* test the instruction */
	disable_mask = PSL_EN_UNDFL;	/* disable underflows   */
	evt_disabled = TRUE;	
	test_inst();			/* test the instruction */
}

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