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Power 6/32 Unix version 1.2b

/*	privileged registers constants (addresses)			*/



	.set	SBR,0			/*system base register		*/
	.set	SLR,1			/*system length reg		*/
	.set	P0BR,2			/*p0 base reg			*/
	.set	P0LR,3			/*p0 length reg			*/
	.set	P1BR,4			/*p1 base reg			*/
	.set	P1LR,5			/*p1 length reg			*/
	.set	P2BR,6			/*p2 base reg			*/
	.set	P2LR,7			/*p2 length reg			*/
	.set	IPL,8			/*int priority level reg	*/
	.set	MME,9			/*memory mgmt enable reg	*/
	.set	TBIA,10			/*trans buf invalidate all	*/
					/*entries			*/
	.set	TBIS,11			/*trans buf invalidate single	*/
					/*entry				*/
	.set	DCK,12			/*data cache key		*/
	.set	CCK,13			/*code cache key		*/
	.set	PCBB,14			/*process control block base	*/
	.set	ISP,15			/*interrupt stack pointer	*/
	.set	PSL,22			/* program status longword	*/
	.set	SIRR,16			/*software int request reg	*/
	.set	SISR,17			/*software int summary reg	*/
	.set	SCBB,18			/*system control block base reg	*/
	.set	KSP,19			/*kernel stack pointer reg	*/
	.set	USP,20			/*user stack pointer		*/
	.set	P1CC,21			/*purge (invalidate) one page	*/
					/*of code cache			*/
	.set	PACC,23			/*purge (invalidate) all pages	*/
					/*of process in code cache	*/
	.set	P1DC,24			/*purge one page of data cache	*/
	.set	PADC,25			/*purge all the pages of 	*/
					/*process in data cache		*/
	.set	HISR,26			/* Hardware interrupt summary reg  */

	

	.set  	PSL_C,0x00000001	/* carry bit */
	.set  	PSL_V,0x00000002	/* overflow bit */
	.set  	PSL_Z,0x00000004	/* zero bit */
	.set  	Z,0x00000004
	.set  	PSL_N,0x00000008	/* negative bit */
	.set  	PSL_T,0x00000010	/* trace enable bit */
	.set  	PSL_I,0x00000020	/* integer overflow enable bit */
	.set  	PSL_IPL,0x001f0000	/* interrupt priority level */
	.set  	PSL_MOD,0x01000000	/* mode = 1 means user*/
	.set  	PSL_IS,0x04000000	/* interrupt stack */
	.set  	PSL_TP,0x40000000	/* trace pending */

	.set  	PG_V,0x80000000
	.set  	PG_PROT,0x78000000
	.set  	PG_M,0x04000000
	.set  	PG_USED,0x02000000
	.set  	PG_NC,0x01000000
	.set  	PG_PFNUM,0x003fffff

	.set  	PG_NOACC,0
	.set  	PG_KR,0x40000000
	.set  	PG_KW,0x60000000
	.set  	PG_URKR,0x50000000
	.set  	PG_URKW,0x70000000
	.set  	PG_UW,0x78000000

/*	PCB offsets & diagnostic extension to pcb			*/

	
	.set	PCB_KSP,	0
	.set	PCB_USP,	4
	.set	PCB_R0,		8
	.set	PCB_R1,		12
	.set	PCB_R2,		16
	.set	PCB_R3,		20
	.set	PCB_R4,		24
	.set	PCB_R5,		28
	.set	PCB_R6,		32
	.set	PCB_R7,		36
	.set	PCB_R8,		40
	.set	PCB_R9,		44
	.set	PCB_R10,	48
	.set	PCB_R11,	52
	.set	PCB_R12,	56
	.set	PCB_R13,	60
	.set	PCB_PC,		64
	.set	PCB_PSL,	68
	.set	PCB_P0BR,	72
	.set	PCB_P0LR,	76
	.set	PCB_P1BR,	80
	.set	PCB_P1LR,	84
	.set	PCB_P2BR,	88
	.set	PCB_P2LR,	92
	.set	PCB_STAT,	96	/*process status,statistics,id,etc*/



/*	fundamental constants						*/


	.set  	NBPG,1024
	.set  	PGOFSET,(NBPG-1)	/* byte offset into page */
	.set  	PGSHIFT,10		/* LOG2(NBPG) */
	.set 	HIGH,0x1f
	.set	PAGE,1024


/*	SCB offsets							*/

	.set	PFVEC,4			/*power fail			*/
	.set	CLOCKVEC,28		/*hard clock vector		*/
	.set	CRVEC,40		/*console receive		*/
	.set	CXVEC,44		/*console transmit		*/
	.set	SIVEC1,120		/*software int vec #1		*/
					/*for 2,3,..15, sub 4,8,.. 56	*/
					/*from SIVEC1			*/	
	.set	BEVEC,128		/*bus error 			*/	
	.set	SYSVEC,172		/*system call (kcall)		*/
	.set	PINSTVEC,176		/*privileged instruction fault	*/
	.set	ROVEC,180		/*reserved operand fault	*/
	.set	RAVEC,184		/*reserved addressing fault	*/
	.set	PROTVEC,188		/*access control violation	*/
	.set	TRANSVEC,192		/*translation fault vector	*/
	.set	KSPVEC,196		/*kernel stack not valid vector	*/
	.set	TRACEVEC,200		/*trace vector			*/
	.set	BPTVEC,204		/*break point fault		*/
	.set	ARITHVEC,208		/*arithmetic trap		*/
	.set	ALIGNVEC,212		/*alignment vector		*/	
	.set	IO14VEC,256		/*io vector, ipl #14		*/
	.set	IO15VEC,320		/*io vector, ipl #15		*/
	.set	IO16VEC,384		/*io vector, ipl #16		*/
	.set	IO17VEC,448		/*io vector, ipl #17		*/

/*	SPT (system page table) offsets					*/

	.set	SCBPTE,8		/*system control block pte offset*/
	.set	BUFPTE,12		/*buffer pte offset		*/
	.set	ISPTE,16		/*interrupt stack page 0	*/
	.set	IS1PTE,20		/*interrupt stack page 1	*/
	.set	SPTPTE,20		/*system page table page 1	*/
	.set	SPT1PTE,20		/*system page table page 2	*/
	.set	IOMAPPTE,24		/*io map			*/
	.set	PCBPTE,28		/*process control blocks pte	*/
	.set	U0P0PTE,32		/*U0 p0pt pte			*/
	.set	U0P1PTE,36		/*U0 p1pt pte			*/
	.set	U0P2PTE,40		/*U0 p2pt pte			*/
	.set	U1P0PTE,44
	.set	U1P1PTE,48
	.set	U1P2PTE,52
	.set	U2P0PTE,56
	.set	U2P1PTE,60
	.set	U2P2PTE,64
	.set	U3P0PTE,68
	.set	U3P1PTE,72
	.set	U3P2PTE,76
	.set	U4P0PTE,80
	.set	U4P1PTE,84
	.set	U4P2PTE,88
	.set	U5P0PTE,92
	.set	U5P1PTE,96
	.set	U5P2PTE,100
	.set	U6P0PTE,104
	.set	U6P1PTE,108
	.set	U6P2PTE,112
	.set	U7P0PTE,116		/*U7 p0pt pte			*/
	.set	U7P1PTE,120		/*U7 p1pt pte			*/
	.set	U7P2PTE,124		/*U7 p2pt pte			*/
	.set	IOB0PTE,128		/*io buffer 0 pte		*/
	.set	IOB1PTE,132
	.set	IOB2PTE,136
	.set	IOB3PTE,140
	.set	IOB4PTE,144
	.set	IOB5PTE,148
	.set	IOB6PTE,152
	.set	IOB7PTE,156		/*io buffer 7 pte		*/


/*	trap.h	4.6	81/03/03	*/


	.set  	RESADFLT,0		/* reserved addressing fault */
	.set  	PRIVINFLT,1		/* privileged instruction fault */
	.set  	RESOPFLT,2		/* reserved operand fault */
	.set  	BPTFLT,3		/* bpt instruction fault */
	.set  	ALIGNFLT,4		/* alignment fault */
	.set  	SYSCALL,5		/* kcall instruction (syscall trap) */
	.set  	ARITHTRAP,6		/* arithmetic trap */
	.set  	PROTFLT,7		/* protection fault */
	.set  	TRCTRAP,8		/* trace trap */
	.set  	TRANSFLT,9		/* translation not valid fault */
	.set	DONE,255
	.set	CPMDCB,21
	.set	ISTK,0x10000
	.globl	_rtclk	
	.set	SYSP,0x20000
	.set	SSP,0x30000
	.set	CPCONS,0x01
	.set	CPWRITE,0x01
	.set	CPREAD,0x02
	.set	INTMR,0x04
	.set	BFSZ,0x02
	.set	CNT,0xfffffff
	.set	CLKCNT,0x05020


/* Console interval timer test */


_rtclk:	movl	$0x00,r1
	movab	bitbl,r0
lvec:	movl	r0,_scb[r1]
	movl	r1,bitbl[r1]
	addl2	$4,r0
	addl2	$1,r1
	cmpl	$0xff,r1
	jneq	lvec
	movl	$60,msgcnt	/* load message count of sixty */
	movl	$0,tikcnt	/* clear tick counter */
	mtpr	$0,$PSL		/* setup for user stack */
	mtpr	$_scb,$SCBB	/* initialize SCBB */
	mtpr	$ISTK,$ISP	/* initialize interrupt stack pointer */
	movl	$ISTK,sp	/* initialize s ystem stack pointer */
	movab	bdint,_scb + CLOCKVEC	/* trap for unexpected interrupt */
	mtpr	$0x18,$IPL	/* lower the ipl allow random interrupts */
	movb	$INTMR,CPDCB	/* set up cpdcb to program interval timer */
	movb	$CPWRITE,CPDCB + 1 
	movw	$CLKCNT,CPDCB + 2
	movl	$CNT,r2		/* load count value for timeout */
	movl	$CPDCB,r10	/* load address of device control block */
	andl2	$0xffffff,r10	/* mask off garbage */
	movab	gdint,_scb + CLOCKVEC	/* address of good interrupt handler */
	movab	txvec,_scb + CXVEC	/* handle transmit interrupts */
	mtpr	r10,$CPMDCB	/* send xmit interrupt to cp */
	mtpr	$0x17,$IPL	/* lower the ipl allow  clock interrupts */
loop:	cmpl	$30,tikcnt	/* check its time to transmit mesg */
	jgtr	loop2		/* not ready continue */
	mtpr	$0x18,$IPL	/* do not allow ticks during transmit */
	cmpl	$60,msgcnt
	jneq	nfirst		/* skip if not the first message */
	pushab	nl		/* start on a new line	*/
	callf	$8,_writes	/* call print function */
nfirst:	andl3	$1,msgcnt,r0	/* check for tick or tock */
	jneq	ptock		/* generate tock */
	pushab	tick
	jmp	pmesg
ptock:	pushab	tock
pmesg:	callf	$8,_writes	/* call print function */
	movl	$0,tikcnt	/* clear tick counter */
	movl	$CNT,r2		/* reload rescue timer */
	decl	msgcnt		/* decrement message counter */
	jeql	gdhlt
	cmpl	$0x32,msgcnt	/* check half done */
	jgtr	lower		/* if yes drop IPL to 0x13 */
	mtpr	$0x17,$IPL	/* lower IPL allow another tick */
	jmp	loop2		/* continue */
lower:	mtpr	$0x13,$IPL	/* lower IPL to 0x13 */
loop2:	decl	r2		/* decrement count register */
	jneq	loop		/* not zero then loop */
	movl	$0x02,r0	/* error - expected interrupt did not occur */
	halt

bdint:	movl	$0x01,r0	/* error - unexpected interrupt occurred */
	halt
txvec:	rei
gdint:	mtpr	$CPDCB,$PDCS	/* check done bit */
	movw	CPDCB,r1	/* check done bit */
	andl2	$0x08000,r1	/* mask off don't care bits */
	jneq	gd1		/* not zero jmp */
	movl	$0x03,r0	/* error code done bit not set */
	halt
gd1:	mfpr	$IPL,r1		/* read current ipl */
	movl	$0x18,r2	/* expected value */
	cmpl	r1,r2
	jeql	gd2
	movl	$0x04,r0	/* error code wrong ipl */
	halt
gd2:	movpsl	r1		/* get current psl */
	andl2	$0x0fffff00,r1	/* mask off don't cares */
	movl	$0x04180000,r2	/* expected value */
	cmpl	r1,r2
	jeql	gd3		/* if correct jump */
	movl	$0x05,r0	/* error code wrong psl */
	halt
gd3:	movab	(sp),r1		/* current stack pointer address */
	movl	$ISTK - 8,r2
	cmpl	r1,r2
	jeql	gd4
	movl	$0x06,r0	/* error code wrong stack address */
	halt
gd4:	incl	tikcnt		/* increment tick counter */
	rei			/* return from interrupt */
gdhlt:	pushab	boom
	callf	$8,_writes	/* call print function */
	movl	$0xcafebabe,r0	/* good halt - CAFEBABE ! */
	halt

	.data

_scb:	
	.space 1024

bitbl:
	.space 1024


	.align 2

CPDCB:

	.space 20
	
	.align 2


tikcnt:
	.space 4

msgcnt:
	.space 4

nl:	.ascii	"\n\0"
tick:	.ascii	"Tick \0"
tock:	.ascii	"Tock \0"
boom:	.ascii	"Boom!\n\0"

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