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Annotation of cci/d/ioex/udc.h, revision 1.1

1.1     ! root        1: 
        !             2: /*
        !             3:  *     Definitions for UDC CONTROLLER operations
        !             4:  *
        !             5: */
        !             6: 
        !             7: #define RETRY          200
        !             8: #define DELAY(n)       { register N = 3*(n); while (--N > 0 ); }
        !             9: 
        !            10: /*     *****************
        !            11:        Device parameters
        !            12:        *****************
        !            13: */
        !            14: 
        !            15: #define UDC_BLKLEN     256     /* Block length on UDC */
        !            16: #define SECTSIZ        256     /* sector size */
        !            17: #define BLKSIZ         1024    /* Logical block size */
        !            18: 
        !            19: /* Last block no on floppy <300k> */
        !            20: #define F_MXBLK                (long)(300)     
        !            21: 
        !            22: /* Last block no on SMD <300Meg>   */
        !            23: #define S_MXBLK                (long)(300000)  
        !            24: 
        !            25: /* Last block no on CMD, fixed <16meg> */
        !            26: #define CF_MXBLK       (long)16000     
        !            27: 
        !            28: /* Last block no on CMD, removable <16meg>  */
        !            29: #define CR_MXBLK       (long)16000     
        !            30: 
        !            31: /*     ******************
        !            32:        IPC command macros
        !            33:        ******************
        !            34: */
        !            35: #define IPC_RESET      *(char *)(IObase+0xf) = (char)0x00
        !            36: #define IPC_INT                *(char *)(IObase+0xd) = (char)0x00
        !            37: #define RD_MCSENT      (*(char *)(IObase+0x101))
        !            38: #define WR_MCSENT(x)   (*(char *)(IObase+0x101))=(char)x
        !            39: #define WR_IPCACK(x)   (*(char *)(IObase+0x183))=(char)x
        !            40: #define RD_IPCACK      (*(char *)(IObase+0x183))
        !            41: #define RD_IPCSENT     (*(char *)(IObase+0x181))
        !            42: #define WR_IPCSENT(x)  (*(char *)(IObase+0x181))=(char)x
        !            43: #define WR_MCACK(x)    (*(char *)(IObase+0x103))=(char)x
        !            44: 
        !            45: /*     *********************
        !            46:        UDC packet structures
        !            47:        *********************
        !            48: */
        !            49: 
        !            50: struct UDPAC {         /* UDC command packet : 21 bytes */
        !            51:        char stx  ;
        !            52:        char pkid ;
        !            53:        char pksiz ;    /* 21  bytes */
        !            54:        char pkdev ;    /* device # */  
        !            55:        char pkcmd ;    /* Command type */
        !            56:        char pkfnc ;    /* Function type */
        !            57:        short pkcnt ;   /* # of data blocks (1/4K each) */
        !            58:        short pbsiz ;   /* Block length size (0x100 = 1/4K) */
        !            59:        short pkmem[2]; /* Starting memory address  */
        !            60:        short pcksm ;   /* Checksum (unused) */
        !            61:        short psecno[2];        /* Starting sector # */
        !            62:        char etx ;
        !            63: };
        !            64: 
        !            65: struct UDTPAC {                /* UDC test packet : 15 bytes */
        !            66:        char stx  ;
        !            67:        char pkid ;
        !            68:        char pksiz ;    /* 15 bytes */
        !            69:        char pkdev ;    /* device # */  
        !            70:        char pkcmd ;    /* Command type */
        !            71:        char pkfnc ;    /* Function type */
        !            72:        short pkcnt ;   /* # of data blocks (1/4K each) */
        !            73:        short pbsiz ;   /* Block length size (0x100 = 1/4K) */
        !            74:        long psno ;     /* Starting sector # */
        !            75:        char endt ;
        !            76: };
        !            77:  
        !            78: struct UDSPAC {                /* UDC status packet : 9_byte format */
        !            79:        char stx;
        !            80:        char id;
        !            81:        char siz;       /* 9 bytes */
        !            82:        char dev;       /* device # */  
        !            83:        char scmd;      /* Command type */
        !            84:        char stype ;    /* Status type */
        !            85:        short stat ;    /* Status code */
        !            86:        char etxt ;
        !            87: }; 
        !            88: 
        !            89: 
        !            90: #define IPC_PCK                (IObase+0x185)  /* Base address of IPC packet */
        !            91: #define MC_PCK         (IObase+0x105)  /* Base address of CPU2 packet */
        !            92: 
        !            93: #define READY  0
        !            94: #define NUNIT  8               /* number of units per controller */
        !            95: #define NUDDRV 5               /* number of drive types supported */
        !            96: #define        DK_N    1               /* Monitoring device bit */
        !            97: 
        !            98: #define        PKID  0x187             /* packet id */
        !            99: #define        PKLEN 0x189             /* packet length */
        !           100: #define        PKDEV 0x18b             /* device # */
        !           101: #define        PKCMD 0x18d             /* command type */
        !           102: #define        PKSTT 0x18f             /* status type */
        !           103: #define STAT1 0x191            /* i/o status result offset */
        !           104: #define STAT2 0x193
        !           105: #define DEVSTAT1 0x195
        !           106: #define DEVSTAT2 0x197
        !           107: 
        !           108: #define UDREAD                 (char)0x10
        !           109: #define UDWTRY                 (char)0x01      /* read with retry */
        !           110: 
        !           111: #define UDWRITE        (char)0x20
        !           112: #define UDWCRC         (char)0x01      /* write sectors and check CRC */
        !           113: #define UDWSECT        (char)0x02      /* write sectors */
        !           114: #define UDWCMP         (char)0x03      /* write with compare */
        !           115: 
        !           116: #define UDCTL          (char)0x40      /* UDC Control command */
        !           117: #define        FORMAT          (char)0x07      /* Format with retry */
        !           118: 
        !           119: #define UDTEST         (char)0x30
        !           120: #define UDSTAT         (char)0x02      /* Test status */
        !           121: #define UDSTST         (char)0xff      /* self test  */
        !           122: 
        !           123: #define DEVRDY 0x80    /* device ready bit in status byte */
        !           124: 
        !           125: #define RETRANS                (char)0x15      /* Retransmit packet */
        !           126: #define PCK_OK         (char)0x6       /* Packet O.K   */
        !           127: 
        !           128: struct dev_parblk {
        !           129:        char devno;
        !           130:        short secsiz;
        !           131:        long maxblk;
        !           132:        short from;
        !           133:        short to;
        !           134:        };
        !           135: 
        !           136: #define CACHE_SZ       8
        !           137: struct cache {
        !           138:        short hdr;
        !           139:        short s_blk;
        !           140:        short e_blk;
        !           141:        char buf[1024*CACHE_SZ];
        !           142:        };
        !           143: 
        !           144: 
        !           145: /*
        !           146:        *************************
        !           147:        UDC CONTROLLER PARAMETERS
        !           148:        *************************
        !           149: */
        !           150: #define IOBASE         0xff000000
        !           151: #define UBASE          0x00ff0000      /* Base of share memory */
        !           152: #define UDCVEC         0xff            /* Vector no. of UDC */
        !           153: 
        !           154: #define SMD            7
        !           155: #define CMD_F          0               /* Fixed head portion */
        !           156: #define CMD_R          1               /* Cartrige portion */
        !           157: #define FLOPPY0                4               /* Just guess !! */
        !           158: #define FLOPPY1                5               /* Just guess !! */
        !           159: 
        !           160: #define        INVL_CMD        writes("\ninvalid command\n")
        !           161: #define NO_DRIVES      5
        !           162: #define READ           1
        !           163: #define WRITE          2
        !           164: 

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