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Annotation of cci/d/ioex/vddc.h, revision 1.1

1.1     ! root        1: 
        !             2: /*
        !             3:  *     Definitions for VDDC CONTROLLER operations
        !             4:  *
        !             5: */
        !             6: 
        !             7: #define RETRY          200
        !             8: #define DELAY(n)       { register N = 3*(n); while (--N > 0 ); }
        !             9: 
        !            10: /*     *****************
        !            11:        Device parameters
        !            12:        *****************
        !            13: */
        !            14: 
        !            15: #define UDC_BLKLEN     256     /* Block length on UDC */
        !            16: #define SECTSIZ        256     /* sector size */
        !            17: #define BLKSIZ         1024    /* Logical block size */
        !            18: 
        !            19: struct DEVPAR {
        !            20:        long nocyl;             /* No of cylinders */
        !            21:        long nohead;            /* No of heads */
        !            22:        long notraks;           /* No of data surfaces/cyl */
        !            23:        long secs_trak;         /* No of sectors/track */
        !            24:        long sector_siz;        /* Sector size */
        !            25:        char alive;
        !            26:        char name[5];
        !            27: };
        !            28: 
        !            29: 
        !            30: 
        !            31: /*     **********************
        !            32:        VDDC packet structures
        !            33:        **********************
        !            34: */
        !            35: 
        !            36: struct MDCB {          /* Master DCB : 4 longwords */
        !            37:        long fdcb_adr;  /* 1st DCB address */
        !            38:        long dcb_active;/* address of DCB in progress */
        !            39:        long dcb_int;   /* address of DCB causing interrupt */
        !            40:        long ctlr_stat; /* Controller status */
        !            41: };
        !            42: 
        !            43: struct DCB {           /* DCB structure */
        !            44:        long nxt_dcb;                   /* Address of next DCB */
        !            45:        unsigned short int_flags;       /* Interrupt,chain flags */
        !            46:        unsigned short opcode;          /* opcode */
        !            47:        long dcb_stat;                  /* operation status */
        !            48:        unsigned short unused;
        !            49:        char dev_sel;                   /* Device select */
        !            50:        char trail_wcnt;                /* Trailer word count */
        !            51: 
        !            52:        long err_memadr;                /* These following fields are not */
        !            53:        unsigned short unused1;         /* defined in the Manual. */
        !            54:        unsigned short err_wcount;
        !            55:        unsigned short err_track;
        !            56:        unsigned short err_cyl;         /* Up to here !! */
        !            57: 
        !            58:        long trailer[255];              /* Trailer 0-256 longwords */
        !            59: };
        !            60:  
        !            61: 
        !            62: /*
        !            63: **     DCB Command Codes
        !            64: */
        !            65: 
        !            66: #define        RD_DATA 0x80            /* Read Data */
        !            67: #define        FTR     0xc0            /* Full Track Read */
        !            68: #define        RAS     0x90            /* Read and Scatter */
        !            69: #define        C       0xa0            /* Compare */
        !            70: #define        FTC     0xe0            /* Full Track Compare */
        !            71: #define        RHDE    0x180           /* Read Header, Data & ECC (not used) */
        !            72: #define        WD      0x00            /* Write Data */
        !            73: #define        FTW     0x40            /* Full Track Write */
        !            74: #define        WR_COMP 0x20            /* Write Then Compare */
        !            75: #define        FTWTC   0x60            /* Full Track Write Then Compare */
        !            76: #define        GAW     0x10            /* Gather and Write */
        !            77: #define        WDE     0x100           /* Write Data & ECC (not used) */
        !            78: #define        FORMAT  0x900           /* Format Sector */
        !            79: #define        GWC     0x30            /* Gather Write & Compare */
        !            80: #define        START_DR 0x800          /* Start drives */
        !            81: #define        STOP_DR 0xa00           /* Stop drives */
        !            82: #define        SEEK    0xb00           /* Seek */
        !            83: #define        INITIALIZE      0xc00           /* Initialize VDDC */
        !            84: #define        DIAGNOSE        0xd00           /* Diagnose (self-test) VDDC */
        !            85: #define        CONFIG  0xe00           /* Reset/Configure VDDC/DDI/Drive(s) */
        !            86: #define        STATUS   0xf00          /* VDDC Status */
        !            87: /*
        !            88:        *************************
        !            89:        VDDC CONTROLLER PARAMETERS
        !            90:        *************************
        !            91: */
        !            92: #define IOBASE         0xff000000
        !            93: #define VDDCBASE       0x00ff2000      /* VDDC device address 0x2X00 */
        !            94:                                        /* X is switch select */
        !            95: #define VDDCVEC                0xe0            /* Vector no. of VDDC : 0xe0 */
        !            96: 
        !            97: /*     DCB longword no. 1      */
        !            98: #define        NO_CHAIN        0
        !            99: 
        !           100: /*     Numbers used to select device */
        !           101: #define FSD0           0
        !           102: #define FSD1           1
        !           103: #define        SMD0            2
        !           104: #define        SMD1            3
        !           105: 
        !           106: /*     DCB longword no. 2      */
        !           107: #define        NO_MODIFIER     0x0
        !           108: #define        SGATHER         0x100           /* scatter gather */
        !           109: #define        COMPARE         0x200           /* Compare */
        !           110: 
        !           111: #define        NOOP            0
        !           112: 
        !           113: #define        NO_INT          0
        !           114: #define        INT_DONE        1               /* Interrupt when done */
        !           115: #define        INT_ERROR       2               /* Interrupt on error */
        !           116: #define        INT_SUCCESS     3               /* Interupt on success */
        !           117: 
        !           118: /*     DCB longword no. 3      */
        !           119: #define        HARDERR_MASK    0xff            /* Hard error mask */
        !           120: #define        SOFTERR_MASK    0xff00          /* Soft error mask */
        !           121: #define        DATA_CORRECT    0x100000        /* Controller performed data correct. */
        !           122: #define        HARD_ERROR      0x200000
        !           123: #define        SOFT_ERROR      0x400000
        !           124: #define        ANY_ERROR       0x800000        /* Any error : bit 20,21,22 set */
        !           125: 
        !           126: #define        DCB_ABORT       0x10000000      /* DCB aborted */
        !           127: #define        UNSUCCESS       0x20000000      /* Unsuccessful completion */
        !           128: #define        DCB_DONE        0x40000000
        !           129: #define        DCB_STARTED     0x80000000
        !           130: 
        !           131: 
        !           132: #define        INVL_CMD        writes("\ninvalid command\n")
        !           133: 

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