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Power 6/32 Unix version 1.2b

/*
 *	Definitions for VDDC CONTROLLER operations
 *
*/

#define RETRY		200
#define DELAY(n)	{ register N = 3*(n); while (--N > 0 ); }

/*	*****************
	Device parameters
	*****************
*/

#define UDC_BLKLEN	256	/* Block length on UDC */
#define SECTSIZ 	256	/* sector size */
#define BLKSIZ		1024	/* Logical block size */

struct DEVPAR {
	long nocyl;		/* No of cylinders */
	long nohead;		/* No of heads */
	long notraks;		/* No of data surfaces/cyl */
	long secs_trak;		/* No of sectors/track */
	long sector_siz;	/* Sector size */
	char alive;
	char name[5];
};



/*	**********************
	VDDC packet structures
	**********************
*/

struct MDCB {		/* Master DCB : 4 longwords */
	long fdcb_adr;	/* 1st DCB address */
	long dcb_active;/* address of DCB in progress */
	long dcb_int;	/* address of DCB causing interrupt */
	long ctlr_stat;	/* Controller status */
};

struct DCB {		/* DCB structure */
	long nxt_dcb;			/* Address of next DCB */
	unsigned short int_flags;	/* Interrupt,chain flags */
	unsigned short opcode;		/* opcode */
	long dcb_stat;			/* operation status */
	unsigned short unused;
	char dev_sel;			/* Device select */
	char trail_wcnt;		/* Trailer word count */

	long err_memadr;		/* These following fields are not */
	unsigned short unused1;		/* defined in the Manual. */
	unsigned short err_wcount;
	unsigned short err_track;
	unsigned short err_cyl;		/* Up to here !! */

	long trailer[255];		/* Trailer 0-256 longwords */
};
 

/*
**	DCB Command Codes
*/

#define	RD_DATA	0x80		/* Read Data */
#define	FTR	0xc0		/* Full Track Read */
#define	RAS	0x90		/* Read and Scatter */
#define	C	0xa0		/* Compare */
#define	FTC	0xe0		/* Full Track Compare */
#define	RHDE	0x180		/* Read Header, Data & ECC (not used) */
#define	WD	0x00		/* Write Data */
#define	FTW	0x40		/* Full Track Write */
#define	WR_COMP	0x20		/* Write Then Compare */
#define	FTWTC	0x60		/* Full Track Write Then Compare */
#define	GAW	0x10		/* Gather and Write */
#define	WDE	0x100		/* Write Data & ECC (not used) */
#define	FORMAT	0x900		/* Format Sector */
#define	GWC	0x30		/* Gather Write & Compare */
#define	START_DR 0x800		/* Start drives */
#define	STOP_DR 0xa00		/* Stop drives */
#define	SEEK	0xb00		/* Seek */
#define	INITIALIZE	0xc00		/* Initialize VDDC */
#define	DIAGNOSE	0xd00		/* Diagnose (self-test) VDDC */
#define	CONFIG	0xe00		/* Reset/Configure VDDC/DDI/Drive(s) */
#define	STATUS   0xf00		/* VDDC Status */
/*
	*************************
	VDDC CONTROLLER PARAMETERS
	*************************
*/
#define IOBASE		0xff000000
#define VDDCBASE	0x00ff2000	/* VDDC device address 0x2X00 */
					/* X is switch select */
#define VDDCVEC		0xe0		/* Vector no. of VDDC : 0xe0 */

/*	DCB longword no. 1 	*/
#define	NO_CHAIN	0

/*	Numbers used to select device */
#define FSD0		0
#define FSD1		1
#define	SMD0		2
#define	SMD1		3

/*	DCB longword no. 2	*/
#define	NO_MODIFIER	0x0
#define	SGATHER		0x100		/* scatter gather */
#define	COMPARE		0x200		/* Compare */

#define	NOOP		0

#define	NO_INT		0
#define	INT_DONE	1		/* Interrupt when done */
#define	INT_ERROR	2		/* Interrupt on error */
#define	INT_SUCCESS	3		/* Interupt on success */

/*	DCB longword no. 3 	*/
#define	HARDERR_MASK	0xff		/* Hard error mask */
#define	SOFTERR_MASK	0xff00		/* Soft error mask */
#define	DATA_CORRECT	0x100000	/* Controller performed data correct. */
#define	HARD_ERROR	0x200000
#define	SOFT_ERROR	0x400000
#define	ANY_ERROR	0x800000	/* Any error : bit 20,21,22 set */

#define	DCB_ABORT	0x10000000	/* DCB aborted */
#define	UNSUCCESS	0x20000000	/* Unsuccessful completion */
#define	DCB_DONE	0x40000000
#define	DCB_STARTED	0x80000000


#define	INVL_CMD	writes("\ninvalid command\n")

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