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Power 6/32 Unix version 1.2b

#define	NBPG		1024
#define	PGSHIFT		10		/* LOG2(NBPG) */

/*
 * Provide about n microseconds of delay
*/
#define	DELAY(n)	{ register int N = (n); while (--N > 0); }

#define IOBASE		0xff000000
#define	XADDR		0xffee40	/* I/O addr of Xylogics controller */
#define	XBASE		0xffec00	/* I/O page of Xylogics controller */
#define	XOFFS		0x000240	/* Offset of Xylogics ctlr */
#define	XYVEC		0xc0

/*	Bits used for CSR register */
#define	GBSY		0x80		/* Go/busy bit */
#define ERR		0x40		/* General error bit */
#define DERR		0x20		/* double error */
#define IPND		0x10		/* Interrupt pending bit */
#define ADRM		0x8	/* Addressing mode : 1-24_bit, 0-20_bit */
				/* Selected by jumper (Sec.3.2.2) */
#define AREQ		0x4		/* Attention request */
#define	AACK		0x2		/* Attention ackownledge */
#define DRDY		0x1		/* Drive ready */

/*	Bits used for status byte in IOPB */
#define XS_ERR		0x80
#define XS_DONE		0x1
#define XS_ECODE	0xff


#define	MAXXYDRIVES	4
#define	EAGLE		0

struct DTYPE {
	long type;
};


struct TYPEPAR {
	long noheads;
	long nosecs;
	long nocyls;
	char name[8];
};


struct Xreg {
	char relow;	/* IOPB relocation reg. low byte */
	char rehig;	/* IOPB relocation reg. high byte */
	char adlow;	/* IOPB address reg. low byte */
	char adhig;	/* IOPB address reg. high byte */
	char csr;	/* Controller status register */
	char crr;	/* Controller reset/update register */
};

struct IOPB {
	char comm;	/* Opcode */
	char imode;	/* Interrupt mode */
	char stat1;	/* status 1 */
	char stat2;	/* status 2 */
	char throt;	/* throttle word */
	char devno;	/* Drive type, unit select */
	char headr;	/* head address */
	char secadr;	/* sector address */
	char calow;	/* Cylinder address low */
	char cahig;	/* Cylinder address high */
	char sclow;	/* Sector count low */
	char schig;	/* Sector count high */
	char dalow;	/* Data address low */
	char dahig;	/* Data address high */
	char drlow;	/* Data relocation low */
	char drhig;	/* Data relocation high */
	char hoffs;	/* Head offset */
	char unused;
	char niolow;	/* Next IOPB address low */
	char niohig;	/* Next IOPB address high */
	char ecclow;	/* ECC mask pattern low */
	char ecchig;	/* ECC mask pattern high */
	char ebalow;	/* ECC bit address low */
	char ebahig;	/* ECC bit address high */
};

/*	Used in COMM byte of IOPB 	*/
#define	IEN		0x10
#define AUD		0x80

/*	Used in IMODE byte of IOPB 	*/
#define	IEI		0x40

/*	Opcodes		*/
#define XFORMAT		7
#define	SETDRIVE	0xb
#define XYREAD		2
#define XYWRITE		1

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