![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to addd.lst CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
Return to addd.lst CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4 |
1.1 ! root 1: 1 00000000 LL0: ! 2: 2 00000000 .data ! 3: 3 00000d28 * .text ! 4: 4 00000000 .align 1 ! 5: 5 00000000 .globl _addd ! 6: 6 00000000 _addd: ! 7: 7 00016860 0000 .word L215 ! 8: 8 00016862 # ! 9: 9 00016862 # ! 10: 10 00016862 # #include "fpp_defs.h" ! 11: 11 00016862 # ! 12: 12 00016862 # ! 13: 13 00016862 # /***************************************************************************** ! 14: 14 00016862 # * ! 15: 15 00016862 # * ADDD - DOUBLE PRECISION FLOATING POINT ADD TEST ! 16: 16 00016862 # * ! 17: 17 00016862 # *****************************************************************************/ ! 18: 18 00016862 # addd() ! 19: 19 00016862 # { ! 20: 20 00016862 11 7a jbr L217 ! 21: 21 00016864 L218: ! 22: 22 00016864 # asm(".globl _addd_t"); ! 23: 23 00016864 .globl _addd_t ! 24: 24 00016864 # asm("_addd_t:"); /* entry address */ ! 25: 25 00016864 _addd_t: ! 26: 26 00016864 # if( (cycle == 1) && (prt_hdrs) ) /* print headers on 1st cycle */ ! 27: 27 00016864 1d effffffff6 01 cmpl _cycle,$1 ! 28: 28 0001686B 21 15 jneq L219 ! 29: 29 0001686D 5d efffffffed tstl _prt_hdrs ! 30: 30 00016873 31 0d jeql L219 ! 31: 31 00016875 # writes(" ADDD"); ! 32: 32 00016875 .data 1 ! 33: 33 00000d28 * L221: ! 34: 34 00000d28 * 204144444400 .ascii " ADDD\0" ! 35: 35 00000d2e * .text ! 36: 36 00016875 dd 8f00000d28 pushl $L221 ! 37: 37 0001687B fe 08 efffffffde callf $8,_writes ! 38: 38 00016882 # addd_1(); /* add through a register */ ! 39: 39 00016882 L219: ! 40: 40 00016882 fe 04 ef00000057 callf $4,_addd_1 ! 41: 41 00016889 # addd_2(); /* add through the cache */ ! 42: 42 00016889 fe 04 ef000001b2 callf $4,_addd_2 ! 43: 43 00016890 # addd_3(); /* wait 1 NOP before storeing */ ! 44: 44 00016890 fe 04 ef000002f9 callf $4,_addd_3 ! 45: 45 00016897 # for( nop_cnt = 3; nop_cnt > 0; nop_cnt-- ) ! 46: 46 00016897 0d 03 efffffffc2 movl $3,_nop_cnt ! 47: 47 0001689E L227: ! 48: 48 0001689E 5d efffffffbc tstl _nop_cnt ! 49: 49 000168A4 51 15 jleq L226 ! 50: 50 000168A6 # addd_3(nop_cnt); /* wait 6 ... 2 NOPs */ ! 51: 51 000168A6 dd efffffffb4 pushl _nop_cnt ! 52: 52 000168AC fe 08 ef000002dd callf $8,_addd_3 ! 53: 53 000168B3 L225: ! 54: 54 000168B3 7d efffffffa7 decl _nop_cnt ! 55: 55 000168B9 11 e3 jbr L227 ! 56: 56 000168BB L226: ! 57: 57 000168BB # addd_4(); /* wait 3 NOPs */ ! 58: 58 000168BB fe 04 ef00000456 callf $4,_addd_4 ! 59: 59 000168C2 # addd_5(); /* wait 1 NOP before storing */ ! 60: 60 000168C2 fe 04 ef000005a1 callf $4,_addd_5 ! 61: 61 000168C9 # addd_6(); /* register stability test */ ! 62: 62 000168C9 fe 04 ef000006ea callf $4,_addd_6 ! 63: 63 000168D0 # addd_7(); /* PSL stability test */ ! 64: 64 000168D0 fe 04 ef000008b3 callf $4,_addd_7 ! 65: 65 000168D7 # asm("jmp *return"); /* return to the test monitor */ ! 66: 66 000168D7 71 ffffffff83 jmp *return ! 67: 67 000168DD # } ! 68: 68 000168DD 40 ret#2 ! 69: 69 000168DE .set L215,0x0 ! 70: 70 000168DE L217: ! 71: 71 000168DE 11 84 jbr L218 ! 72: 72 000168E0 .data ! 73: 73 00000d28 * .text ! 74: 74 000168E0 .align 1 ! 75: 75 000168E0 .globl _addd_1 ! 76: 76 000168E0 _addd_1: ! 77: 77 000168E0 0000 .word L232 ! 78: 78 000168E2 # ! 79: 79 000168E2 # ! 80: 80 000168E2 # ! 81: 81 000168E2 # /************************************************************************ ! 82: 82 000168E2 # * ! 83: 83 000168E2 # * SUBTEST 1 - add through a register ! 84: 84 000168E2 # * ! 85: 85 000168E2 # ************************************************************************/ ! 86: 86 000168E2 # addd_1() ! 87: 87 000168E2 # { ! 88: 88 000168E2 13 015a jbr L234 ! 89: 89 000168E5 L235: ! 90: 90 000168E5 # force_loop = FALSE; ! 91: 91 000168E5 4d efffffff75 clrl _force_loop ! 92: 92 000168EB # subtest = 1; ! 93: 93 000168EB 0d 01 efffffff6e movl $1,_subtest ! 94: 94 000168F2 # for( index = 0; index < max_addd_1_index; index++ ) { ! 95: 95 000168F2 4d efffffff68 clrl _index ! 96: 96 000168F8 L238: ! 97: 97 000168F8 1d efffffff62 efffffff5d cmpl _index,_max_addd_1_index ! 98: 98 00016903 91 03 13 0136 jgeq L237 ! 99: 99 00016908 # dbl_ld_acc = addd_1_data[index].op_1; /* get operand 1 */ ! 100: 100 00016908 5c 18 efffffff51 50 mull3 $24,_index,r0 ! 101: 101 00016910 0c 8f00000000 50 addl2 $_addd_1_data,r0 ! 102: 102 00016917 0d a004 efffffff45 movl 4(r0),_dbl_ld_acc+4 ! 103: 103 0001691F 0d 60 efffffff3a movl (r0),_dbl_ld_acc ! 104: 104 00016926 # dbl_value_1 = addd_1_data[index].op_2; /* get operand 2 */ ! 105: 105 00016926 5c 18 efffffff33 50 mull3 $24,_index,r0 ! 106: 106 0001692E 0c 8f00000008 50 addl2 $_addd_1_data+8,r0 ! 107: 107 00016935 0d a004 efffffff27 movl 4(r0),_dbl_value_1+4 ! 108: 108 0001693D 0d 60 efffffff1c movl (r0),_dbl_value_1 ! 109: 109 00016944 # dbl_expected = addd_1_data[index].exp; /* get expected result */ ! 110: 110 00016944 5c 18 efffffff15 50 mull3 $24,_index,r0 ! 111: 111 0001694C 0c 8f00000010 50 addl2 $_addd_1_data+16,r0 ! 112: 112 00016953 0d a004 efffffff09 movl 4(r0),_dbl_expected+4 ! 113: 113 0001695B 0d 60 effffffefe movl (r0),_dbl_expected ! 114: 114 00016962 # /* ! 115: 115 00016962 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 116: 116 00016962 # * The force loop flag is set after the first error. ! 117: 117 00016962 # */ ! 118: 118 00016962 # asm("_addd_1_lp1:"); ! 119: 119 00016962 _addd_1_lp1: ! 120: 120 00016962 # asm("movl _dbl_ld_acc,r2"); /* move operand 1 to r2/r3 */ ! 121: 121 00016962 0d effffffef8 52 movl _dbl_ld_acc,r2 ! 122: 122 00016969 # asm("movl _dbl_ld_acc+4,r3"); ! 123: 123 00016969 0d effffffef5 53 movl _dbl_ld_acc+4,r3 ! 124: 124 00016970 # asm("movl _dbl_value_1,r4"); /* move operand 2 to r4/r5 */ ! 125: 125 00016970 0d effffffeea 54 movl _dbl_value_1,r4 ! 126: 126 00016977 # asm("movl _dbl_value_1+4,r5"); ! 127: 127 00016977 0d effffffee7 55 movl _dbl_value_1+4,r5 ! 128: 128 0001697E # asm("ldd r2"); /* load the 1st operand */ ! 129: 129 0001697E 07 52 ldd r2 ! 130: 130 00016980 # asm("addd r4"); /* add the 2nd operand */ ! 131: 131 00016980 c7 54 addd r4 ! 132: 132 00016982 # asm("std _dbl_st_acc"); /* store the result */ ! 133: 133 00016982 27 effffffed8 std _dbl_st_acc ! 134: 134 00016988 # if( force_loop ) ! 135: 135 00016988 5d effffffed2 tstl _force_loop ! 136: 136 0001698E 31 02 jeql L239 ! 137: 137 00016990 # asm("brb _addd_1_lp1");; /* loop on the error */ ! 138: 138 00016990 11 d0 brb _addd_1_lp1 ! 139: 139 00016992 L239: ! 140: 140 00016992 # /* ! 141: 141 00016992 # * end error loop - test the results ! 142: 142 00016992 # */ ! 143: 143 00016992 # if( (dbl_st_acc.m != dbl_expected.m) || /* verify the results */ ! 144: 144 00016992 # (dbl_st_acc.l != dbl_expected.l) ) { ! 145: 145 00016992 1d effffffec8 effffffec3 cmpl _dbl_st_acc,_dbl_expected ! 146: 146 0001699D 21 10 jneq L9999 ! 147: 147 0001699F 1d effffffebf effffffeba cmpl _dbl_st_acc+4,_dbl_expected+4 ! 148: 148 000169AA 21 03 13 0086 jeql L240 ! 149: 149 000169AF L9999: ! 150: 150 000169AF # errcnt++; /* bump the error count */ ! 151: 151 000169AF 6d effffffeab incl _errcnt ! 152: 152 000169B5 # if( prt_error ) { ! 153: 153 000169B5 5d effffffea5 tstl _prt_error ! 154: 154 000169BB 31 55 jeql L241 ! 155: 155 000169BD # writes(" \n"); /* start a new print line */ ! 156: 156 000169BD .data 1 ! 157: 157 00000d2e * L242: ! 158: 158 00000d2e * 200A00 .ascii " \12\0" ! 159: 159 00000d31 * .text ! 160: 160 000169BD dd 8f00000d2e pushl $L242 ! 161: 161 000169C3 fe 08 effffffe96 callf $8,_writes ! 162: 162 000169CA # writes("cycle: "); ! 163: 163 000169CA .data 1 ! 164: 164 00000d31 * L243: ! 165: 165 00000d31 * 6379636C653A2000 .ascii "cycle: \0" ! 166: 166 00000d39 * .text ! 167: 167 000169CA dd 8f00000d31 pushl $L243 ! 168: 168 000169D0 fe 08 effffffe89 callf $8,_writes ! 169: 169 000169D7 # writed( cycle ); ! 170: 170 000169D7 dd effffffe83 pushl _cycle ! 171: 171 000169DD fe 08 effffffe7c callf $8,_writed ! 172: 172 000169E4 # writes(" ADDD test "); ! 173: 173 000169E4 .data 1 ! 174: 174 00000d39 * L245: ! 175: 175 00000d39 * 2020414444442074657374200 .ascii " ADDD test \0" ! 176: 0 ! 177: 176 00000d46 * .text ! 178: 177 000169E4 dd 8f00000d39 pushl $L245 ! 179: 178 000169EA fe 08 effffffe6f callf $8,_writes ! 180: 179 000169F1 # writed( test_no ); ! 181: 180 000169F1 dd effffffe69 pushl _test_no ! 182: 181 000169F7 fe 08 effffffe62 callf $8,_writed ! 183: 182 000169FE # writes(", subtest 1 (Reg. Data) - BAD FINAL ACC\n"); ! 184: 183 000169FE .data 1 ! 185: 184 00000d46 * L246: ! 186: 185 00000d46 * 2C20737562746573742031202 .ascii ", subtest 1 (Reg. Data) - BAD FINAL ACC\12\0" ! 187: 85265672E204461746129202D ! 188: 204241442046494E414C20414 ! 189: 3430A00 ! 190: 186 00000d6f * .text ! 191: 187 000169FE dd 8f00000d46 pushl $L246 ! 192: 188 00016A04 fe 08 effffffe55 callf $8,_writes ! 193: 189 00016A0B # print_addd_data(); ! 194: 190 00016A0B fe 04 ef00000952 callf $4,_print_addd_data ! 195: 191 00016A12 # } ! 196: 192 00016A12 # if( halt_flg ) ! 197: 193 00016A12 L241: ! 198: 194 00016A12 5d effffffe48 tstl _halt_flg ! 199: 195 00016A18 31 09 jeql L248 ! 200: 196 00016A1A # addd_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 201: 197 00016A1A dd 01 pushl $1 ! 202: 198 00016A1C fe 08 ef00000a37 callf $8,_addd_er_halt ! 203: 199 00016A23 # if( loop_on_err ) { ! 204: 200 00016A23 L248: ! 205: 201 00016A23 5d effffffe37 tstl _loop_on_err ! 206: 202 00016A29 31 0a jeql L250 ! 207: 203 00016A2B # force_loop = TRUE; /* set the force loop flag */ ! 208: 204 00016A2B 0d 01 effffffe2e movl $1,_force_loop ! 209: 205 00016A32 # asm("brw _addd_1_lp1");; /* and loop on the error */ ! 210: 206 00016A32 13 ff2d brw _addd_1_lp1 ! 211: 207 00016A35 # } /* end of loop on error */ ! 212: 208 00016A35 # } /* end of compare error */ ! 213: 209 00016A35 L250: ! 214: 210 00016A35 # } /* end of WHILE loop */ ! 215: 211 00016A35 L240: ! 216: 212 00016A35 L236: ! 217: 213 00016A35 6d effffffe25 incl _index ! 218: 214 00016A3B 13 feba jbr L238 ! 219: 215 00016A3E L237: ! 220: 216 00016A3E # } /* end of subtest 1 */ ! 221: 217 00016A3E 40 ret#2 ! 222: 218 00016A3F .set L232,0x0 ! 223: 219 00016A3F L234: ! 224: 220 00016A3F 13 fea3 jbr L235 ! 225: 221 00016A42 .data ! 226: 222 00000d28 * .text ! 227: 223 00016A42 .align 1 ! 228: 224 00016A42 .globl _addd_2 ! 229: 225 00016A42 _addd_2: ! 230: 226 00016A42 0000 .word L251 ! 231: 227 00016A44 # ! 232: 228 00016A44 # ! 233: 229 00016A44 # ! 234: 230 00016A44 # /************************************************************************ ! 235: 231 00016A44 # * ! 236: 232 00016A44 # * SUBTEST 2 - add through memory ! 237: 233 00016A44 # * ! 238: 234 00016A44 # ************************************************************************/ ! 239: 235 00016A44 # addd_2() ! 240: 236 00016A44 # { ! 241: 237 00016A44 13 0146 jbr L253 ! 242: 238 00016A47 L254: ! 243: 239 00016A47 # force_loop = FALSE; ! 244: 240 00016A47 4d effffffe13 clrl _force_loop ! 245: 241 00016A4D # subtest = 2; ! 246: 242 00016A4D 0d 02 effffffe0c movl $2,_subtest ! 247: 243 00016A54 # for( index = 0; index < max_addd_1_index; index++ ) { ! 248: 244 00016A54 4d effffffe06 clrl _index ! 249: 245 00016A5A L257: ! 250: 246 00016A5A 1d effffffe00 effffffdfb cmpl _index,_max_addd_1_index ! 251: 247 00016A65 91 03 13 0122 jgeq L256 ! 252: 248 00016A6A # dbl_ld_acc = addd_1_data[index].op_1; /* get operand 1 */ ! 253: 249 00016A6A 5c 18 effffffdef 50 mull3 $24,_index,r0 ! 254: 250 00016A72 0c 8f00000000 50 addl2 $_addd_1_data,r0 ! 255: 251 00016A79 0d a004 effffffde3 movl 4(r0),_dbl_ld_acc+4 ! 256: 252 00016A81 0d 60 effffffdd8 movl (r0),_dbl_ld_acc ! 257: 253 00016A88 # dbl_value_1 = addd_1_data[index].op_2; /* get operand 2 */ ! 258: 254 00016A88 5c 18 effffffdd1 50 mull3 $24,_index,r0 ! 259: 255 00016A90 0c 8f00000008 50 addl2 $_addd_1_data+8,r0 ! 260: 256 00016A97 0d a004 effffffdc5 movl 4(r0),_dbl_value_1+4 ! 261: 257 00016A9F 0d 60 effffffdba movl (r0),_dbl_value_1 ! 262: 258 00016AA6 # dbl_expected = addd_1_data[index].exp; /* get expected result */ ! 263: 259 00016AA6 5c 18 effffffdb3 50 mull3 $24,_index,r0 ! 264: 260 00016AAE 0c 8f00000010 50 addl2 $_addd_1_data+16,r0 ! 265: 261 00016AB5 0d a004 effffffda7 movl 4(r0),_dbl_expected+4 ! 266: 262 00016ABD 0d 60 effffffd9c movl (r0),_dbl_expected ! 267: 263 00016AC4 # /* ! 268: 264 00016AC4 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 269: 265 00016AC4 # * The force loop flag is set after the first error. ! 270: 266 00016AC4 # */ ! 271: 267 00016AC4 # asm("_addd_2_lp1:"); ! 272: 268 00016AC4 _addd_2_lp1: ! 273: 269 00016AC4 # asm("ldd _dbl_ld_acc"); /* load the 1st operand */ ! 274: 270 00016AC4 07 effffffd96 ldd _dbl_ld_acc ! 275: 271 00016ACA # asm("addd _dbl_value_1"); /* add the 2nd operand */ ! 276: 272 00016ACA c7 effffffd90 addd _dbl_value_1 ! 277: 273 00016AD0 # asm("std _dbl_st_acc"); /* store the result */ ! 278: 274 00016AD0 27 effffffd8a std _dbl_st_acc ! 279: 275 00016AD6 # if( force_loop ) ! 280: 276 00016AD6 5d effffffd84 tstl _force_loop ! 281: 277 00016ADC 31 02 jeql L258 ! 282: 278 00016ADE # asm("brb _addd_2_lp1");; /* loop on the error */ ! 283: 279 00016ADE 11 e4 brb _addd_2_lp1 ! 284: 280 00016AE0 L258: ! 285: 281 00016AE0 # /* ! 286: 282 00016AE0 # * end error loop - test the results ! 287: 283 00016AE0 # */ ! 288: 284 00016AE0 # if( (dbl_st_acc.m != dbl_expected.m) || /* verify the results */ ! 289: 285 00016AE0 # (dbl_st_acc.l != dbl_expected.l) ) { ! 290: 286 00016AE0 1d effffffd7a effffffd75 cmpl _dbl_st_acc,_dbl_expected ! 291: 287 00016AEB 21 10 jneq L9998 ! 292: 288 00016AED 1d effffffd71 effffffd6c cmpl _dbl_st_acc+4,_dbl_expected+4 ! 293: 289 00016AF8 21 03 13 0086 jeql L259 ! 294: 290 00016AFD L9998: ! 295: 291 00016AFD # errcnt++; /* bump the error count */ ! 296: 292 00016AFD 6d effffffd5d incl _errcnt ! 297: 293 00016B03 # if( prt_error ) { ! 298: 294 00016B03 5d effffffd57 tstl _prt_error ! 299: 295 00016B09 31 55 jeql L260 ! 300: 296 00016B0B # writes(" \n"); /* start a new print line */ ! 301: 297 00016B0B .data 1 ! 302: 298 00000d6f * L261: ! 303: 299 00000d6f * 200A00 .ascii " \12\0" ! 304: 300 00000d72 * .text ! 305: 301 00016B0B dd 8f00000d6f pushl $L261 ! 306: 302 00016B11 fe 08 effffffd48 callf $8,_writes ! 307: 303 00016B18 # writes("cycle: "); ! 308: 304 00016B18 .data 1 ! 309: 305 00000d72 * L262: ! 310: 306 00000d72 * 6379636C653A2000 .ascii "cycle: \0" ! 311: 307 00000d7a * .text ! 312: 308 00016B18 dd 8f00000d72 pushl $L262 ! 313: 309 00016B1E fe 08 effffffd3b callf $8,_writes ! 314: 310 00016B25 # writed( cycle ); ! 315: 311 00016B25 dd effffffd35 pushl _cycle ! 316: 312 00016B2B fe 08 effffffd2e callf $8,_writed ! 317: 313 00016B32 # writes(" ADDD test "); ! 318: 314 00016B32 .data 1 ! 319: 315 00000d7a * L263: ! 320: 316 00000d7a * 2020414444442074657374200 .ascii " ADDD test \0" ! 321: 0 ! 322: 317 00000d87 * .text ! 323: 318 00016B32 dd 8f00000d7a pushl $L263 ! 324: 319 00016B38 fe 08 effffffd21 callf $8,_writes ! 325: 320 00016B3F # writed( test_no ); ! 326: 321 00016B3F dd effffffd1b pushl _test_no ! 327: 322 00016B45 fe 08 effffffd14 callf $8,_writed ! 328: 323 00016B4C # writes(", subtest 2 (Cache Data) - BAD FINAL ACC\n"); ! 329: 324 00016B4C .data 1 ! 330: 325 00000d87 * L264: ! 331: 326 00000d87 * 2C20737562746573742032202 .ascii ", subtest 2 (Cache Data) - BAD FINAL ACC\12\0" ! 332: 8436163686520446174612920 ! 333: 2D204241442046494E414C204 ! 334: 143430A00 ! 335: 327 00000db1 * .text ! 336: 328 00016B4C dd 8f00000d87 pushl $L264 ! 337: 329 00016B52 fe 08 effffffd07 callf $8,_writes ! 338: 330 00016B59 # print_addd_data(); ! 339: 331 00016B59 fe 04 ef00000804 callf $4,_print_addd_data ! 340: 332 00016B60 # } ! 341: 333 00016B60 # if( halt_flg ) ! 342: 334 00016B60 L260: ! 343: 335 00016B60 5d effffffcfa tstl _halt_flg ! 344: 336 00016B66 31 09 jeql L265 ! 345: 337 00016B68 # addd_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 346: 338 00016B68 dd 01 pushl $1 ! 347: 339 00016B6A fe 08 ef000008e9 callf $8,_addd_er_halt ! 348: 340 00016B71 # if( loop_on_err ) { ! 349: 341 00016B71 L265: ! 350: 342 00016B71 5d effffffce9 tstl _loop_on_err ! 351: 343 00016B77 31 0a jeql L266 ! 352: 344 00016B79 # force_loop = TRUE; /* set the force loop flag */ ! 353: 345 00016B79 0d 01 effffffce0 movl $1,_force_loop ! 354: 346 00016B80 # asm("brw _addd_2_lp1");; /* and loop on the error */ ! 355: 347 00016B80 13 ff41 brw _addd_2_lp1 ! 356: 348 00016B83 # } /* end of loop on error */ ! 357: 349 00016B83 # } /* end of compare error */ ! 358: 350 00016B83 L266: ! 359: 351 00016B83 # } /* end of WHILE loop */ ! 360: 352 00016B83 L259: ! 361: 353 00016B83 L255: ! 362: 354 00016B83 6d effffffcd7 incl _index ! 363: 355 00016B89 13 fece jbr L257 ! 364: 356 00016B8C L256: ! 365: 357 00016B8C # } /* end of subtest 2 */ ! 366: 358 00016B8C 40 ret#2 ! 367: 359 00016B8D .set L251,0x0 ! 368: 360 00016B8D L253: ! 369: 361 00016B8D 13 feb7 jbr L254 ! 370: 362 00016B90 .data ! 371: 363 00000d28 * .text ! 372: 364 00016B90 .align 1 ! 373: 365 00016B90 .globl _addd_3 ! 374: 366 00016B90 _addd_3: ! 375: 367 00016B90 0000 .word L267 ! 376: 368 00016B92 # ! 377: 369 00016B92 # ! 378: 370 00016B92 # ! 379: 371 00016B92 # /**************************************************************************** ! 380: 372 00016B92 # * ! 381: 373 00016B92 # * SUBTEST 3 - Wait 2n NOPs before storing the results ! 382: 374 00016B92 # * ! 383: 375 00016B92 # ****************************************************************************/ ! 384: 376 00016B92 # addd_3( count ) ! 385: 377 00016B92 # int count; /* wait "count" * 2 NOPs */ ! 386: 378 00016B92 # { ! 387: 379 00016B92 13 0180 jbr L269 ! 388: 380 00016B95 L270: ! 389: 381 00016B95 # force_loop = FALSE; ! 390: 382 00016B95 4d effffffcc5 clrl _force_loop ! 391: 383 00016B9B # subtest = 3; ! 392: 384 00016B9B 0d 03 effffffcbe movl $3,_subtest ! 393: 385 00016BA2 # sgl_dummy2 = count; /* get the NOP count */ ! 394: 386 00016BA2 0d ad04 effffffcb6 movl 4(fp),_sgl_dummy2 ! 395: 387 00016BAA # for( index = 0; index < max_addd_1_index; index++ ) { ! 396: 388 00016BAA 4d effffffcb0 clrl _index ! 397: 389 00016BB0 L273: ! 398: 390 00016BB0 1d effffffcaa effffffca5 cmpl _index,_max_addd_1_index ! 399: 391 00016BBB 91 03 13 0154 jgeq L272 ! 400: 392 00016BC0 # dbl_ld_acc = addd_1_data[index].op_1; /* get operand 1 */ ! 401: 393 00016BC0 5c 18 effffffc99 50 mull3 $24,_index,r0 ! 402: 394 00016BC8 0c 8f00000000 50 addl2 $_addd_1_data,r0 ! 403: 395 00016BCF 0d a004 effffffc8d movl 4(r0),_dbl_ld_acc+4 ! 404: 396 00016BD7 0d 60 effffffc82 movl (r0),_dbl_ld_acc ! 405: 397 00016BDE # dbl_value_1 = addd_1_data[index].op_2; /* get operand 2 */ ! 406: 398 00016BDE 5c 18 effffffc7b 50 mull3 $24,_index,r0 ! 407: 399 00016BE6 0c 8f00000008 50 addl2 $_addd_1_data+8,r0 ! 408: 400 00016BED 0d a004 effffffc6f movl 4(r0),_dbl_value_1+4 ! 409: 401 00016BF5 0d 60 effffffc64 movl (r0),_dbl_value_1 ! 410: 402 00016BFC # dbl_expected = addd_1_data[index].exp; /* get expected result */ ! 411: 403 00016BFC 5c 18 effffffc5d 50 mull3 $24,_index,r0 ! 412: 404 00016C04 0c 8f00000010 50 addl2 $_addd_1_data+16,r0 ! 413: 405 00016C0B 0d a004 effffffc51 movl 4(r0),_dbl_expected+4 ! 414: 406 00016C13 0d 60 effffffc46 movl (r0),_dbl_expected ! 415: 407 00016C1A # /* ! 416: 408 00016C1A # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 417: 409 00016C1A # * The force loop flag is set after the first error. ! 418: 410 00016C1A # */ ! 419: 411 00016C1A # asm("_addd_3_lp1:"); ! 420: 412 00016C1A _addd_3_lp1: ! 421: 413 00016C1A # asm("movl _sgl_dummy2,r0"); /* set the NOP count */ ! 422: 414 00016C1A 0d effffffc40 50 movl _sgl_dummy2,r0 ! 423: 415 00016C21 # asm("ldd _dbl_ld_acc"); /* load the 1st operand */ ! 424: 416 00016C21 07 effffffc39 ldd _dbl_ld_acc ! 425: 417 00016C27 # asm("nop"); /* delay */ ! 426: 418 00016C27 10 nop ! 427: 419 00016C28 # asm("addd _dbl_value_1"); /* add the 2nd operand */ ! 428: 420 00016C28 c7 effffffc32 addd _dbl_value_1 ! 429: 421 00016C2E # asm("1:"); ! 430: 422 00016C2E 1: ! 431: 423 00016C2E # asm("decl r0"); /* decrement the NOP count */ ! 432: 424 00016C2E 7d 50 decl r0 ! 433: 425 00016C30 # asm("bneq 1b"); /* till the count = 0 */ ! 434: 426 00016C30 21 fc bneq 1b ! 435: 427 00016C32 # asm("std _dbl_st_acc"); /* store the result */ ! 436: 428 00016C32 27 effffffc28 std _dbl_st_acc ! 437: 429 00016C38 # if( force_loop ) ! 438: 430 00016C38 5d effffffc22 tstl _force_loop ! 439: 431 00016C3E 31 02 jeql L274 ! 440: 432 00016C40 # asm("brb _addd_3_lp1");; /* loop on the error */ ! 441: 433 00016C40 11 d8 brb _addd_3_lp1 ! 442: 434 00016C42 L274: ! 443: 435 00016C42 # /* ! 444: 436 00016C42 # * end error loop - test the results ! 445: 437 00016C42 # */ ! 446: 438 00016C42 # if( (dbl_st_acc.m != dbl_expected.m) || /* verify the results */ ! 447: 439 00016C42 # (dbl_st_acc.l != dbl_expected.l) ) { ! 448: 440 00016C42 1d effffffc18 effffffc13 cmpl _dbl_st_acc,_dbl_expected ! 449: 441 00016C4D 21 10 jneq L9997 ! 450: 442 00016C4F 1d effffffc0f effffffc0a cmpl _dbl_st_acc+4,_dbl_expected+4 ! 451: 443 00016C5A 21 03 13 00ac jeql L275 ! 452: 444 00016C5F L9997: ! 453: 445 00016C5F # errcnt++; /* bump the error count */ ! 454: 446 00016C5F 6d effffffbfb incl _errcnt ! 455: 447 00016C65 # if( prt_error ) { ! 456: 448 00016C65 5d effffffbf5 tstl _prt_error ! 457: 449 00016C6B 31 7b jeql L276 ! 458: 450 00016C6D # writes(" \n"); /* start a new print line */ ! 459: 451 00016C6D .data 1 ! 460: 452 00000db1 * L277: ! 461: 453 00000db1 * 200A00 .ascii " \12\0" ! 462: 454 00000db4 * .text ! 463: 455 00016C6D dd 8f00000db1 pushl $L277 ! 464: 456 00016C73 fe 08 effffffbe6 callf $8,_writes ! 465: 457 00016C7A # writes("cycle: "); ! 466: 458 00016C7A .data 1 ! 467: 459 00000db4 * L278: ! 468: 460 00000db4 * 6379636C653A2000 .ascii "cycle: \0" ! 469: 461 00000dbc * .text ! 470: 462 00016C7A dd 8f00000db4 pushl $L278 ! 471: 463 00016C80 fe 08 effffffbd9 callf $8,_writes ! 472: 464 00016C87 # writed( cycle ); ! 473: 465 00016C87 dd effffffbd3 pushl _cycle ! 474: 466 00016C8D fe 08 effffffbcc callf $8,_writed ! 475: 467 00016C94 # writes(" ADDD test "); ! 476: 468 00016C94 .data 1 ! 477: 469 00000dbc * L279: ! 478: 470 00000dbc * 2020414444442074657374200 .ascii " ADDD test \0" ! 479: 0 ! 480: 471 00000dc9 * .text ! 481: 472 00016C94 dd 8f00000dbc pushl $L279 ! 482: 473 00016C9A fe 08 effffffbbf callf $8,_writes ! 483: 474 00016CA1 # writed( test_no ); ! 484: 475 00016CA1 dd effffffbb9 pushl _test_no ! 485: 476 00016CA7 fe 08 effffffbb2 callf $8,_writed ! 486: 477 00016CAE # writes(", subtest 3 (wait "); ! 487: 478 00016CAE .data 1 ! 488: 479 00000dc9 * L280: ! 489: 480 00000dc9 * 2C20737562746573742033202 .ascii ", subtest 3 (wait \0" ! 490: 8776169742000 ! 491: 481 00000ddc * .text ! 492: 482 00016CAE dd 8f00000dc9 pushl $L280 ! 493: 483 00016CB4 fe 08 effffffba5 callf $8,_writes ! 494: 484 00016CBB # sgl_dummy1 = 2*count; ! 495: 485 00016CBB 48 01 ad04 50 shll $1,4(fp),r0 ! 496: 486 00016CC0 0d 50 effffffb99 movl r0,_sgl_dummy1 ! 497: 487 00016CC7 # writed( sgl_dummy1 ); /* write the NOP count */ ! 498: 488 00016CC7 dd effffffb93 pushl _sgl_dummy1 ! 499: 489 00016CCD fe 08 effffffb8c callf $8,_writed ! 500: 490 00016CD4 # writes(" NOPs) - BAD FINAL ACC\n"); ! 501: 491 00016CD4 .data 1 ! 502: 492 00000ddc * L281: ! 503: 493 00000ddc * 204E4F507329202D204241442 .ascii " NOPs) - BAD FINAL ACC\12\0" ! 504: 046494E414C204143430A00 ! 505: 494 00000df4 * .text ! 506: 495 00016CD4 dd 8f00000ddc pushl $L281 ! 507: 496 00016CDA fe 08 effffffb7f callf $8,_writes ! 508: 497 00016CE1 # print_addd_data(); ! 509: 498 00016CE1 fe 04 ef0000067c callf $4,_print_addd_data ! 510: 499 00016CE8 # } ! 511: 500 00016CE8 # if( halt_flg ) ! 512: 501 00016CE8 L276: ! 513: 502 00016CE8 5d effffffb72 tstl _halt_flg ! 514: 503 00016CEE 31 09 jeql L282 ! 515: 504 00016CF0 # addd_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 516: 505 00016CF0 dd 01 pushl $1 ! 517: 506 00016CF2 fe 08 ef00000761 callf $8,_addd_er_halt ! 518: 507 00016CF9 # if( loop_on_err ) { ! 519: 508 00016CF9 L282: ! 520: 509 00016CF9 5d effffffb61 tstl _loop_on_err ! 521: 510 00016CFF 31 0a jeql L283 ! 522: 511 00016D01 # force_loop = TRUE; /* set the force loop flag */ ! 523: 512 00016D01 0d 01 effffffb58 movl $1,_force_loop ! 524: 513 00016D08 # asm("brw _addd_3_lp1");; /* and loop on the error */ ! 525: 514 00016D08 13 ff0f brw _addd_3_lp1 ! 526: 515 00016D0B # } /* end of loop on error */ ! 527: 516 00016D0B # } /* end of compare error */ ! 528: 517 00016D0B L283: ! 529: 518 00016D0B # } /* end of WHILE loop */ ! 530: 519 00016D0B L275: ! 531: 520 00016D0B L271: ! 532: 521 00016D0B 6d effffffb4f incl _index ! 533: 522 00016D11 13 fe9c jbr L273 ! 534: 523 00016D14 L272: ! 535: 524 00016D14 # } /* end of subtest 3 */ ! 536: 525 00016D14 40 ret#2 ! 537: 526 00016D15 .set L267,0x0 ! 538: 527 00016D15 L269: ! 539: 528 00016D15 13 fe7d jbr L270 ! 540: 529 00016D18 .data ! 541: 530 00000d28 * .text ! 542: 531 00016D18 .align 1 ! 543: 532 00016D18 .globl _addd_4 ! 544: 533 00016D18 _addd_4: ! 545: 534 00016D18 0000 .word L284 ! 546: 535 00016D1A # ! 547: 536 00016D1A # ! 548: 537 00016D1A # ! 549: 538 00016D1A # /************************************************************************ ! 550: 539 00016D1A # * ! 551: 540 00016D1A # * SUBTEST 4 - Wait 2 NOPs before storing the results ! 552: 541 00016D1A # * ! 553: 542 00016D1A # ************************************************************************/ ! 554: 543 00016D1A # addd_4() ! 555: 544 00016D1A # { ! 556: 545 00016D1A 13 0149 jbr L286 ! 557: 546 00016D1D L287: ! 558: 547 00016D1D # force_loop = FALSE; ! 559: 548 00016D1D 4d effffffb3d clrl _force_loop ! 560: 549 00016D23 # subtest = 4; ! 561: 550 00016D23 0d 04 effffffb36 movl $4,_subtest ! 562: 551 00016D2A # for( index = 0; index < max_addd_1_index; index++ ) { ! 563: 552 00016D2A 4d effffffb30 clrl _index ! 564: 553 00016D30 L290: ! 565: 554 00016D30 1d effffffb2a effffffb25 cmpl _index,_max_addd_1_index ! 566: 555 00016D3B 91 03 13 0125 jgeq L289 ! 567: 556 00016D40 # dbl_ld_acc = addd_1_data[index].op_1; /* get operand 1 */ ! 568: 557 00016D40 5c 18 effffffb19 50 mull3 $24,_index,r0 ! 569: 558 00016D48 0c 8f00000000 50 addl2 $_addd_1_data,r0 ! 570: 559 00016D4F 0d a004 effffffb0d movl 4(r0),_dbl_ld_acc+4 ! 571: 560 00016D57 0d 60 effffffb02 movl (r0),_dbl_ld_acc ! 572: 561 00016D5E # dbl_value_1 = addd_1_data[index].op_2; /* get operand 2 */ ! 573: 562 00016D5E 5c 18 effffffafb 50 mull3 $24,_index,r0 ! 574: 563 00016D66 0c 8f00000008 50 addl2 $_addd_1_data+8,r0 ! 575: 564 00016D6D 0d a004 effffffaef movl 4(r0),_dbl_value_1+4 ! 576: 565 00016D75 0d 60 effffffae4 movl (r0),_dbl_value_1 ! 577: 566 00016D7C # dbl_expected = addd_1_data[index].exp; /* get expected result */ ! 578: 567 00016D7C 5c 18 effffffadd 50 mull3 $24,_index,r0 ! 579: 568 00016D84 0c 8f00000010 50 addl2 $_addd_1_data+16,r0 ! 580: 569 00016D8B 0d a004 effffffad1 movl 4(r0),_dbl_expected+4 ! 581: 570 00016D93 0d 60 effffffac6 movl (r0),_dbl_expected ! 582: 571 00016D9A # /* ! 583: 572 00016D9A # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 584: 573 00016D9A # * The force loop flag is set after the first error. ! 585: 574 00016D9A # */ ! 586: 575 00016D9A # asm("_addd_4_lp1:"); ! 587: 576 00016D9A _addd_4_lp1: ! 588: 577 00016D9A # asm("ldd _dbl_ld_acc"); /* load the 1st operand */ ! 589: 578 00016D9A 07 effffffac0 ldd _dbl_ld_acc ! 590: 579 00016DA0 # asm("nop"); /* delay */ ! 591: 580 00016DA0 10 nop ! 592: 581 00016DA1 # asm("addd _dbl_value_1"); /* add the 2nd operand */ ! 593: 582 00016DA1 c7 effffffab9 addd _dbl_value_1 ! 594: 583 00016DA7 # asm("nop"); /* delay before ... */ ! 595: 584 00016DA7 10 nop ! 596: 585 00016DA8 # asm("nop"); /* ... storing the result */ ! 597: 586 00016DA8 10 nop ! 598: 587 00016DA9 # asm("std _dbl_st_acc"); /* store the result */ ! 599: 588 00016DA9 27 effffffab1 std _dbl_st_acc ! 600: 589 00016DAF # if( force_loop ) ! 601: 590 00016DAF 5d effffffaab tstl _force_loop ! 602: 591 00016DB5 31 02 jeql L291 ! 603: 592 00016DB7 # asm("brb _addd_4_lp1");; /* loop on the error */ ! 604: 593 00016DB7 11 e1 brb _addd_4_lp1 ! 605: 594 00016DB9 L291: ! 606: 595 00016DB9 # /* ! 607: 596 00016DB9 # * end error loop - test the results ! 608: 597 00016DB9 # */ ! 609: 598 00016DB9 # if( (dbl_st_acc.m != dbl_expected.m) || /* verify the results */ ! 610: 599 00016DB9 # (dbl_st_acc.l != dbl_expected.l) ) { ! 611: 600 00016DB9 1d effffffaa1 effffffa9c cmpl _dbl_st_acc,_dbl_expected ! 612: 601 00016DC4 21 10 jneq L9996 ! 613: 602 00016DC6 1d effffffa98 effffffa93 cmpl _dbl_st_acc+4,_dbl_expected+4 ! 614: 603 00016DD1 21 03 13 0086 jeql L292 ! 615: 604 00016DD6 L9996: ! 616: 605 00016DD6 # errcnt++; /* bump the error count */ ! 617: 606 00016DD6 6d effffffa84 incl _errcnt ! 618: 607 00016DDC # if( prt_error ) { ! 619: 608 00016DDC 5d effffffa7e tstl _prt_error ! 620: 609 00016DE2 31 55 jeql L293 ! 621: 610 00016DE4 # writes(" \n"); /* start a new print line */ ! 622: 611 00016DE4 .data 1 ! 623: 612 00000df4 * L294: ! 624: 613 00000df4 * 200A00 .ascii " \12\0" ! 625: 614 00000df7 * .text ! 626: 615 00016DE4 dd 8f00000df4 pushl $L294 ! 627: 616 00016DEA fe 08 effffffa6f callf $8,_writes ! 628: 617 00016DF1 # writes("cycle: "); ! 629: 618 00016DF1 .data 1 ! 630: 619 00000df7 * L295: ! 631: 620 00000df7 * 6379636C653A2000 .ascii "cycle: \0" ! 632: 621 00000dff * .text ! 633: 622 00016DF1 dd 8f00000df7 pushl $L295 ! 634: 623 00016DF7 fe 08 effffffa62 callf $8,_writes ! 635: 624 00016DFE # writed( cycle ); ! 636: 625 00016DFE dd effffffa5c pushl _cycle ! 637: 626 00016E04 fe 08 effffffa55 callf $8,_writed ! 638: 627 00016E0B # writes(" ADDD test "); ! 639: 628 00016E0B .data 1 ! 640: 629 00000dff * L296: ! 641: 630 00000dff * 2020414444442074657374200 .ascii " ADDD test \0" ! 642: 0 ! 643: 631 00000e0c * .text ! 644: 632 00016E0B dd 8f00000dff pushl $L296 ! 645: 633 00016E11 fe 08 effffffa48 callf $8,_writes ! 646: 634 00016E18 # writed( test_no ); ! 647: 635 00016E18 dd effffffa42 pushl _test_no ! 648: 636 00016E1E fe 08 effffffa3b callf $8,_writed ! 649: 637 00016E25 # writes(", subtest 4 (2 NOPs) - BAD FINAL ACC\n"); ! 650: 638 00016E25 .data 1 ! 651: 639 00000e0c * L297: ! 652: 640 00000e0c * 2C20737562746573742034202 .ascii ", subtest 4 (2 NOPs) - BAD FINAL ACC\12\0" ! 653: 832204E4F507329202D204241 ! 654: 442046494E414C204143430A0 ! 655: 0 ! 656: 641 00000e32 * .text ! 657: 642 00016E25 dd 8f00000e0c pushl $L297 ! 658: 643 00016E2B fe 08 effffffa2e callf $8,_writes ! 659: 644 00016E32 # print_addd_data(); ! 660: 645 00016E32 fe 04 ef0000052b callf $4,_print_addd_data ! 661: 646 00016E39 # } ! 662: 647 00016E39 # if( halt_flg ) ! 663: 648 00016E39 L293: ! 664: 649 00016E39 5d effffffa21 tstl _halt_flg ! 665: 650 00016E3F 31 09 jeql L298 ! 666: 651 00016E41 # addd_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 667: 652 00016E41 dd 01 pushl $1 ! 668: 653 00016E43 fe 08 ef00000610 callf $8,_addd_er_halt ! 669: 654 00016E4A # if( loop_on_err ) { ! 670: 655 00016E4A L298: ! 671: 656 00016E4A 5d effffffa10 tstl _loop_on_err ! 672: 657 00016E50 31 0a jeql L299 ! 673: 658 00016E52 # force_loop = TRUE; /* set the force loop flag */ ! 674: 659 00016E52 0d 01 effffffa07 movl $1,_force_loop ! 675: 660 00016E59 # asm("brw _addd_4_lp1");; /* and loop on the error */ ! 676: 661 00016E59 13 ff3e brw _addd_4_lp1 ! 677: 662 00016E5C # } /* end of loop on error */ ! 678: 663 00016E5C # } /* end of compare error */ ! 679: 664 00016E5C L299: ! 680: 665 00016E5C # } /* end of WHILE loop */ ! 681: 666 00016E5C L292: ! 682: 667 00016E5C L288: ! 683: 668 00016E5C 6d effffff9fe incl _index ! 684: 669 00016E62 13 fecb jbr L290 ! 685: 670 00016E65 L289: ! 686: 671 00016E65 # } /* end of subtest 4 */ ! 687: 672 00016E65 40 ret#2 ! 688: 673 00016E66 .set L284,0x0 ! 689: 674 00016E66 L286: ! 690: 675 00016E66 13 feb4 jbr L287 ! 691: 676 00016E69 .data ! 692: 677 00000d28 * .text ! 693: 678 00016E69 00 .align 1 ! 694: 679 00016E6A .globl _addd_5 ! 695: 680 00016E6A _addd_5: ! 696: 681 00016E6A 0000 .word L300 ! 697: 682 00016E6C # ! 698: 683 00016E6C # ! 699: 684 00016E6C # ! 700: 685 00016E6C # /************************************************************************ ! 701: 686 00016E6C # * ! 702: 687 00016E6C # * SUBTEST 5 - Wait 1 NOP before storing the results ! 703: 688 00016E6C # * ! 704: 689 00016E6C # ************************************************************************/ ! 705: 690 00016E6C # addd_5() ! 706: 691 00016E6C # { ! 707: 692 00016E6C 13 0148 jbr L302 ! 708: 693 00016E6F L303: ! 709: 694 00016E6F # force_loop = FALSE; ! 710: 695 00016E6F 4d effffff9eb clrl _force_loop ! 711: 696 00016E75 # subtest = 5; ! 712: 697 00016E75 0d 05 effffff9e4 movl $5,_subtest ! 713: 698 00016E7C # for( index = 0; index < max_addd_1_index; index++ ) { ! 714: 699 00016E7C 4d effffff9de clrl _index ! 715: 700 00016E82 L306: ! 716: 701 00016E82 1d effffff9d8 effffff9d3 cmpl _index,_max_addd_1_index ! 717: 702 00016E8D 91 03 13 0124 jgeq L305 ! 718: 703 00016E92 # dbl_ld_acc = addd_1_data[index].op_1; /* get operand 1 */ ! 719: 704 00016E92 5c 18 effffff9c7 50 mull3 $24,_index,r0 ! 720: 705 00016E9A 0c 8f00000000 50 addl2 $_addd_1_data,r0 ! 721: 706 00016EA1 0d a004 effffff9bb movl 4(r0),_dbl_ld_acc+4 ! 722: 707 00016EA9 0d 60 effffff9b0 movl (r0),_dbl_ld_acc ! 723: 708 00016EB0 # dbl_value_1 = addd_1_data[index].op_2; /* get operand 2 */ ! 724: 709 00016EB0 5c 18 effffff9a9 50 mull3 $24,_index,r0 ! 725: 710 00016EB8 0c 8f00000008 50 addl2 $_addd_1_data+8,r0 ! 726: 711 00016EBF 0d a004 effffff99d movl 4(r0),_dbl_value_1+4 ! 727: 712 00016EC7 0d 60 effffff992 movl (r0),_dbl_value_1 ! 728: 713 00016ECE # dbl_expected = addd_1_data[index].exp; /* get expected result */ ! 729: 714 00016ECE 5c 18 effffff98b 50 mull3 $24,_index,r0 ! 730: 715 00016ED6 0c 8f00000010 50 addl2 $_addd_1_data+16,r0 ! 731: 716 00016EDD 0d a004 effffff97f movl 4(r0),_dbl_expected+4 ! 732: 717 00016EE5 0d 60 effffff974 movl (r0),_dbl_expected ! 733: 718 00016EEC # /* ! 734: 719 00016EEC # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 735: 720 00016EEC # * The force loop flag is set after the first error. ! 736: 721 00016EEC # */ ! 737: 722 00016EEC # asm("_addd_5_lp1:"); ! 738: 723 00016EEC _addd_5_lp1: ! 739: 724 00016EEC # asm("ldd _dbl_ld_acc"); /* load the 1st operand */ ! 740: 725 00016EEC 07 effffff96e ldd _dbl_ld_acc ! 741: 726 00016EF2 # asm("nop"); /* delay */ ! 742: 727 00016EF2 10 nop ! 743: 728 00016EF3 # asm("addd _dbl_value_1"); /* add the 2nd operand */ ! 744: 729 00016EF3 c7 effffff967 addd _dbl_value_1 ! 745: 730 00016EF9 # asm("nop"); /* delay before storing */ ! 746: 731 00016EF9 10 nop ! 747: 732 00016EFA # asm("std _dbl_st_acc"); /* store the result */ ! 748: 733 00016EFA 27 effffff960 std _dbl_st_acc ! 749: 734 00016F00 # if( force_loop ) ! 750: 735 00016F00 5d effffff95a tstl _force_loop ! 751: 736 00016F06 31 02 jeql L307 ! 752: 737 00016F08 # asm("brb _addd_5_lp1");; /* loop on the error */ ! 753: 738 00016F08 11 e2 brb _addd_5_lp1 ! 754: 739 00016F0A L307: ! 755: 740 00016F0A # /* ! 756: 741 00016F0A # * end error loop - test the results ! 757: 742 00016F0A # */ ! 758: 743 00016F0A # if( (dbl_st_acc.m != dbl_expected.m) || /* verify the results */ ! 759: 744 00016F0A # (dbl_st_acc.l != dbl_expected.l) ) { ! 760: 745 00016F0A 1d effffff950 effffff94b cmpl _dbl_st_acc,_dbl_expected ! 761: 746 00016F15 21 10 jneq L9995 ! 762: 747 00016F17 1d effffff947 effffff942 cmpl _dbl_st_acc+4,_dbl_expected+4 ! 763: 748 00016F22 21 03 13 0086 jeql L308 ! 764: 749 00016F27 L9995: ! 765: 750 00016F27 # errcnt++; /* bump the error count */ ! 766: 751 00016F27 6d effffff933 incl _errcnt ! 767: 752 00016F2D # if( prt_error ) { ! 768: 753 00016F2D 5d effffff92d tstl _prt_error ! 769: 754 00016F33 31 55 jeql L309 ! 770: 755 00016F35 # writes(" \n"); /* start a new print line */ ! 771: 756 00016F35 .data 1 ! 772: 757 00000e32 * L310: ! 773: 758 00000e32 * 200A00 .ascii " \12\0" ! 774: 759 00000e35 * .text ! 775: 760 00016F35 dd 8f00000e32 pushl $L310 ! 776: 761 00016F3B fe 08 effffff91e callf $8,_writes ! 777: 762 00016F42 # writes("cycle: "); ! 778: 763 00016F42 .data 1 ! 779: 764 00000e35 * L311: ! 780: 765 00000e35 * 6379636C653A2000 .ascii "cycle: \0" ! 781: 766 00000e3d * .text ! 782: 767 00016F42 dd 8f00000e35 pushl $L311 ! 783: 768 00016F48 fe 08 effffff911 callf $8,_writes ! 784: 769 00016F4F # writed( cycle ); ! 785: 770 00016F4F dd effffff90b pushl _cycle ! 786: 771 00016F55 fe 08 effffff904 callf $8,_writed ! 787: 772 00016F5C # writes(" ADDD test "); ! 788: 773 00016F5C .data 1 ! 789: 774 00000e3d * L312: ! 790: 775 00000e3d * 2020414444442074657374200 .ascii " ADDD test \0" ! 791: 0 ! 792: 776 00000e4a * .text ! 793: 777 00016F5C dd 8f00000e3d pushl $L312 ! 794: 778 00016F62 fe 08 effffff8f7 callf $8,_writes ! 795: 779 00016F69 # writed( test_no ); ! 796: 780 00016F69 dd effffff8f1 pushl _test_no ! 797: 781 00016F6F fe 08 effffff8ea callf $8,_writed ! 798: 782 00016F76 # writes(", subtest 5 (1 NOP) - BAD FINAL ACC\n"); ! 799: 783 00016F76 .data 1 ! 800: 784 00000e4a * L313: ! 801: 785 00000e4a * 2C20737562746573742035202 .ascii ", subtest 5 (1 NOP) - BAD FINAL ACC\12\0" ! 802: 831204E4F5029202D20424144 ! 803: 2046494E414C204143430A00 ! 804: 786 00000e6f * .text ! 805: 787 00016F76 dd 8f00000e4a pushl $L313 ! 806: 788 00016F7C fe 08 effffff8dd callf $8,_writes ! 807: 789 00016F83 # print_addd_data(); ! 808: 790 00016F83 fe 04 ef000003da callf $4,_print_addd_data ! 809: 791 00016F8A # } ! 810: 792 00016F8A # if( halt_flg ) ! 811: 793 00016F8A L309: ! 812: 794 00016F8A 5d effffff8d0 tstl _halt_flg ! 813: 795 00016F90 31 09 jeql L314 ! 814: 796 00016F92 # addd_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 815: 797 00016F92 dd 01 pushl $1 ! 816: 798 00016F94 fe 08 ef000004bf callf $8,_addd_er_halt ! 817: 799 00016F9B # if( loop_on_err ) { ! 818: 800 00016F9B L314: ! 819: 801 00016F9B 5d effffff8bf tstl _loop_on_err ! 820: 802 00016FA1 31 0a jeql L315 ! 821: 803 00016FA3 # force_loop = TRUE; /* set the force loop flag */ ! 822: 804 00016FA3 0d 01 effffff8b6 movl $1,_force_loop ! 823: 805 00016FAA # asm("brw _addd_5_lp1"); /* and loop on the error */ ! 824: 806 00016FAA 13 ff3f brw _addd_5_lp1 ! 825: 807 00016FAD # } /* end of loop on error */ ! 826: 808 00016FAD # } /* end of compare error */ ! 827: 809 00016FAD L315: ! 828: 810 00016FAD # } /* end of WHILE loop */ ! 829: 811 00016FAD L308: ! 830: 812 00016FAD L304: ! 831: 813 00016FAD 6d effffff8ad incl _index ! 832: 814 00016FB3 13 fecc jbr L306 ! 833: 815 00016FB6 L305: ! 834: 816 00016FB6 # } /* end of subtest 5 */ ! 835: 817 00016FB6 40 ret#2 ! 836: 818 00016FB7 .set L300,0x0 ! 837: 819 00016FB7 L302: ! 838: 820 00016FB7 13 feb5 jbr L303 ! 839: 821 00016FBA .data ! 840: 822 00000d28 * .text ! 841: 823 00016FBA .align 1 ! 842: 824 00016FBA .globl _addd_6 ! 843: 825 00016FBA _addd_6: ! 844: 826 00016FBA 0000 .word L316 ! 845: 827 00016FBC # ! 846: 828 00016FBC # ! 847: 829 00016FBC # ! 848: 830 00016FBC # /************************************************************************ ! 849: 831 00016FBC # * ! 850: 832 00016FBC # * SUBTEST 6 - Check for register corruption ! 851: 833 00016FBC # * ! 852: 834 00016FBC # ************************************************************************/ ! 853: 835 00016FBC # addd_6() ! 854: 836 00016FBC # { ! 855: 837 00016FBC 13 01c8 jbr L318 ! 856: 838 00016FBF L319: ! 857: 839 00016FBF # force_loop = FALSE; /* clear force_loop flg */ ! 858: 840 00016FBF 4d effffff89b clrl _force_loop ! 859: 841 00016FC5 # subtest = 6; ! 860: 842 00016FC5 0d 06 effffff894 movl $6,_subtest ! 861: 843 00016FCC # fill_reg_buf( load_regs ); /* get patterns for regs */ ! 862: 844 00016FCC dd 8f00000000 pushl $_load_regs ! 863: 845 00016FD2 fe 08 effffff887 callf $8,_fill_reg_buf ! 864: 846 00016FD9 # index = 0; ! 865: 847 00016FD9 4d effffff881 clrl _index ! 866: 848 00016FDF # dbl_ld_acc = addd_1_data[0].op_1; /* get operand 1 */ ! 867: 849 00016FDF 0d effffff87f effffff87a movl _addd_1_data+4,_dbl_ld_acc+4 ! 868: 850 00016FEA 0d effffff870 effffff86b movl _addd_1_data,_dbl_ld_acc ! 869: 851 00016FF5 # dbl_value_1 = addd_1_data[0].op_2; /* get operand 2 */ ! 870: 852 00016FF5 0d effffff871 effffff864 movl _addd_1_data+12,_dbl_value_1+4 ! 871: 853 00017000 0d effffff862 effffff855 movl _addd_1_data+8,_dbl_value_1 ! 872: 854 0001700B # dbl_expected = addd_1_data[0].exp; /* get expected result */ ! 873: 855 0001700B 0d effffff863 effffff84e movl _addd_1_data+20,_dbl_expected+4 ! 874: 856 00017016 0d effffff854 effffff83f movl _addd_1_data+16,_dbl_expected ! 875: 857 00017021 # /* ! 876: 858 00017021 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 877: 859 00017021 # * The force loop flag is set after the first error. ! 878: 860 00017021 # */ ! 879: 861 00017021 # asm("_addd_6_lp1:"); ! 880: 862 00017021 _addd_6_lp1: ! 881: 863 00017021 # asm("ldd _dbl_ld_acc"); /* LOAD the accumulator */ ! 882: 864 00017021 07 effffff839 ldd _dbl_ld_acc ! 883: 865 00017027 # asm("nop"); ! 884: 866 00017027 10 nop ! 885: 867 00017028 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */ ! 886: 868 00017028 ab 891fff effffff82f loadr $0x1fff,_load_regs ! 887: 869 00017031 # asm("nop"); ! 888: 870 00017031 10 nop ! 889: 871 00017032 # asm("addd _dbl_value_1"); /* do the add */ ! 890: 872 00017032 c7 effffff828 addd _dbl_value_1 ! 891: 873 00017038 # asm("nop"); ! 892: 874 00017038 10 nop ! 893: 875 00017039 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */ ! 894: 876 00017039 bb 891fff effffff81e storer $0x1fff,_store_regs ! 895: 877 00017042 # asm("std _dbl_st_acc"); /* save the accumulator */ ! 896: 878 00017042 27 effffff818 std _dbl_st_acc ! 897: 879 00017048 # if( force_loop ) ! 898: 880 00017048 5d effffff812 tstl _force_loop ! 899: 881 0001704E 31 02 jeql L321 ! 900: 882 00017050 # asm("brb _addd_6_lp1");; /* loop on the error */ ! 901: 883 00017050 11 cf brb _addd_6_lp1 ! 902: 884 00017052 L321: ! 903: 885 00017052 # /* ! 904: 886 00017052 # * Now compare the stored register values to those that were loaded ! 905: 887 00017052 # */ ! 906: 888 00017052 # index2 = 0; ! 907: 889 00017052 4d effffff808 clrl _index2 ! 908: 890 00017058 # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) ) ! 909: 891 00017058 L322: ! 910: 892 00017058 0d effffff802 50 movl _index2,r0 ! 911: 893 0001705F 0d effffff7fb 51 movl _index2,r1 ! 912: 894 00017066 1d 40effffff7f3 cmpl _load_regs[r0],_store_regs[r1] ! 913: 41effffff7ed ! 914: 895 00017073 21 11 jneq L323 ! 915: 896 00017075 1d effffff7e5 0d cmpl _index2,$13 ! 916: 897 0001707C 81 08 jgeq L323 ! 917: 898 0001707E # index2++; /* check reg values */ ! 918: 899 0001707E 6d effffff7dc incl _index2 ! 919: 900 00017084 11 d2 jbr L322 ! 920: 901 00017086 L323: ! 921: 902 00017086 # if( index2 < 13 ) { /* error if index2 < 13 */ ! 922: 903 00017086 1d effffff7d4 0d cmpl _index2,$13 ! 923: 904 0001708D 91 03 13 00f4 jgeq L324 ! 924: 905 00017092 # errcnt++; /* bump the error count */ ! 925: 906 00017092 6d effffff7c8 incl _errcnt ! 926: 907 00017098 # if( prt_error ) { ! 927: 908 00017098 5d effffff7c2 tstl _prt_error ! 928: 909 0001709E 21 03 13 00c0 jeql L325 ! 929: 910 000170A3 # writes(" \n"); /* start a new print line */ ! 930: 911 000170A3 .data 1 ! 931: 912 00000e6f * L326: ! 932: 913 00000e6f * 200A00 .ascii " \12\0" ! 933: 914 00000e72 * .text ! 934: 915 000170A3 dd 8f00000e6f pushl $L326 ! 935: 916 000170A9 fe 08 effffff7b0 callf $8,_writes ! 936: 917 000170B0 # writes("cycle: "); ! 937: 918 000170B0 .data 1 ! 938: 919 00000e72 * L327: ! 939: 920 00000e72 * 6379636C653A2000 .ascii "cycle: \0" ! 940: 921 00000e7a * .text ! 941: 922 000170B0 dd 8f00000e72 pushl $L327 ! 942: 923 000170B6 fe 08 effffff7a3 callf $8,_writes ! 943: 924 000170BD # writed( cycle ); ! 944: 925 000170BD dd effffff79d pushl _cycle ! 945: 926 000170C3 fe 08 effffff796 callf $8,_writed ! 946: 927 000170CA # writes(" ADDD test "); ! 947: 928 000170CA .data 1 ! 948: 929 00000e7a * L328: ! 949: 930 00000e7a * 2020414444442074657374200 .ascii " ADDD test \0" ! 950: 0 ! 951: 931 00000e87 * .text ! 952: 932 000170CA dd 8f00000e7a pushl $L328 ! 953: 933 000170D0 fe 08 effffff789 callf $8,_writes ! 954: 934 000170D7 # writed( test_no ); ! 955: 935 000170D7 dd effffff783 pushl _test_no ! 956: 936 000170DD fe 08 effffff77c callf $8,_writed ! 957: 937 000170E4 # writes(", subtest 6 - A REGISTER WAS CHANGED\n"); ! 958: 938 000170E4 .data 1 ! 959: 939 00000e87 * L329: ! 960: 940 00000e87 * 2C20737562746573742036202 .ascii ", subtest 6 - A REGISTER WAS CHANGED\12\0" ! 961: D204120524547495354455220 ! 962: 574153204348414E4745440A0 ! 963: 0 ! 964: 941 00000ead * .text ! 965: 942 000170E4 dd 8f00000e87 pushl $L329 ! 966: 943 000170EA fe 08 effffff76f callf $8,_writes ! 967: 944 000170F1 # print_addd_data(); /* print the operands */ ! 968: 945 000170F1 fe 04 ef0000026c callf $4,_print_addd_data ! 969: 946 000170F8 # writes("register "); /* print the information */ ! 970: 947 000170F8 .data 1 ! 971: 948 00000ead * L330: ! 972: 949 00000ead * 72656769737465722000 .ascii "register \0" ! 973: 950 00000eb7 * .text ! 974: 951 000170F8 dd 8f00000ead pushl $L330 ! 975: 952 000170FE fe 08 effffff75b callf $8,_writes ! 976: 953 00017105 # writed( index2 ); /* about the corrupted */ ! 977: 954 00017105 dd effffff755 pushl _index2 ! 978: 955 0001710B fe 08 effffff74e callf $8,_writed ! 979: 956 00017112 # writes(" = "); /* register */ ! 980: 957 00017112 .data 1 ! 981: 958 00000eb7 * L331: ! 982: 959 00000eb7 * 203D2000 .ascii " = \0" ! 983: 960 00000ebb * .text ! 984: 961 00017112 dd 8f00000eb7 pushl $L331 ! 985: 962 00017118 fe 08 effffff741 callf $8,_writes ! 986: 963 0001711F # write32h( store_regs[index2] ); ! 987: 964 0001711F 0d effffff73b 50 movl _index2,r0 ! 988: 965 00017126 dd 40effffff733 pushl _store_regs[r0] ! 989: 966 0001712D fe 08 effffff72c callf $8,_write32h ! 990: 967 00017134 # writes(", should be = "); ! 991: 968 00017134 .data 1 ! 992: 969 00000ebb * L333: ! 993: 970 00000ebb * 2C202073686F756C642062652 .ascii ", should be = \0" ! 994: 03D2000 ! 995: 971 00000ecb * .text ! 996: 972 00017134 dd 8f00000ebb pushl $L333 ! 997: 973 0001713A fe 08 effffff71f callf $8,_writes ! 998: 974 00017141 # write32h( load_regs[index2] ); ! 999: 975 00017141 0d effffff719 50 movl _index2,r0 ! 1000: 976 00017148 dd 40effffff711 pushl _load_regs[r0] ! 1001: 977 0001714F fe 08 effffff70a callf $8,_write32h ! 1002: 978 00017156 # writes("\n"); ! 1003: 979 00017156 .data 1 ! 1004: 980 00000ecb * L334: ! 1005: 981 00000ecb * 0A00 .ascii "\12\0" ! 1006: 982 00000ecd * .text ! 1007: 983 00017156 dd 8f00000ecb pushl $L334 ! 1008: 984 0001715C fe 08 effffff6fd callf $8,_writes ! 1009: 985 00017163 # } ! 1010: 986 00017163 # if( halt_flg ) ! 1011: 987 00017163 L325: ! 1012: 988 00017163 5d effffff6f7 tstl _halt_flg ! 1013: 989 00017169 31 09 jeql L335 ! 1014: 990 0001716B # addd_er_halt( BAD_REG_HLT ); /* halt on the error */ ! 1015: 991 0001716B dd 02 pushl $2 ! 1016: 992 0001716D fe 08 ef000002e6 callf $8,_addd_er_halt ! 1017: 993 00017174 # if( loop_on_err ) { ! 1018: 994 00017174 L335: ! 1019: 995 00017174 5d effffff6e6 tstl _loop_on_err ! 1020: 996 0001717A 31 0a jeql L336 ! 1021: 997 0001717C # force_loop = TRUE; /* set the force loop flag */ ! 1022: 998 0001717C 0d 01 effffff6dd movl $1,_force_loop ! 1023: 999 00017183 # asm("brw _addd_6_lp1");; /* and loop on the error */ ! 1024: 1000 00017183 13 fe9b brw _addd_6_lp1 ! 1025: 1001 00017186 # } /* end of loop on error */ ! 1026: 1002 00017186 # } /* end of register corruption error */ ! 1027: 1003 00017186 L336: ! 1028: 1004 00017186 # } /* end of subtest 6 */ ! 1029: 1005 00017186 L324: ! 1030: 1006 00017186 40 ret#2 ! 1031: 1007 00017187 .set L316,0x0 ! 1032: 1008 00017187 L318: ! 1033: 1009 00017187 13 fe35 jbr L319 ! 1034: 1010 0001718A .data ! 1035: 1011 00000d28 * .text ! 1036: 1012 0001718A .align 1 ! 1037: 1013 0001718A .globl _addd_7 ! 1038: 1014 0001718A _addd_7: ! 1039: 1015 0001718A 0000 .word L337 ! 1040: 1016 0001718C # ! 1041: 1017 0001718C # ! 1042: 1018 0001718C # ! 1043: 1019 0001718C # /************************************************************************ ! 1044: 1020 0001718C # * ! 1045: 1021 0001718C # * SUBTEST 7 - Check for PSL corruption ! 1046: 1022 0001718C # * ! 1047: 1023 0001718C # ************************************************************************/ ! 1048: 1024 0001718C # addd_7() ! 1049: 1025 0001718C # { ! 1050: 1026 0001718C 13 01d2 jbr L339 ! 1051: 1027 0001718F L340: ! 1052: 1028 0001718F # force_loop = FALSE; /* clear force_loop flg */ ! 1053: 1029 0001718F 4d effffff6cb clrl _force_loop ! 1054: 1030 00017195 # subtest = 7; ! 1055: 1031 00017195 0d 07 effffff6c4 movl $7,_subtest ! 1056: 1032 0001719C # fill_reg_buf( load_regs ); /* get patterns for regs */ ! 1057: 1033 0001719C dd 8f00000000 pushl $_load_regs ! 1058: 1034 000171A2 fe 08 effffff6b7 callf $8,_fill_reg_buf ! 1059: 1035 000171A9 # for( index = 0; index < 3; index++ ) { ! 1060: 1036 000171A9 4d effffff6b1 clrl _index ! 1061: 1037 000171AF L343: ! 1062: 1038 000171AF 1d effffff6ab 03 cmpl _index,$3 ! 1063: 1039 000171B6 91 03 13 01a5 jgeq L342 ! 1064: 1040 000171BB # dbl_ld_acc = addd_1_data[index].op_1; /* get operand 1 */ ! 1065: 1041 000171BB 5c 18 effffff69e 50 mull3 $24,_index,r0 ! 1066: 1042 000171C3 0c 8f00000000 50 addl2 $_addd_1_data,r0 ! 1067: 1043 000171CA 0d a004 effffff692 movl 4(r0),_dbl_ld_acc+4 ! 1068: 1044 000171D2 0d 60 effffff687 movl (r0),_dbl_ld_acc ! 1069: 1045 000171D9 # dbl_value_1 = addd_1_data[index].op_2; /* get operand 2 */ ! 1070: 1046 000171D9 5c 18 effffff680 50 mull3 $24,_index,r0 ! 1071: 1047 000171E1 0c 8f00000008 50 addl2 $_addd_1_data+8,r0 ! 1072: 1048 000171E8 0d a004 effffff674 movl 4(r0),_dbl_value_1+4 ! 1073: 1049 000171F0 0d 60 effffff669 movl (r0),_dbl_value_1 ! 1074: 1050 000171F7 # dbl_expected = addd_1_data[index].exp; /* get expected */ ! 1075: 1051 000171F7 5c 18 effffff662 50 mull3 $24,_index,r0 ! 1076: 1052 000171FF 0c 8f00000010 50 addl2 $_addd_1_data+16,r0 ! 1077: 1053 00017206 0d a004 effffff656 movl 4(r0),_dbl_expected+4 ! 1078: 1054 0001720E 0d 60 effffff64b movl (r0),_dbl_expected ! 1079: 1055 00017215 # sgl_dummy1 = status_array[index]; /* status = +, -, 0 */ ! 1080: 1056 00017215 0d effffff645 50 movl _index,r0 ! 1081: 1057 0001721C 0d 40effffff63d movl _status_array[r0],_sgl_dummy1 ! 1082: effffff638 ! 1083: 1058 00017228 # /* ! 1084: 1059 00017228 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 1085: 1060 00017228 # * The force loop flag is set after the first error. ! 1086: 1061 00017228 # */ ! 1087: 1062 00017228 # asm("_addd_7_lp1:"); ! 1088: 1063 00017228 _addd_7_lp1: ! 1089: 1064 00017228 # asm("ldd _dbl_ld_acc"); /* LOAD the accumulator */ ! 1090: 1065 00017228 07 effffff632 ldd _dbl_ld_acc ! 1091: 1066 0001722E # asm("nop"); ! 1092: 1067 0001722E 10 nop ! 1093: 1068 0001722F # asm("tstl _sgl_dummy1"); /* set the PSL status */ ! 1094: 1069 0001722F 5d effffff62b tstl _sgl_dummy1 ! 1095: 1070 00017235 # asm("movpsl _init_psl"); /* save the initial PSL */ ! 1096: 1071 00017235 cd effffff625 movpsl _init_psl ! 1097: 1072 0001723B # asm("addd _dbl_value_1"); /* do the add */ ! 1098: 1073 0001723B c7 effffff61f addd _dbl_value_1 ! 1099: 1074 00017241 # asm("nop"); ! 1100: 1075 00017241 10 nop ! 1101: 1076 00017242 # asm("movpsl _psl_val"); /* save the final PSL */ ! 1102: 1077 00017242 cd effffff618 movpsl _psl_val ! 1103: 1078 00017248 # asm("std _dbl_st_acc"); /* save the accumulator */ ! 1104: 1079 00017248 27 effffff612 std _dbl_st_acc ! 1105: 1080 0001724E # if( force_loop ) ! 1106: 1081 0001724E 5d effffff60c tstl _force_loop ! 1107: 1082 00017254 31 02 jeql L344 ! 1108: 1083 00017256 # asm("brb _addd_7_lp1");; /* loop on the error */ ! 1109: 1084 00017256 11 d0 brb _addd_7_lp1 ! 1110: 1085 00017258 L344: ! 1111: 1086 00017258 # /* ! 1112: 1087 00017258 # * Now compare the final PSL to the initial PSL -they should be the same ! 1113: 1088 00017258 # */ ! 1114: 1089 00017258 # exp_psl = init_psl; ! 1115: 1090 00017258 0d effffff602 effffff5fd movl _init_psl,_exp_psl ! 1116: 1091 00017263 # if( psl_val != exp_psl ) { ! 1117: 1092 00017263 1d effffff5f7 effffff5f2 cmpl _psl_val,_exp_psl ! 1118: 1093 0001726E 21 03 13 00e4 jeql L345 ! 1119: 1094 00017273 # errcnt++; /* bump the error count */ ! 1120: 1095 00017273 6d effffff5e7 incl _errcnt ! 1121: 1096 00017279 # if( prt_error ) { ! 1122: 1097 00017279 5d effffff5e1 tstl _prt_error ! 1123: 1098 0001727F 21 03 13 00b0 jeql L346 ! 1124: 1099 00017284 # writes(" \n"); /* start a new print line */ ! 1125: 1100 00017284 .data 1 ! 1126: 1101 00000ecd * L347: ! 1127: 1102 00000ecd * 200A00 .ascii " \12\0" ! 1128: 1103 00000ed0 * .text ! 1129: 1104 00017284 dd 8f00000ecd pushl $L347 ! 1130: 1105 0001728A fe 08 effffff5cf callf $8,_writes ! 1131: 1106 00017291 # writes("cycle: "); ! 1132: 1107 00017291 .data 1 ! 1133: 1108 00000ed0 * L348: ! 1134: 1109 00000ed0 * 6379636C653A2000 .ascii "cycle: \0" ! 1135: 1110 00000ed8 * .text ! 1136: 1111 00017291 dd 8f00000ed0 pushl $L348 ! 1137: 1112 00017297 fe 08 effffff5c2 callf $8,_writes ! 1138: 1113 0001729E # writed( cycle ); ! 1139: 1114 0001729E dd effffff5bc pushl _cycle ! 1140: 1115 000172A4 fe 08 effffff5b5 callf $8,_writed ! 1141: 1116 000172AB # writes(" ADDD test "); ! 1142: 1117 000172AB .data 1 ! 1143: 1118 00000ed8 * L349: ! 1144: 1119 00000ed8 * 2020414444442074657374200 .ascii " ADDD test \0" ! 1145: 0 ! 1146: 1120 00000ee5 * .text ! 1147: 1121 000172AB dd 8f00000ed8 pushl $L349 ! 1148: 1122 000172B1 fe 08 effffff5a8 callf $8,_writes ! 1149: 1123 000172B8 # writed( test_no ); ! 1150: 1124 000172B8 dd effffff5a2 pushl _test_no ! 1151: 1125 000172BE fe 08 effffff59b callf $8,_writed ! 1152: 1126 000172C5 # writes(", subtest 7 - INCORRECT FINAL PSL\n"); ! 1153: 1127 000172C5 .data 1 ! 1154: 1128 00000ee5 * L350: ! 1155: 1129 00000ee5 * 2C20737562746573742037202 .ascii ", subtest 7 - INCORRECT FINAL PSL\12\0" ! 1156: D20494E434F52524543542046 ! 1157: 494E414C2050534C0A00 ! 1158: 1130 00000f08 * .text ! 1159: 1131 000172C5 dd 8f00000ee5 pushl $L350 ! 1160: 1132 000172CB fe 08 effffff58e callf $8,_writes ! 1161: 1133 000172D2 # print_addd_data(); /* print the operands */ ! 1162: 1134 000172D2 fe 04 ef0000008b callf $4,_print_addd_data ! 1163: 1135 000172D9 # writes("initial PSL = "); ! 1164: 1136 000172D9 .data 1 ! 1165: 1137 00000f08 * L351: ! 1166: 1138 00000f08 * 696E697469616C2050534C203 .ascii "initial PSL = \0" ! 1167: D2000 ! 1168: 1139 00000f17 * .text ! 1169: 1140 000172D9 dd 8f00000f08 pushl $L351 ! 1170: 1141 000172DF fe 08 effffff57a callf $8,_writes ! 1171: 1142 000172E6 # write32h( init_psl ); ! 1172: 1143 000172E6 dd effffff574 pushl _init_psl ! 1173: 1144 000172EC fe 08 effffff56d callf $8,_write32h ! 1174: 1145 000172F3 # writes(", final PSL = "); ! 1175: 1146 000172F3 .data 1 ! 1176: 1147 00000f17 * L352: ! 1177: 1148 00000f17 * 2C202066696E616C2050534C2 .ascii ", final PSL = \0" ! 1178: 03D2000 ! 1179: 1149 00000f27 * .text ! 1180: 1150 000172F3 dd 8f00000f17 pushl $L352 ! 1181: 1151 000172F9 fe 08 effffff560 callf $8,_writes ! 1182: 1152 00017300 # write32h( psl_val ); ! 1183: 1153 00017300 dd effffff55a pushl _psl_val ! 1184: 1154 00017306 fe 08 effffff553 callf $8,_write32h ! 1185: 1155 0001730D # writes(", expected PSL = "); ! 1186: 1156 0001730D .data 1 ! 1187: 1157 00000f27 * L353: ! 1188: 1158 00000f27 * 2C20206578706563746564205 .ascii ", expected PSL = \0" ! 1189: 0534C203D2000 ! 1190: 1159 00000f3a * .text ! 1191: 1160 0001730D dd 8f00000f27 pushl $L353 ! 1192: 1161 00017313 fe 08 effffff546 callf $8,_writes ! 1193: 1162 0001731A # write32h( exp_psl ); ! 1194: 1163 0001731A dd effffff540 pushl _exp_psl ! 1195: 1164 00017320 fe 08 effffff539 callf $8,_write32h ! 1196: 1165 00017327 # writes("\n"); ! 1197: 1166 00017327 .data 1 ! 1198: 1167 00000f3a * L354: ! 1199: 1168 00000f3a * 0A00 .ascii "\12\0" ! 1200: 1169 00000f3c * .text ! 1201: 1170 00017327 dd 8f00000f3a pushl $L354 ! 1202: 1171 0001732D fe 08 effffff52c callf $8,_writes ! 1203: 1172 00017334 # } ! 1204: 1173 00017334 # if( halt_flg ) ! 1205: 1174 00017334 L346: ! 1206: 1175 00017334 5d effffff526 tstl _halt_flg ! 1207: 1176 0001733A 31 09 jeql L355 ! 1208: 1177 0001733C # addd_er_halt( BAD_PSL_HLT ); /* halt on the error */ ! 1209: 1178 0001733C dd 03 pushl $3 ! 1210: 1179 0001733E fe 08 ef00000115 callf $8,_addd_er_halt ! 1211: 1180 00017345 # if( loop_on_err ) { ! 1212: 1181 00017345 L355: ! 1213: 1182 00017345 5d effffff515 tstl _loop_on_err ! 1214: 1183 0001734B 31 0a jeql L356 ! 1215: 1184 0001734D # force_loop = TRUE; /* set the force loop flag */ ! 1216: 1185 0001734D 0d 01 effffff50c movl $1,_force_loop ! 1217: 1186 00017354 # asm("brw _addd_7_lp1");; /* and loop on the error */ ! 1218: 1187 00017354 13 fed1 brw _addd_7_lp1 ! 1219: 1188 00017357 # } /* end of loop on error */ ! 1220: 1189 00017357 # } /* end of PSL corruption error */ ! 1221: 1190 00017357 L356: ! 1222: 1191 00017357 # } /* end of WHILE loop */ ! 1223: 1192 00017357 L345: ! 1224: 1193 00017357 L341: ! 1225: 1194 00017357 6d effffff503 incl _index ! 1226: 1195 0001735D 13 fe4f jbr L343 ! 1227: 1196 00017360 L342: ! 1228: 1197 00017360 # } /* end of subtest 7 */ ! 1229: 1198 00017360 40 ret#2 ! 1230: 1199 00017361 .set L337,0x0 ! 1231: 1200 00017361 L339: ! 1232: 1201 00017361 13 fe2b jbr L340 ! 1233: 1202 00017364 .data ! 1234: 1203 00000d28 * .text ! 1235: 1204 00017364 .align 1 ! 1236: 1205 00017364 .globl _print_addd_data ! 1237: 1206 00017364 _print_addd_data: ! 1238: 1207 00017364 0000 .word L357 ! 1239: 1208 00017366 # ! 1240: 1209 00017366 # ! 1241: 1210 00017366 # ! 1242: 1211 00017366 # /************************************************************************** ! 1243: 1212 00017366 # * ! 1244: 1213 00017366 # * PRINT THE DATA AND STORE RESULTS ! 1245: 1214 00017366 # * ! 1246: 1215 00017366 # * initial Acc = xxxxxxxx xxxxxxxx, stored = xxxxxxxx xxxxxxxx, index = xx ! 1247: 1216 00017366 # * operand = xxxxxxxx xxxxxxxx, expected = xxxxxxxx xxxxxxxx ! 1248: 1217 00017366 # **************************************************************************/ ! 1249: 1218 00017366 # print_addd_data() ! 1250: 1219 00017366 # { ! 1251: 1220 00017366 13 00ed jbr L359 ! 1252: 1221 00017369 L360: ! 1253: 1222 00017369 # writes("initial Acc = "); ! 1254: 1223 00017369 .data 1 ! 1255: 1224 00000f3c * L361: ! 1256: 1225 00000f3c * 696E697469616C20416363203 .ascii "initial Acc = \0" ! 1257: D2000 ! 1258: 1226 00000f4b * .text ! 1259: 1227 00017369 dd 8f00000f3c pushl $L361 ! 1260: 1228 0001736F fe 08 effffff4ea callf $8,_writes ! 1261: 1229 00017376 # write32h( dbl_ld_acc.m ); ! 1262: 1230 00017376 dd effffff4e4 pushl _dbl_ld_acc ! 1263: 1231 0001737C fe 08 effffff4dd callf $8,_write32h ! 1264: 1232 00017383 # writec(' '); ! 1265: 1233 00017383 dd 20 pushl $32 ! 1266: 1234 00017385 fe 08 effffff4d4 callf $8,_writec ! 1267: 1235 0001738C # write32h( dbl_ld_acc.l ); ! 1268: 1236 0001738C dd effffff4d2 pushl _dbl_ld_acc+4 ! 1269: 1237 00017392 fe 08 effffff4c7 callf $8,_write32h ! 1270: 1238 00017399 # writes(", stored = "); ! 1271: 1239 00017399 .data 1 ! 1272: 1240 00000f4b * L363: ! 1273: 1241 00000f4b * 2C2020202073746F726564203 .ascii ", stored = \0" ! 1274: D2000 ! 1275: 1242 00000f5a * .text ! 1276: 1243 00017399 dd 8f00000f4b pushl $L363 ! 1277: 1244 0001739F fe 08 effffff4ba callf $8,_writes ! 1278: 1245 000173A6 # write32h( dbl_st_acc.m ); ! 1279: 1246 000173A6 dd effffff4b4 pushl _dbl_st_acc ! 1280: 1247 000173AC fe 08 effffff4ad callf $8,_write32h ! 1281: 1248 000173B3 # writec(' '); ! 1282: 1249 000173B3 dd 20 pushl $32 ! 1283: 1250 000173B5 fe 08 effffff4a4 callf $8,_writec ! 1284: 1251 000173BC # write32h( dbl_st_acc.l ); ! 1285: 1252 000173BC dd effffff4a2 pushl _dbl_st_acc+4 ! 1286: 1253 000173C2 fe 08 effffff497 callf $8,_write32h ! 1287: 1254 000173C9 # writes(", index = "); ! 1288: 1255 000173C9 .data 1 ! 1289: 1256 00000f5a * L364: ! 1290: 1257 00000f5a * 2C202020696E646578203D200 .ascii ", index = \0" ! 1291: 0 ! 1292: 1258 00000f67 * .text ! 1293: 1259 000173C9 dd 8f00000f5a pushl $L364 ! 1294: 1260 000173CF fe 08 effffff48a callf $8,_writes ! 1295: 1261 000173D6 # writed( index ); ! 1296: 1262 000173D6 dd effffff484 pushl _index ! 1297: 1263 000173DC fe 08 effffff47d callf $8,_writed ! 1298: 1264 000173E3 # writec('\n'); ! 1299: 1265 000173E3 dd 0a pushl $10 ! 1300: 1266 000173E5 fe 08 effffff474 callf $8,_writec ! 1301: 1267 000173EC # writes(" operand = "); ! 1302: 1268 000173EC .data 1 ! 1303: 1269 00000f67 * L365: ! 1304: 1270 00000f67 * 202020206F706572616E64203 .ascii " operand = \0" ! 1305: D2000 ! 1306: 1271 00000f76 * .text ! 1307: 1272 000173EC dd 8f00000f67 pushl $L365 ! 1308: 1273 000173F2 fe 08 effffff467 callf $8,_writes ! 1309: 1274 000173F9 # write32h( dbl_value_1.m ); ! 1310: 1275 000173F9 dd effffff461 pushl _dbl_value_1 ! 1311: 1276 000173FF fe 08 effffff45a callf $8,_write32h ! 1312: 1277 00017406 # writec(' '); ! 1313: 1278 00017406 dd 20 pushl $32 ! 1314: 1279 00017408 fe 08 effffff451 callf $8,_writec ! 1315: 1280 0001740F # write32h( dbl_value_1.l ); ! 1316: 1281 0001740F dd effffff44f pushl _dbl_value_1+4 ! 1317: 1282 00017415 fe 08 effffff444 callf $8,_write32h ! 1318: 1283 0001741C # writes(", expected = "); ! 1319: 1284 0001741C .data 1 ! 1320: 1285 00000f76 * L366: ! 1321: 1286 00000f76 * 2C20206578706563746564203 .ascii ", expected = \0" ! 1322: D2000 ! 1323: 1287 00000f85 * .text ! 1324: 1288 0001741C dd 8f00000f76 pushl $L366 ! 1325: 1289 00017422 fe 08 effffff437 callf $8,_writes ! 1326: 1290 00017429 # write32h( dbl_expected.m ); ! 1327: 1291 00017429 dd effffff431 pushl _dbl_expected ! 1328: 1292 0001742F fe 08 effffff42a callf $8,_write32h ! 1329: 1293 00017436 # writec(' '); ! 1330: 1294 00017436 dd 20 pushl $32 ! 1331: 1295 00017438 fe 08 effffff421 callf $8,_writec ! 1332: 1296 0001743F # write32h( dbl_expected.l ); ! 1333: 1297 0001743F dd effffff41f pushl _dbl_expected+4 ! 1334: 1298 00017445 fe 08 effffff414 callf $8,_write32h ! 1335: 1299 0001744C # writec('\n'); ! 1336: 1300 0001744C dd 0a pushl $10 ! 1337: 1301 0001744E fe 08 effffff40b callf $8,_writec ! 1338: 1302 00017455 # } ! 1339: 1303 00017455 40 ret#2 ! 1340: 1304 00017456 .set L357,0x0 ! 1341: 1305 00017456 L359: ! 1342: 1306 00017456 13 ff10 jbr L360 ! 1343: 1307 00017459 .data ! 1344: 1308 00000d28 * .text ! 1345: 1309 00017459 00 .align 1 ! 1346: 1310 0001745A .globl _addd_er_halt ! 1347: 1311 0001745A _addd_er_halt: ! 1348: 1312 0001745A 0000 .word L367 ! 1349: 1313 0001745C # ! 1350: 1314 0001745C # ! 1351: 1315 0001745C # ! 1352: 1316 0001745C # /************************************************************************** ! 1353: 1317 0001745C # * ! 1354: 1318 0001745C # * HALT ON ERROR ROUTINE ! 1355: 1319 0001745C # * ! 1356: 1320 0001745C # **************************************************************************/ ! 1357: 1321 0001745C # addd_er_halt( halt_code ) ! 1358: 1322 0001745C # int halt_code; ! 1359: 1323 0001745C # { ! 1360: 1324 0001745C 13 0123 jbr L369 ! 1361: 1325 0001745F L370: ! 1362: 1326 0001745F # sgl_value_1 = dbl_ld_acc.m; ! 1363: 1327 0001745F 0d effffff3fb effffff3f6 movl _dbl_ld_acc,_sgl_value_1 ! 1364: 1328 0001746A # sgl_value_2 = dbl_ld_acc.l; ! 1365: 1329 0001746A 0d effffff3f4 effffff3eb movl _dbl_ld_acc+4,_sgl_value_2 ! 1366: 1330 00017475 # sgl_value_3 = dbl_value_1.m; ! 1367: 1331 00017475 0d effffff3e5 effffff3e0 movl _dbl_value_1,_sgl_value_3 ! 1368: 1332 00017480 # sgl_value_4 = dbl_value_1.l; ! 1369: 1333 00017480 0d effffff3de effffff3d5 movl _dbl_value_1+4,_sgl_value_4 ! 1370: 1334 0001748B # sgl_value_5 = dbl_st_acc.m; ! 1371: 1335 0001748B 0d effffff3cf effffff3ca movl _dbl_st_acc,_sgl_value_5 ! 1372: 1336 00017496 # sgl_value_6 = dbl_st_acc.l; ! 1373: 1337 00017496 0d effffff3c8 effffff3bf movl _dbl_st_acc+4,_sgl_value_6 ! 1374: 1338 000174A1 # sgl_dummy1 = halt_code; /* get the error type */ ! 1375: 1339 000174A1 0d ad04 effffff3b7 movl 4(fp),_sgl_dummy1 ! 1376: 1340 000174A9 # asm("movl _test_no,r0"); /* r0 = test number */ ! 1377: 1341 000174A9 0d effffff3b1 50 movl _test_no,r0 ! 1378: 1342 000174B0 # asm("movl _subtest,r1"); /* r1 = subtest number */ ! 1379: 1343 000174B0 0d effffff3aa 51 movl _subtest,r1 ! 1380: 1344 000174B7 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */ ! 1381: 1345 000174B7 0d effffff3a3 52 movl _sgl_dummy1,r2 ! 1382: 1346 000174BE # asm("movl _cycle,r3"); /* r3 = cycle count */ ! 1383: 1347 000174BE 0d effffff39c 53 movl _cycle,r3 ! 1384: 1348 000174C5 # asm("movl _sgl_value_1,r4"); /* r4 = MS operand 1 */ ! 1385: 1349 000174C5 0d effffff395 54 movl _sgl_value_1,r4 ! 1386: 1350 000174CC # asm("movl _sgl_value_2,r5"); /* r5 = LS operand 1 */ ! 1387: 1351 000174CC 0d effffff38e 55 movl _sgl_value_2,r5 ! 1388: 1352 000174D3 # asm("movl _sgl_value_3,r6"); /* r6 = MS operand 2 */ ! 1389: 1353 000174D3 0d effffff387 56 movl _sgl_value_3,r6 ! 1390: 1354 000174DA # asm("movl _sgl_value_4,r7"); /* r7 = LS operand 2 */ ! 1391: 1355 000174DA 0d effffff380 57 movl _sgl_value_4,r7 ! 1392: 1356 000174E1 # asm("movl _sgl_value_5,r8"); /* r8 = MS stored */ ! 1393: 1357 000174E1 0d effffff379 58 movl _sgl_value_5,r8 ! 1394: 1358 000174E8 # asm("movl _sgl_value_6,r9"); /* r9 = LS stored */ ! 1395: 1359 000174E8 0d effffff372 59 movl _sgl_value_6,r9 ! 1396: 1360 000174EF # if( halt_code == BAD_ACC_HLT ) { ! 1397: 1361 000174EF 1d ad04 01 cmpl 4(fp),$1 ! 1398: 1362 000174F3 21 2d jneq L371 ! 1399: 1363 000174F5 # sgl_value_1 = dbl_expected.m; ! 1400: 1364 000174F5 0d effffff365 effffff360 movl _dbl_expected,_sgl_value_1 ! 1401: 1365 00017500 # sgl_value_2 = dbl_expected.l; ! 1402: 1366 00017500 0d effffff35e effffff355 movl _dbl_expected+4,_sgl_value_2 ! 1403: 1367 0001750B # asm("movl _sgl_value_1,r10"); /* r10 = MS expected */ ! 1404: 1368 0001750B 0d effffff34f 5a movl _sgl_value_1,r10 ! 1405: 1369 00017512 # asm("movl _sgl_value_2,r11"); /* r11 = LS expected */ ! 1406: 1370 00017512 0d effffff348 5b movl _sgl_value_2,r11 ! 1407: 1371 00017519 # asm("movl _index2,r12"); /* r12 = data index */ ! 1408: 1372 00017519 0d effffff341 5c movl _index2,r12 ! 1409: 1373 00017520 # } else ! 1410: 1374 00017520 11 5e jbr L372 ! 1411: 1375 00017522 L371: ! 1412: 1376 00017522 # if( halt_code == BAD_REG_HLT ) { ! 1413: 1377 00017522 1d ad04 02 cmpl 4(fp),$2 ! 1414: 1378 00017526 21 3d jneq L373 ! 1415: 1379 00017528 # sgl_dummy1 = load_regs[index2]; ! 1416: 1380 00017528 0d effffff332 50 movl _index2,r0 ! 1417: 1381 0001752F 0d 40effffff32a movl _load_regs[r0],_sgl_dummy1 ! 1418: effffff325 ! 1419: 1382 0001753B # sgl_dummy2 = store_regs[index2]; ! 1420: 1383 0001753B 0d effffff31f 50 movl _index2,r0 ! 1421: 1384 00017542 0d 40effffff317 movl _store_regs[r0],_sgl_dummy2 ! 1422: effffff312 ! 1423: 1385 0001754E # asm("movl _index2,r10"); /* r10 = bad register # */ ! 1424: 1386 0001754E 0d effffff30c 5a movl _index2,r10 ! 1425: 1387 00017555 # asm("movl _sgl_dummy2,r11"); /* r11 = actual value */ ! 1426: 1388 00017555 0d effffff305 5b movl _sgl_dummy2,r11 ! 1427: 1389 0001755C # asm("movl _sgl_dummy1,r12"); /* r12 = expected value */ ! 1428: 1390 0001755C 0d effffff2fe 5c movl _sgl_dummy1,r12 ! 1429: 1391 00017563 # } else ! 1430: 1392 00017563 11 1b jbr L374 ! 1431: 1393 00017565 L373: ! 1432: 1394 00017565 # if( halt_code == BAD_PSL_HLT ) { ! 1433: 1395 00017565 1d ad04 03 cmpl 4(fp),$3 ! 1434: 1396 00017569 21 15 jneq L375 ! 1435: 1397 0001756B # asm("movl _init_psl,r10"); /* r10 = initial PSL */ ! 1436: 1398 0001756B 0d effffff2ef 5a movl _init_psl,r10 ! 1437: 1399 00017572 # asm("movl _psl_val,r11"); /* r11 = final PSL */ ! 1438: 1400 00017572 0d effffff2e8 5b movl _psl_val,r11 ! 1439: 1401 00017579 # asm("movl _exp_psl,r12"); /* r12 = expected PSL */ ! 1440: 1402 00017579 0d effffff2e1 5c movl _exp_psl,r12 ! 1441: 1403 00017580 # }; ! 1442: 1404 00017580 L375: ! 1443: 1405 00017580 L374: ! 1444: 1406 00017580 L372: ! 1445: 1407 00017580 # asm("halt"); /* HALT ... */ ! 1446: 1408 00017580 00 halt ! 1447: 1409 00017581 # } ! 1448: 1410 00017581 40 ret#2 ! 1449: 1411 00017582 .set L367,0x0 ! 1450: 1412 00017582 L369: ! 1451: 1413 00017582 13 feda jbr L370 ! 1452: 1414 00017585 .data ! 1453: 1414 0002DDE5 .data
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.