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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
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Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 00000d28 * .text
4 00000000 .align 1
5 00000000 .globl _addd
6 00000000 _addd:
7 00016860 0000 .word L215
8 00016862 #
9 00016862 #
10 00016862 # #include "fpp_defs.h"
11 00016862 #
12 00016862 #
13 00016862 # /*****************************************************************************
14 00016862 # *
15 00016862 # * ADDD - DOUBLE PRECISION FLOATING POINT ADD TEST
16 00016862 # *
17 00016862 # *****************************************************************************/
18 00016862 # addd()
19 00016862 # {
20 00016862 11 7a jbr L217
21 00016864 L218:
22 00016864 # asm(".globl _addd_t");
23 00016864 .globl _addd_t
24 00016864 # asm("_addd_t:"); /* entry address */
25 00016864 _addd_t:
26 00016864 # if( (cycle == 1) && (prt_hdrs) ) /* print headers on 1st cycle */
27 00016864 1d effffffff6 01 cmpl _cycle,$1
28 0001686B 21 15 jneq L219
29 0001686D 5d efffffffed tstl _prt_hdrs
30 00016873 31 0d jeql L219
31 00016875 # writes(" ADDD");
32 00016875 .data 1
33 00000d28 * L221:
34 00000d28 * 204144444400 .ascii " ADDD\0"
35 00000d2e * .text
36 00016875 dd 8f00000d28 pushl $L221
37 0001687B fe 08 efffffffde callf $8,_writes
38 00016882 # addd_1(); /* add through a register */
39 00016882 L219:
40 00016882 fe 04 ef00000057 callf $4,_addd_1
41 00016889 # addd_2(); /* add through the cache */
42 00016889 fe 04 ef000001b2 callf $4,_addd_2
43 00016890 # addd_3(); /* wait 1 NOP before storeing */
44 00016890 fe 04 ef000002f9 callf $4,_addd_3
45 00016897 # for( nop_cnt = 3; nop_cnt > 0; nop_cnt-- )
46 00016897 0d 03 efffffffc2 movl $3,_nop_cnt
47 0001689E L227:
48 0001689E 5d efffffffbc tstl _nop_cnt
49 000168A4 51 15 jleq L226
50 000168A6 # addd_3(nop_cnt); /* wait 6 ... 2 NOPs */
51 000168A6 dd efffffffb4 pushl _nop_cnt
52 000168AC fe 08 ef000002dd callf $8,_addd_3
53 000168B3 L225:
54 000168B3 7d efffffffa7 decl _nop_cnt
55 000168B9 11 e3 jbr L227
56 000168BB L226:
57 000168BB # addd_4(); /* wait 3 NOPs */
58 000168BB fe 04 ef00000456 callf $4,_addd_4
59 000168C2 # addd_5(); /* wait 1 NOP before storing */
60 000168C2 fe 04 ef000005a1 callf $4,_addd_5
61 000168C9 # addd_6(); /* register stability test */
62 000168C9 fe 04 ef000006ea callf $4,_addd_6
63 000168D0 # addd_7(); /* PSL stability test */
64 000168D0 fe 04 ef000008b3 callf $4,_addd_7
65 000168D7 # asm("jmp *return"); /* return to the test monitor */
66 000168D7 71 ffffffff83 jmp *return
67 000168DD # }
68 000168DD 40 ret#2
69 000168DE .set L215,0x0
70 000168DE L217:
71 000168DE 11 84 jbr L218
72 000168E0 .data
73 00000d28 * .text
74 000168E0 .align 1
75 000168E0 .globl _addd_1
76 000168E0 _addd_1:
77 000168E0 0000 .word L232
78 000168E2 #
79 000168E2 #
80 000168E2 #
81 000168E2 # /************************************************************************
82 000168E2 # *
83 000168E2 # * SUBTEST 1 - add through a register
84 000168E2 # *
85 000168E2 # ************************************************************************/
86 000168E2 # addd_1()
87 000168E2 # {
88 000168E2 13 015a jbr L234
89 000168E5 L235:
90 000168E5 # force_loop = FALSE;
91 000168E5 4d efffffff75 clrl _force_loop
92 000168EB # subtest = 1;
93 000168EB 0d 01 efffffff6e movl $1,_subtest
94 000168F2 # for( index = 0; index < max_addd_1_index; index++ ) {
95 000168F2 4d efffffff68 clrl _index
96 000168F8 L238:
97 000168F8 1d efffffff62 efffffff5d cmpl _index,_max_addd_1_index
98 00016903 91 03 13 0136 jgeq L237
99 00016908 # dbl_ld_acc = addd_1_data[index].op_1; /* get operand 1 */
100 00016908 5c 18 efffffff51 50 mull3 $24,_index,r0
101 00016910 0c 8f00000000 50 addl2 $_addd_1_data,r0
102 00016917 0d a004 efffffff45 movl 4(r0),_dbl_ld_acc+4
103 0001691F 0d 60 efffffff3a movl (r0),_dbl_ld_acc
104 00016926 # dbl_value_1 = addd_1_data[index].op_2; /* get operand 2 */
105 00016926 5c 18 efffffff33 50 mull3 $24,_index,r0
106 0001692E 0c 8f00000008 50 addl2 $_addd_1_data+8,r0
107 00016935 0d a004 efffffff27 movl 4(r0),_dbl_value_1+4
108 0001693D 0d 60 efffffff1c movl (r0),_dbl_value_1
109 00016944 # dbl_expected = addd_1_data[index].exp; /* get expected result */
110 00016944 5c 18 efffffff15 50 mull3 $24,_index,r0
111 0001694C 0c 8f00000010 50 addl2 $_addd_1_data+16,r0
112 00016953 0d a004 efffffff09 movl 4(r0),_dbl_expected+4
113 0001695B 0d 60 effffffefe movl (r0),_dbl_expected
114 00016962 # /*
115 00016962 # * If LOOP ON ERROR is set, this is the loop for this subtest.
116 00016962 # * The force loop flag is set after the first error.
117 00016962 # */
118 00016962 # asm("_addd_1_lp1:");
119 00016962 _addd_1_lp1:
120 00016962 # asm("movl _dbl_ld_acc,r2"); /* move operand 1 to r2/r3 */
121 00016962 0d effffffef8 52 movl _dbl_ld_acc,r2
122 00016969 # asm("movl _dbl_ld_acc+4,r3");
123 00016969 0d effffffef5 53 movl _dbl_ld_acc+4,r3
124 00016970 # asm("movl _dbl_value_1,r4"); /* move operand 2 to r4/r5 */
125 00016970 0d effffffeea 54 movl _dbl_value_1,r4
126 00016977 # asm("movl _dbl_value_1+4,r5");
127 00016977 0d effffffee7 55 movl _dbl_value_1+4,r5
128 0001697E # asm("ldd r2"); /* load the 1st operand */
129 0001697E 07 52 ldd r2
130 00016980 # asm("addd r4"); /* add the 2nd operand */
131 00016980 c7 54 addd r4
132 00016982 # asm("std _dbl_st_acc"); /* store the result */
133 00016982 27 effffffed8 std _dbl_st_acc
134 00016988 # if( force_loop )
135 00016988 5d effffffed2 tstl _force_loop
136 0001698E 31 02 jeql L239
137 00016990 # asm("brb _addd_1_lp1");; /* loop on the error */
138 00016990 11 d0 brb _addd_1_lp1
139 00016992 L239:
140 00016992 # /*
141 00016992 # * end error loop - test the results
142 00016992 # */
143 00016992 # if( (dbl_st_acc.m != dbl_expected.m) || /* verify the results */
144 00016992 # (dbl_st_acc.l != dbl_expected.l) ) {
145 00016992 1d effffffec8 effffffec3 cmpl _dbl_st_acc,_dbl_expected
146 0001699D 21 10 jneq L9999
147 0001699F 1d effffffebf effffffeba cmpl _dbl_st_acc+4,_dbl_expected+4
148 000169AA 21 03 13 0086 jeql L240
149 000169AF L9999:
150 000169AF # errcnt++; /* bump the error count */
151 000169AF 6d effffffeab incl _errcnt
152 000169B5 # if( prt_error ) {
153 000169B5 5d effffffea5 tstl _prt_error
154 000169BB 31 55 jeql L241
155 000169BD # writes(" \n"); /* start a new print line */
156 000169BD .data 1
157 00000d2e * L242:
158 00000d2e * 200A00 .ascii " \12\0"
159 00000d31 * .text
160 000169BD dd 8f00000d2e pushl $L242
161 000169C3 fe 08 effffffe96 callf $8,_writes
162 000169CA # writes("cycle: ");
163 000169CA .data 1
164 00000d31 * L243:
165 00000d31 * 6379636C653A2000 .ascii "cycle: \0"
166 00000d39 * .text
167 000169CA dd 8f00000d31 pushl $L243
168 000169D0 fe 08 effffffe89 callf $8,_writes
169 000169D7 # writed( cycle );
170 000169D7 dd effffffe83 pushl _cycle
171 000169DD fe 08 effffffe7c callf $8,_writed
172 000169E4 # writes(" ADDD test ");
173 000169E4 .data 1
174 00000d39 * L245:
175 00000d39 * 2020414444442074657374200 .ascii " ADDD test \0"
0
176 00000d46 * .text
177 000169E4 dd 8f00000d39 pushl $L245
178 000169EA fe 08 effffffe6f callf $8,_writes
179 000169F1 # writed( test_no );
180 000169F1 dd effffffe69 pushl _test_no
181 000169F7 fe 08 effffffe62 callf $8,_writed
182 000169FE # writes(", subtest 1 (Reg. Data) - BAD FINAL ACC\n");
183 000169FE .data 1
184 00000d46 * L246:
185 00000d46 * 2C20737562746573742031202 .ascii ", subtest 1 (Reg. Data) - BAD FINAL ACC\12\0"
85265672E204461746129202D
204241442046494E414C20414
3430A00
186 00000d6f * .text
187 000169FE dd 8f00000d46 pushl $L246
188 00016A04 fe 08 effffffe55 callf $8,_writes
189 00016A0B # print_addd_data();
190 00016A0B fe 04 ef00000952 callf $4,_print_addd_data
191 00016A12 # }
192 00016A12 # if( halt_flg )
193 00016A12 L241:
194 00016A12 5d effffffe48 tstl _halt_flg
195 00016A18 31 09 jeql L248
196 00016A1A # addd_er_halt( BAD_ACC_HLT ); /* halt on the error */
197 00016A1A dd 01 pushl $1
198 00016A1C fe 08 ef00000a37 callf $8,_addd_er_halt
199 00016A23 # if( loop_on_err ) {
200 00016A23 L248:
201 00016A23 5d effffffe37 tstl _loop_on_err
202 00016A29 31 0a jeql L250
203 00016A2B # force_loop = TRUE; /* set the force loop flag */
204 00016A2B 0d 01 effffffe2e movl $1,_force_loop
205 00016A32 # asm("brw _addd_1_lp1");; /* and loop on the error */
206 00016A32 13 ff2d brw _addd_1_lp1
207 00016A35 # } /* end of loop on error */
208 00016A35 # } /* end of compare error */
209 00016A35 L250:
210 00016A35 # } /* end of WHILE loop */
211 00016A35 L240:
212 00016A35 L236:
213 00016A35 6d effffffe25 incl _index
214 00016A3B 13 feba jbr L238
215 00016A3E L237:
216 00016A3E # } /* end of subtest 1 */
217 00016A3E 40 ret#2
218 00016A3F .set L232,0x0
219 00016A3F L234:
220 00016A3F 13 fea3 jbr L235
221 00016A42 .data
222 00000d28 * .text
223 00016A42 .align 1
224 00016A42 .globl _addd_2
225 00016A42 _addd_2:
226 00016A42 0000 .word L251
227 00016A44 #
228 00016A44 #
229 00016A44 #
230 00016A44 # /************************************************************************
231 00016A44 # *
232 00016A44 # * SUBTEST 2 - add through memory
233 00016A44 # *
234 00016A44 # ************************************************************************/
235 00016A44 # addd_2()
236 00016A44 # {
237 00016A44 13 0146 jbr L253
238 00016A47 L254:
239 00016A47 # force_loop = FALSE;
240 00016A47 4d effffffe13 clrl _force_loop
241 00016A4D # subtest = 2;
242 00016A4D 0d 02 effffffe0c movl $2,_subtest
243 00016A54 # for( index = 0; index < max_addd_1_index; index++ ) {
244 00016A54 4d effffffe06 clrl _index
245 00016A5A L257:
246 00016A5A 1d effffffe00 effffffdfb cmpl _index,_max_addd_1_index
247 00016A65 91 03 13 0122 jgeq L256
248 00016A6A # dbl_ld_acc = addd_1_data[index].op_1; /* get operand 1 */
249 00016A6A 5c 18 effffffdef 50 mull3 $24,_index,r0
250 00016A72 0c 8f00000000 50 addl2 $_addd_1_data,r0
251 00016A79 0d a004 effffffde3 movl 4(r0),_dbl_ld_acc+4
252 00016A81 0d 60 effffffdd8 movl (r0),_dbl_ld_acc
253 00016A88 # dbl_value_1 = addd_1_data[index].op_2; /* get operand 2 */
254 00016A88 5c 18 effffffdd1 50 mull3 $24,_index,r0
255 00016A90 0c 8f00000008 50 addl2 $_addd_1_data+8,r0
256 00016A97 0d a004 effffffdc5 movl 4(r0),_dbl_value_1+4
257 00016A9F 0d 60 effffffdba movl (r0),_dbl_value_1
258 00016AA6 # dbl_expected = addd_1_data[index].exp; /* get expected result */
259 00016AA6 5c 18 effffffdb3 50 mull3 $24,_index,r0
260 00016AAE 0c 8f00000010 50 addl2 $_addd_1_data+16,r0
261 00016AB5 0d a004 effffffda7 movl 4(r0),_dbl_expected+4
262 00016ABD 0d 60 effffffd9c movl (r0),_dbl_expected
263 00016AC4 # /*
264 00016AC4 # * If LOOP ON ERROR is set, this is the loop for this subtest.
265 00016AC4 # * The force loop flag is set after the first error.
266 00016AC4 # */
267 00016AC4 # asm("_addd_2_lp1:");
268 00016AC4 _addd_2_lp1:
269 00016AC4 # asm("ldd _dbl_ld_acc"); /* load the 1st operand */
270 00016AC4 07 effffffd96 ldd _dbl_ld_acc
271 00016ACA # asm("addd _dbl_value_1"); /* add the 2nd operand */
272 00016ACA c7 effffffd90 addd _dbl_value_1
273 00016AD0 # asm("std _dbl_st_acc"); /* store the result */
274 00016AD0 27 effffffd8a std _dbl_st_acc
275 00016AD6 # if( force_loop )
276 00016AD6 5d effffffd84 tstl _force_loop
277 00016ADC 31 02 jeql L258
278 00016ADE # asm("brb _addd_2_lp1");; /* loop on the error */
279 00016ADE 11 e4 brb _addd_2_lp1
280 00016AE0 L258:
281 00016AE0 # /*
282 00016AE0 # * end error loop - test the results
283 00016AE0 # */
284 00016AE0 # if( (dbl_st_acc.m != dbl_expected.m) || /* verify the results */
285 00016AE0 # (dbl_st_acc.l != dbl_expected.l) ) {
286 00016AE0 1d effffffd7a effffffd75 cmpl _dbl_st_acc,_dbl_expected
287 00016AEB 21 10 jneq L9998
288 00016AED 1d effffffd71 effffffd6c cmpl _dbl_st_acc+4,_dbl_expected+4
289 00016AF8 21 03 13 0086 jeql L259
290 00016AFD L9998:
291 00016AFD # errcnt++; /* bump the error count */
292 00016AFD 6d effffffd5d incl _errcnt
293 00016B03 # if( prt_error ) {
294 00016B03 5d effffffd57 tstl _prt_error
295 00016B09 31 55 jeql L260
296 00016B0B # writes(" \n"); /* start a new print line */
297 00016B0B .data 1
298 00000d6f * L261:
299 00000d6f * 200A00 .ascii " \12\0"
300 00000d72 * .text
301 00016B0B dd 8f00000d6f pushl $L261
302 00016B11 fe 08 effffffd48 callf $8,_writes
303 00016B18 # writes("cycle: ");
304 00016B18 .data 1
305 00000d72 * L262:
306 00000d72 * 6379636C653A2000 .ascii "cycle: \0"
307 00000d7a * .text
308 00016B18 dd 8f00000d72 pushl $L262
309 00016B1E fe 08 effffffd3b callf $8,_writes
310 00016B25 # writed( cycle );
311 00016B25 dd effffffd35 pushl _cycle
312 00016B2B fe 08 effffffd2e callf $8,_writed
313 00016B32 # writes(" ADDD test ");
314 00016B32 .data 1
315 00000d7a * L263:
316 00000d7a * 2020414444442074657374200 .ascii " ADDD test \0"
0
317 00000d87 * .text
318 00016B32 dd 8f00000d7a pushl $L263
319 00016B38 fe 08 effffffd21 callf $8,_writes
320 00016B3F # writed( test_no );
321 00016B3F dd effffffd1b pushl _test_no
322 00016B45 fe 08 effffffd14 callf $8,_writed
323 00016B4C # writes(", subtest 2 (Cache Data) - BAD FINAL ACC\n");
324 00016B4C .data 1
325 00000d87 * L264:
326 00000d87 * 2C20737562746573742032202 .ascii ", subtest 2 (Cache Data) - BAD FINAL ACC\12\0"
8436163686520446174612920
2D204241442046494E414C204
143430A00
327 00000db1 * .text
328 00016B4C dd 8f00000d87 pushl $L264
329 00016B52 fe 08 effffffd07 callf $8,_writes
330 00016B59 # print_addd_data();
331 00016B59 fe 04 ef00000804 callf $4,_print_addd_data
332 00016B60 # }
333 00016B60 # if( halt_flg )
334 00016B60 L260:
335 00016B60 5d effffffcfa tstl _halt_flg
336 00016B66 31 09 jeql L265
337 00016B68 # addd_er_halt( BAD_ACC_HLT ); /* halt on the error */
338 00016B68 dd 01 pushl $1
339 00016B6A fe 08 ef000008e9 callf $8,_addd_er_halt
340 00016B71 # if( loop_on_err ) {
341 00016B71 L265:
342 00016B71 5d effffffce9 tstl _loop_on_err
343 00016B77 31 0a jeql L266
344 00016B79 # force_loop = TRUE; /* set the force loop flag */
345 00016B79 0d 01 effffffce0 movl $1,_force_loop
346 00016B80 # asm("brw _addd_2_lp1");; /* and loop on the error */
347 00016B80 13 ff41 brw _addd_2_lp1
348 00016B83 # } /* end of loop on error */
349 00016B83 # } /* end of compare error */
350 00016B83 L266:
351 00016B83 # } /* end of WHILE loop */
352 00016B83 L259:
353 00016B83 L255:
354 00016B83 6d effffffcd7 incl _index
355 00016B89 13 fece jbr L257
356 00016B8C L256:
357 00016B8C # } /* end of subtest 2 */
358 00016B8C 40 ret#2
359 00016B8D .set L251,0x0
360 00016B8D L253:
361 00016B8D 13 feb7 jbr L254
362 00016B90 .data
363 00000d28 * .text
364 00016B90 .align 1
365 00016B90 .globl _addd_3
366 00016B90 _addd_3:
367 00016B90 0000 .word L267
368 00016B92 #
369 00016B92 #
370 00016B92 #
371 00016B92 # /****************************************************************************
372 00016B92 # *
373 00016B92 # * SUBTEST 3 - Wait 2n NOPs before storing the results
374 00016B92 # *
375 00016B92 # ****************************************************************************/
376 00016B92 # addd_3( count )
377 00016B92 # int count; /* wait "count" * 2 NOPs */
378 00016B92 # {
379 00016B92 13 0180 jbr L269
380 00016B95 L270:
381 00016B95 # force_loop = FALSE;
382 00016B95 4d effffffcc5 clrl _force_loop
383 00016B9B # subtest = 3;
384 00016B9B 0d 03 effffffcbe movl $3,_subtest
385 00016BA2 # sgl_dummy2 = count; /* get the NOP count */
386 00016BA2 0d ad04 effffffcb6 movl 4(fp),_sgl_dummy2
387 00016BAA # for( index = 0; index < max_addd_1_index; index++ ) {
388 00016BAA 4d effffffcb0 clrl _index
389 00016BB0 L273:
390 00016BB0 1d effffffcaa effffffca5 cmpl _index,_max_addd_1_index
391 00016BBB 91 03 13 0154 jgeq L272
392 00016BC0 # dbl_ld_acc = addd_1_data[index].op_1; /* get operand 1 */
393 00016BC0 5c 18 effffffc99 50 mull3 $24,_index,r0
394 00016BC8 0c 8f00000000 50 addl2 $_addd_1_data,r0
395 00016BCF 0d a004 effffffc8d movl 4(r0),_dbl_ld_acc+4
396 00016BD7 0d 60 effffffc82 movl (r0),_dbl_ld_acc
397 00016BDE # dbl_value_1 = addd_1_data[index].op_2; /* get operand 2 */
398 00016BDE 5c 18 effffffc7b 50 mull3 $24,_index,r0
399 00016BE6 0c 8f00000008 50 addl2 $_addd_1_data+8,r0
400 00016BED 0d a004 effffffc6f movl 4(r0),_dbl_value_1+4
401 00016BF5 0d 60 effffffc64 movl (r0),_dbl_value_1
402 00016BFC # dbl_expected = addd_1_data[index].exp; /* get expected result */
403 00016BFC 5c 18 effffffc5d 50 mull3 $24,_index,r0
404 00016C04 0c 8f00000010 50 addl2 $_addd_1_data+16,r0
405 00016C0B 0d a004 effffffc51 movl 4(r0),_dbl_expected+4
406 00016C13 0d 60 effffffc46 movl (r0),_dbl_expected
407 00016C1A # /*
408 00016C1A # * If LOOP ON ERROR is set, this is the loop for this subtest.
409 00016C1A # * The force loop flag is set after the first error.
410 00016C1A # */
411 00016C1A # asm("_addd_3_lp1:");
412 00016C1A _addd_3_lp1:
413 00016C1A # asm("movl _sgl_dummy2,r0"); /* set the NOP count */
414 00016C1A 0d effffffc40 50 movl _sgl_dummy2,r0
415 00016C21 # asm("ldd _dbl_ld_acc"); /* load the 1st operand */
416 00016C21 07 effffffc39 ldd _dbl_ld_acc
417 00016C27 # asm("nop"); /* delay */
418 00016C27 10 nop
419 00016C28 # asm("addd _dbl_value_1"); /* add the 2nd operand */
420 00016C28 c7 effffffc32 addd _dbl_value_1
421 00016C2E # asm("1:");
422 00016C2E 1:
423 00016C2E # asm("decl r0"); /* decrement the NOP count */
424 00016C2E 7d 50 decl r0
425 00016C30 # asm("bneq 1b"); /* till the count = 0 */
426 00016C30 21 fc bneq 1b
427 00016C32 # asm("std _dbl_st_acc"); /* store the result */
428 00016C32 27 effffffc28 std _dbl_st_acc
429 00016C38 # if( force_loop )
430 00016C38 5d effffffc22 tstl _force_loop
431 00016C3E 31 02 jeql L274
432 00016C40 # asm("brb _addd_3_lp1");; /* loop on the error */
433 00016C40 11 d8 brb _addd_3_lp1
434 00016C42 L274:
435 00016C42 # /*
436 00016C42 # * end error loop - test the results
437 00016C42 # */
438 00016C42 # if( (dbl_st_acc.m != dbl_expected.m) || /* verify the results */
439 00016C42 # (dbl_st_acc.l != dbl_expected.l) ) {
440 00016C42 1d effffffc18 effffffc13 cmpl _dbl_st_acc,_dbl_expected
441 00016C4D 21 10 jneq L9997
442 00016C4F 1d effffffc0f effffffc0a cmpl _dbl_st_acc+4,_dbl_expected+4
443 00016C5A 21 03 13 00ac jeql L275
444 00016C5F L9997:
445 00016C5F # errcnt++; /* bump the error count */
446 00016C5F 6d effffffbfb incl _errcnt
447 00016C65 # if( prt_error ) {
448 00016C65 5d effffffbf5 tstl _prt_error
449 00016C6B 31 7b jeql L276
450 00016C6D # writes(" \n"); /* start a new print line */
451 00016C6D .data 1
452 00000db1 * L277:
453 00000db1 * 200A00 .ascii " \12\0"
454 00000db4 * .text
455 00016C6D dd 8f00000db1 pushl $L277
456 00016C73 fe 08 effffffbe6 callf $8,_writes
457 00016C7A # writes("cycle: ");
458 00016C7A .data 1
459 00000db4 * L278:
460 00000db4 * 6379636C653A2000 .ascii "cycle: \0"
461 00000dbc * .text
462 00016C7A dd 8f00000db4 pushl $L278
463 00016C80 fe 08 effffffbd9 callf $8,_writes
464 00016C87 # writed( cycle );
465 00016C87 dd effffffbd3 pushl _cycle
466 00016C8D fe 08 effffffbcc callf $8,_writed
467 00016C94 # writes(" ADDD test ");
468 00016C94 .data 1
469 00000dbc * L279:
470 00000dbc * 2020414444442074657374200 .ascii " ADDD test \0"
0
471 00000dc9 * .text
472 00016C94 dd 8f00000dbc pushl $L279
473 00016C9A fe 08 effffffbbf callf $8,_writes
474 00016CA1 # writed( test_no );
475 00016CA1 dd effffffbb9 pushl _test_no
476 00016CA7 fe 08 effffffbb2 callf $8,_writed
477 00016CAE # writes(", subtest 3 (wait ");
478 00016CAE .data 1
479 00000dc9 * L280:
480 00000dc9 * 2C20737562746573742033202 .ascii ", subtest 3 (wait \0"
8776169742000
481 00000ddc * .text
482 00016CAE dd 8f00000dc9 pushl $L280
483 00016CB4 fe 08 effffffba5 callf $8,_writes
484 00016CBB # sgl_dummy1 = 2*count;
485 00016CBB 48 01 ad04 50 shll $1,4(fp),r0
486 00016CC0 0d 50 effffffb99 movl r0,_sgl_dummy1
487 00016CC7 # writed( sgl_dummy1 ); /* write the NOP count */
488 00016CC7 dd effffffb93 pushl _sgl_dummy1
489 00016CCD fe 08 effffffb8c callf $8,_writed
490 00016CD4 # writes(" NOPs) - BAD FINAL ACC\n");
491 00016CD4 .data 1
492 00000ddc * L281:
493 00000ddc * 204E4F507329202D204241442 .ascii " NOPs) - BAD FINAL ACC\12\0"
046494E414C204143430A00
494 00000df4 * .text
495 00016CD4 dd 8f00000ddc pushl $L281
496 00016CDA fe 08 effffffb7f callf $8,_writes
497 00016CE1 # print_addd_data();
498 00016CE1 fe 04 ef0000067c callf $4,_print_addd_data
499 00016CE8 # }
500 00016CE8 # if( halt_flg )
501 00016CE8 L276:
502 00016CE8 5d effffffb72 tstl _halt_flg
503 00016CEE 31 09 jeql L282
504 00016CF0 # addd_er_halt( BAD_ACC_HLT ); /* halt on the error */
505 00016CF0 dd 01 pushl $1
506 00016CF2 fe 08 ef00000761 callf $8,_addd_er_halt
507 00016CF9 # if( loop_on_err ) {
508 00016CF9 L282:
509 00016CF9 5d effffffb61 tstl _loop_on_err
510 00016CFF 31 0a jeql L283
511 00016D01 # force_loop = TRUE; /* set the force loop flag */
512 00016D01 0d 01 effffffb58 movl $1,_force_loop
513 00016D08 # asm("brw _addd_3_lp1");; /* and loop on the error */
514 00016D08 13 ff0f brw _addd_3_lp1
515 00016D0B # } /* end of loop on error */
516 00016D0B # } /* end of compare error */
517 00016D0B L283:
518 00016D0B # } /* end of WHILE loop */
519 00016D0B L275:
520 00016D0B L271:
521 00016D0B 6d effffffb4f incl _index
522 00016D11 13 fe9c jbr L273
523 00016D14 L272:
524 00016D14 # } /* end of subtest 3 */
525 00016D14 40 ret#2
526 00016D15 .set L267,0x0
527 00016D15 L269:
528 00016D15 13 fe7d jbr L270
529 00016D18 .data
530 00000d28 * .text
531 00016D18 .align 1
532 00016D18 .globl _addd_4
533 00016D18 _addd_4:
534 00016D18 0000 .word L284
535 00016D1A #
536 00016D1A #
537 00016D1A #
538 00016D1A # /************************************************************************
539 00016D1A # *
540 00016D1A # * SUBTEST 4 - Wait 2 NOPs before storing the results
541 00016D1A # *
542 00016D1A # ************************************************************************/
543 00016D1A # addd_4()
544 00016D1A # {
545 00016D1A 13 0149 jbr L286
546 00016D1D L287:
547 00016D1D # force_loop = FALSE;
548 00016D1D 4d effffffb3d clrl _force_loop
549 00016D23 # subtest = 4;
550 00016D23 0d 04 effffffb36 movl $4,_subtest
551 00016D2A # for( index = 0; index < max_addd_1_index; index++ ) {
552 00016D2A 4d effffffb30 clrl _index
553 00016D30 L290:
554 00016D30 1d effffffb2a effffffb25 cmpl _index,_max_addd_1_index
555 00016D3B 91 03 13 0125 jgeq L289
556 00016D40 # dbl_ld_acc = addd_1_data[index].op_1; /* get operand 1 */
557 00016D40 5c 18 effffffb19 50 mull3 $24,_index,r0
558 00016D48 0c 8f00000000 50 addl2 $_addd_1_data,r0
559 00016D4F 0d a004 effffffb0d movl 4(r0),_dbl_ld_acc+4
560 00016D57 0d 60 effffffb02 movl (r0),_dbl_ld_acc
561 00016D5E # dbl_value_1 = addd_1_data[index].op_2; /* get operand 2 */
562 00016D5E 5c 18 effffffafb 50 mull3 $24,_index,r0
563 00016D66 0c 8f00000008 50 addl2 $_addd_1_data+8,r0
564 00016D6D 0d a004 effffffaef movl 4(r0),_dbl_value_1+4
565 00016D75 0d 60 effffffae4 movl (r0),_dbl_value_1
566 00016D7C # dbl_expected = addd_1_data[index].exp; /* get expected result */
567 00016D7C 5c 18 effffffadd 50 mull3 $24,_index,r0
568 00016D84 0c 8f00000010 50 addl2 $_addd_1_data+16,r0
569 00016D8B 0d a004 effffffad1 movl 4(r0),_dbl_expected+4
570 00016D93 0d 60 effffffac6 movl (r0),_dbl_expected
571 00016D9A # /*
572 00016D9A # * If LOOP ON ERROR is set, this is the loop for this subtest.
573 00016D9A # * The force loop flag is set after the first error.
574 00016D9A # */
575 00016D9A # asm("_addd_4_lp1:");
576 00016D9A _addd_4_lp1:
577 00016D9A # asm("ldd _dbl_ld_acc"); /* load the 1st operand */
578 00016D9A 07 effffffac0 ldd _dbl_ld_acc
579 00016DA0 # asm("nop"); /* delay */
580 00016DA0 10 nop
581 00016DA1 # asm("addd _dbl_value_1"); /* add the 2nd operand */
582 00016DA1 c7 effffffab9 addd _dbl_value_1
583 00016DA7 # asm("nop"); /* delay before ... */
584 00016DA7 10 nop
585 00016DA8 # asm("nop"); /* ... storing the result */
586 00016DA8 10 nop
587 00016DA9 # asm("std _dbl_st_acc"); /* store the result */
588 00016DA9 27 effffffab1 std _dbl_st_acc
589 00016DAF # if( force_loop )
590 00016DAF 5d effffffaab tstl _force_loop
591 00016DB5 31 02 jeql L291
592 00016DB7 # asm("brb _addd_4_lp1");; /* loop on the error */
593 00016DB7 11 e1 brb _addd_4_lp1
594 00016DB9 L291:
595 00016DB9 # /*
596 00016DB9 # * end error loop - test the results
597 00016DB9 # */
598 00016DB9 # if( (dbl_st_acc.m != dbl_expected.m) || /* verify the results */
599 00016DB9 # (dbl_st_acc.l != dbl_expected.l) ) {
600 00016DB9 1d effffffaa1 effffffa9c cmpl _dbl_st_acc,_dbl_expected
601 00016DC4 21 10 jneq L9996
602 00016DC6 1d effffffa98 effffffa93 cmpl _dbl_st_acc+4,_dbl_expected+4
603 00016DD1 21 03 13 0086 jeql L292
604 00016DD6 L9996:
605 00016DD6 # errcnt++; /* bump the error count */
606 00016DD6 6d effffffa84 incl _errcnt
607 00016DDC # if( prt_error ) {
608 00016DDC 5d effffffa7e tstl _prt_error
609 00016DE2 31 55 jeql L293
610 00016DE4 # writes(" \n"); /* start a new print line */
611 00016DE4 .data 1
612 00000df4 * L294:
613 00000df4 * 200A00 .ascii " \12\0"
614 00000df7 * .text
615 00016DE4 dd 8f00000df4 pushl $L294
616 00016DEA fe 08 effffffa6f callf $8,_writes
617 00016DF1 # writes("cycle: ");
618 00016DF1 .data 1
619 00000df7 * L295:
620 00000df7 * 6379636C653A2000 .ascii "cycle: \0"
621 00000dff * .text
622 00016DF1 dd 8f00000df7 pushl $L295
623 00016DF7 fe 08 effffffa62 callf $8,_writes
624 00016DFE # writed( cycle );
625 00016DFE dd effffffa5c pushl _cycle
626 00016E04 fe 08 effffffa55 callf $8,_writed
627 00016E0B # writes(" ADDD test ");
628 00016E0B .data 1
629 00000dff * L296:
630 00000dff * 2020414444442074657374200 .ascii " ADDD test \0"
0
631 00000e0c * .text
632 00016E0B dd 8f00000dff pushl $L296
633 00016E11 fe 08 effffffa48 callf $8,_writes
634 00016E18 # writed( test_no );
635 00016E18 dd effffffa42 pushl _test_no
636 00016E1E fe 08 effffffa3b callf $8,_writed
637 00016E25 # writes(", subtest 4 (2 NOPs) - BAD FINAL ACC\n");
638 00016E25 .data 1
639 00000e0c * L297:
640 00000e0c * 2C20737562746573742034202 .ascii ", subtest 4 (2 NOPs) - BAD FINAL ACC\12\0"
832204E4F507329202D204241
442046494E414C204143430A0
0
641 00000e32 * .text
642 00016E25 dd 8f00000e0c pushl $L297
643 00016E2B fe 08 effffffa2e callf $8,_writes
644 00016E32 # print_addd_data();
645 00016E32 fe 04 ef0000052b callf $4,_print_addd_data
646 00016E39 # }
647 00016E39 # if( halt_flg )
648 00016E39 L293:
649 00016E39 5d effffffa21 tstl _halt_flg
650 00016E3F 31 09 jeql L298
651 00016E41 # addd_er_halt( BAD_ACC_HLT ); /* halt on the error */
652 00016E41 dd 01 pushl $1
653 00016E43 fe 08 ef00000610 callf $8,_addd_er_halt
654 00016E4A # if( loop_on_err ) {
655 00016E4A L298:
656 00016E4A 5d effffffa10 tstl _loop_on_err
657 00016E50 31 0a jeql L299
658 00016E52 # force_loop = TRUE; /* set the force loop flag */
659 00016E52 0d 01 effffffa07 movl $1,_force_loop
660 00016E59 # asm("brw _addd_4_lp1");; /* and loop on the error */
661 00016E59 13 ff3e brw _addd_4_lp1
662 00016E5C # } /* end of loop on error */
663 00016E5C # } /* end of compare error */
664 00016E5C L299:
665 00016E5C # } /* end of WHILE loop */
666 00016E5C L292:
667 00016E5C L288:
668 00016E5C 6d effffff9fe incl _index
669 00016E62 13 fecb jbr L290
670 00016E65 L289:
671 00016E65 # } /* end of subtest 4 */
672 00016E65 40 ret#2
673 00016E66 .set L284,0x0
674 00016E66 L286:
675 00016E66 13 feb4 jbr L287
676 00016E69 .data
677 00000d28 * .text
678 00016E69 00 .align 1
679 00016E6A .globl _addd_5
680 00016E6A _addd_5:
681 00016E6A 0000 .word L300
682 00016E6C #
683 00016E6C #
684 00016E6C #
685 00016E6C # /************************************************************************
686 00016E6C # *
687 00016E6C # * SUBTEST 5 - Wait 1 NOP before storing the results
688 00016E6C # *
689 00016E6C # ************************************************************************/
690 00016E6C # addd_5()
691 00016E6C # {
692 00016E6C 13 0148 jbr L302
693 00016E6F L303:
694 00016E6F # force_loop = FALSE;
695 00016E6F 4d effffff9eb clrl _force_loop
696 00016E75 # subtest = 5;
697 00016E75 0d 05 effffff9e4 movl $5,_subtest
698 00016E7C # for( index = 0; index < max_addd_1_index; index++ ) {
699 00016E7C 4d effffff9de clrl _index
700 00016E82 L306:
701 00016E82 1d effffff9d8 effffff9d3 cmpl _index,_max_addd_1_index
702 00016E8D 91 03 13 0124 jgeq L305
703 00016E92 # dbl_ld_acc = addd_1_data[index].op_1; /* get operand 1 */
704 00016E92 5c 18 effffff9c7 50 mull3 $24,_index,r0
705 00016E9A 0c 8f00000000 50 addl2 $_addd_1_data,r0
706 00016EA1 0d a004 effffff9bb movl 4(r0),_dbl_ld_acc+4
707 00016EA9 0d 60 effffff9b0 movl (r0),_dbl_ld_acc
708 00016EB0 # dbl_value_1 = addd_1_data[index].op_2; /* get operand 2 */
709 00016EB0 5c 18 effffff9a9 50 mull3 $24,_index,r0
710 00016EB8 0c 8f00000008 50 addl2 $_addd_1_data+8,r0
711 00016EBF 0d a004 effffff99d movl 4(r0),_dbl_value_1+4
712 00016EC7 0d 60 effffff992 movl (r0),_dbl_value_1
713 00016ECE # dbl_expected = addd_1_data[index].exp; /* get expected result */
714 00016ECE 5c 18 effffff98b 50 mull3 $24,_index,r0
715 00016ED6 0c 8f00000010 50 addl2 $_addd_1_data+16,r0
716 00016EDD 0d a004 effffff97f movl 4(r0),_dbl_expected+4
717 00016EE5 0d 60 effffff974 movl (r0),_dbl_expected
718 00016EEC # /*
719 00016EEC # * If LOOP ON ERROR is set, this is the loop for this subtest.
720 00016EEC # * The force loop flag is set after the first error.
721 00016EEC # */
722 00016EEC # asm("_addd_5_lp1:");
723 00016EEC _addd_5_lp1:
724 00016EEC # asm("ldd _dbl_ld_acc"); /* load the 1st operand */
725 00016EEC 07 effffff96e ldd _dbl_ld_acc
726 00016EF2 # asm("nop"); /* delay */
727 00016EF2 10 nop
728 00016EF3 # asm("addd _dbl_value_1"); /* add the 2nd operand */
729 00016EF3 c7 effffff967 addd _dbl_value_1
730 00016EF9 # asm("nop"); /* delay before storing */
731 00016EF9 10 nop
732 00016EFA # asm("std _dbl_st_acc"); /* store the result */
733 00016EFA 27 effffff960 std _dbl_st_acc
734 00016F00 # if( force_loop )
735 00016F00 5d effffff95a tstl _force_loop
736 00016F06 31 02 jeql L307
737 00016F08 # asm("brb _addd_5_lp1");; /* loop on the error */
738 00016F08 11 e2 brb _addd_5_lp1
739 00016F0A L307:
740 00016F0A # /*
741 00016F0A # * end error loop - test the results
742 00016F0A # */
743 00016F0A # if( (dbl_st_acc.m != dbl_expected.m) || /* verify the results */
744 00016F0A # (dbl_st_acc.l != dbl_expected.l) ) {
745 00016F0A 1d effffff950 effffff94b cmpl _dbl_st_acc,_dbl_expected
746 00016F15 21 10 jneq L9995
747 00016F17 1d effffff947 effffff942 cmpl _dbl_st_acc+4,_dbl_expected+4
748 00016F22 21 03 13 0086 jeql L308
749 00016F27 L9995:
750 00016F27 # errcnt++; /* bump the error count */
751 00016F27 6d effffff933 incl _errcnt
752 00016F2D # if( prt_error ) {
753 00016F2D 5d effffff92d tstl _prt_error
754 00016F33 31 55 jeql L309
755 00016F35 # writes(" \n"); /* start a new print line */
756 00016F35 .data 1
757 00000e32 * L310:
758 00000e32 * 200A00 .ascii " \12\0"
759 00000e35 * .text
760 00016F35 dd 8f00000e32 pushl $L310
761 00016F3B fe 08 effffff91e callf $8,_writes
762 00016F42 # writes("cycle: ");
763 00016F42 .data 1
764 00000e35 * L311:
765 00000e35 * 6379636C653A2000 .ascii "cycle: \0"
766 00000e3d * .text
767 00016F42 dd 8f00000e35 pushl $L311
768 00016F48 fe 08 effffff911 callf $8,_writes
769 00016F4F # writed( cycle );
770 00016F4F dd effffff90b pushl _cycle
771 00016F55 fe 08 effffff904 callf $8,_writed
772 00016F5C # writes(" ADDD test ");
773 00016F5C .data 1
774 00000e3d * L312:
775 00000e3d * 2020414444442074657374200 .ascii " ADDD test \0"
0
776 00000e4a * .text
777 00016F5C dd 8f00000e3d pushl $L312
778 00016F62 fe 08 effffff8f7 callf $8,_writes
779 00016F69 # writed( test_no );
780 00016F69 dd effffff8f1 pushl _test_no
781 00016F6F fe 08 effffff8ea callf $8,_writed
782 00016F76 # writes(", subtest 5 (1 NOP) - BAD FINAL ACC\n");
783 00016F76 .data 1
784 00000e4a * L313:
785 00000e4a * 2C20737562746573742035202 .ascii ", subtest 5 (1 NOP) - BAD FINAL ACC\12\0"
831204E4F5029202D20424144
2046494E414C204143430A00
786 00000e6f * .text
787 00016F76 dd 8f00000e4a pushl $L313
788 00016F7C fe 08 effffff8dd callf $8,_writes
789 00016F83 # print_addd_data();
790 00016F83 fe 04 ef000003da callf $4,_print_addd_data
791 00016F8A # }
792 00016F8A # if( halt_flg )
793 00016F8A L309:
794 00016F8A 5d effffff8d0 tstl _halt_flg
795 00016F90 31 09 jeql L314
796 00016F92 # addd_er_halt( BAD_ACC_HLT ); /* halt on the error */
797 00016F92 dd 01 pushl $1
798 00016F94 fe 08 ef000004bf callf $8,_addd_er_halt
799 00016F9B # if( loop_on_err ) {
800 00016F9B L314:
801 00016F9B 5d effffff8bf tstl _loop_on_err
802 00016FA1 31 0a jeql L315
803 00016FA3 # force_loop = TRUE; /* set the force loop flag */
804 00016FA3 0d 01 effffff8b6 movl $1,_force_loop
805 00016FAA # asm("brw _addd_5_lp1"); /* and loop on the error */
806 00016FAA 13 ff3f brw _addd_5_lp1
807 00016FAD # } /* end of loop on error */
808 00016FAD # } /* end of compare error */
809 00016FAD L315:
810 00016FAD # } /* end of WHILE loop */
811 00016FAD L308:
812 00016FAD L304:
813 00016FAD 6d effffff8ad incl _index
814 00016FB3 13 fecc jbr L306
815 00016FB6 L305:
816 00016FB6 # } /* end of subtest 5 */
817 00016FB6 40 ret#2
818 00016FB7 .set L300,0x0
819 00016FB7 L302:
820 00016FB7 13 feb5 jbr L303
821 00016FBA .data
822 00000d28 * .text
823 00016FBA .align 1
824 00016FBA .globl _addd_6
825 00016FBA _addd_6:
826 00016FBA 0000 .word L316
827 00016FBC #
828 00016FBC #
829 00016FBC #
830 00016FBC # /************************************************************************
831 00016FBC # *
832 00016FBC # * SUBTEST 6 - Check for register corruption
833 00016FBC # *
834 00016FBC # ************************************************************************/
835 00016FBC # addd_6()
836 00016FBC # {
837 00016FBC 13 01c8 jbr L318
838 00016FBF L319:
839 00016FBF # force_loop = FALSE; /* clear force_loop flg */
840 00016FBF 4d effffff89b clrl _force_loop
841 00016FC5 # subtest = 6;
842 00016FC5 0d 06 effffff894 movl $6,_subtest
843 00016FCC # fill_reg_buf( load_regs ); /* get patterns for regs */
844 00016FCC dd 8f00000000 pushl $_load_regs
845 00016FD2 fe 08 effffff887 callf $8,_fill_reg_buf
846 00016FD9 # index = 0;
847 00016FD9 4d effffff881 clrl _index
848 00016FDF # dbl_ld_acc = addd_1_data[0].op_1; /* get operand 1 */
849 00016FDF 0d effffff87f effffff87a movl _addd_1_data+4,_dbl_ld_acc+4
850 00016FEA 0d effffff870 effffff86b movl _addd_1_data,_dbl_ld_acc
851 00016FF5 # dbl_value_1 = addd_1_data[0].op_2; /* get operand 2 */
852 00016FF5 0d effffff871 effffff864 movl _addd_1_data+12,_dbl_value_1+4
853 00017000 0d effffff862 effffff855 movl _addd_1_data+8,_dbl_value_1
854 0001700B # dbl_expected = addd_1_data[0].exp; /* get expected result */
855 0001700B 0d effffff863 effffff84e movl _addd_1_data+20,_dbl_expected+4
856 00017016 0d effffff854 effffff83f movl _addd_1_data+16,_dbl_expected
857 00017021 # /*
858 00017021 # * If LOOP ON ERROR is set, this is the loop for this subtest.
859 00017021 # * The force loop flag is set after the first error.
860 00017021 # */
861 00017021 # asm("_addd_6_lp1:");
862 00017021 _addd_6_lp1:
863 00017021 # asm("ldd _dbl_ld_acc"); /* LOAD the accumulator */
864 00017021 07 effffff839 ldd _dbl_ld_acc
865 00017027 # asm("nop");
866 00017027 10 nop
867 00017028 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
868 00017028 ab 891fff effffff82f loadr $0x1fff,_load_regs
869 00017031 # asm("nop");
870 00017031 10 nop
871 00017032 # asm("addd _dbl_value_1"); /* do the add */
872 00017032 c7 effffff828 addd _dbl_value_1
873 00017038 # asm("nop");
874 00017038 10 nop
875 00017039 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
876 00017039 bb 891fff effffff81e storer $0x1fff,_store_regs
877 00017042 # asm("std _dbl_st_acc"); /* save the accumulator */
878 00017042 27 effffff818 std _dbl_st_acc
879 00017048 # if( force_loop )
880 00017048 5d effffff812 tstl _force_loop
881 0001704E 31 02 jeql L321
882 00017050 # asm("brb _addd_6_lp1");; /* loop on the error */
883 00017050 11 cf brb _addd_6_lp1
884 00017052 L321:
885 00017052 # /*
886 00017052 # * Now compare the stored register values to those that were loaded
887 00017052 # */
888 00017052 # index2 = 0;
889 00017052 4d effffff808 clrl _index2
890 00017058 # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
891 00017058 L322:
892 00017058 0d effffff802 50 movl _index2,r0
893 0001705F 0d effffff7fb 51 movl _index2,r1
894 00017066 1d 40effffff7f3 cmpl _load_regs[r0],_store_regs[r1]
41effffff7ed
895 00017073 21 11 jneq L323
896 00017075 1d effffff7e5 0d cmpl _index2,$13
897 0001707C 81 08 jgeq L323
898 0001707E # index2++; /* check reg values */
899 0001707E 6d effffff7dc incl _index2
900 00017084 11 d2 jbr L322
901 00017086 L323:
902 00017086 # if( index2 < 13 ) { /* error if index2 < 13 */
903 00017086 1d effffff7d4 0d cmpl _index2,$13
904 0001708D 91 03 13 00f4 jgeq L324
905 00017092 # errcnt++; /* bump the error count */
906 00017092 6d effffff7c8 incl _errcnt
907 00017098 # if( prt_error ) {
908 00017098 5d effffff7c2 tstl _prt_error
909 0001709E 21 03 13 00c0 jeql L325
910 000170A3 # writes(" \n"); /* start a new print line */
911 000170A3 .data 1
912 00000e6f * L326:
913 00000e6f * 200A00 .ascii " \12\0"
914 00000e72 * .text
915 000170A3 dd 8f00000e6f pushl $L326
916 000170A9 fe 08 effffff7b0 callf $8,_writes
917 000170B0 # writes("cycle: ");
918 000170B0 .data 1
919 00000e72 * L327:
920 00000e72 * 6379636C653A2000 .ascii "cycle: \0"
921 00000e7a * .text
922 000170B0 dd 8f00000e72 pushl $L327
923 000170B6 fe 08 effffff7a3 callf $8,_writes
924 000170BD # writed( cycle );
925 000170BD dd effffff79d pushl _cycle
926 000170C3 fe 08 effffff796 callf $8,_writed
927 000170CA # writes(" ADDD test ");
928 000170CA .data 1
929 00000e7a * L328:
930 00000e7a * 2020414444442074657374200 .ascii " ADDD test \0"
0
931 00000e87 * .text
932 000170CA dd 8f00000e7a pushl $L328
933 000170D0 fe 08 effffff789 callf $8,_writes
934 000170D7 # writed( test_no );
935 000170D7 dd effffff783 pushl _test_no
936 000170DD fe 08 effffff77c callf $8,_writed
937 000170E4 # writes(", subtest 6 - A REGISTER WAS CHANGED\n");
938 000170E4 .data 1
939 00000e87 * L329:
940 00000e87 * 2C20737562746573742036202 .ascii ", subtest 6 - A REGISTER WAS CHANGED\12\0"
D204120524547495354455220
574153204348414E4745440A0
0
941 00000ead * .text
942 000170E4 dd 8f00000e87 pushl $L329
943 000170EA fe 08 effffff76f callf $8,_writes
944 000170F1 # print_addd_data(); /* print the operands */
945 000170F1 fe 04 ef0000026c callf $4,_print_addd_data
946 000170F8 # writes("register "); /* print the information */
947 000170F8 .data 1
948 00000ead * L330:
949 00000ead * 72656769737465722000 .ascii "register \0"
950 00000eb7 * .text
951 000170F8 dd 8f00000ead pushl $L330
952 000170FE fe 08 effffff75b callf $8,_writes
953 00017105 # writed( index2 ); /* about the corrupted */
954 00017105 dd effffff755 pushl _index2
955 0001710B fe 08 effffff74e callf $8,_writed
956 00017112 # writes(" = "); /* register */
957 00017112 .data 1
958 00000eb7 * L331:
959 00000eb7 * 203D2000 .ascii " = \0"
960 00000ebb * .text
961 00017112 dd 8f00000eb7 pushl $L331
962 00017118 fe 08 effffff741 callf $8,_writes
963 0001711F # write32h( store_regs[index2] );
964 0001711F 0d effffff73b 50 movl _index2,r0
965 00017126 dd 40effffff733 pushl _store_regs[r0]
966 0001712D fe 08 effffff72c callf $8,_write32h
967 00017134 # writes(", should be = ");
968 00017134 .data 1
969 00000ebb * L333:
970 00000ebb * 2C202073686F756C642062652 .ascii ", should be = \0"
03D2000
971 00000ecb * .text
972 00017134 dd 8f00000ebb pushl $L333
973 0001713A fe 08 effffff71f callf $8,_writes
974 00017141 # write32h( load_regs[index2] );
975 00017141 0d effffff719 50 movl _index2,r0
976 00017148 dd 40effffff711 pushl _load_regs[r0]
977 0001714F fe 08 effffff70a callf $8,_write32h
978 00017156 # writes("\n");
979 00017156 .data 1
980 00000ecb * L334:
981 00000ecb * 0A00 .ascii "\12\0"
982 00000ecd * .text
983 00017156 dd 8f00000ecb pushl $L334
984 0001715C fe 08 effffff6fd callf $8,_writes
985 00017163 # }
986 00017163 # if( halt_flg )
987 00017163 L325:
988 00017163 5d effffff6f7 tstl _halt_flg
989 00017169 31 09 jeql L335
990 0001716B # addd_er_halt( BAD_REG_HLT ); /* halt on the error */
991 0001716B dd 02 pushl $2
992 0001716D fe 08 ef000002e6 callf $8,_addd_er_halt
993 00017174 # if( loop_on_err ) {
994 00017174 L335:
995 00017174 5d effffff6e6 tstl _loop_on_err
996 0001717A 31 0a jeql L336
997 0001717C # force_loop = TRUE; /* set the force loop flag */
998 0001717C 0d 01 effffff6dd movl $1,_force_loop
999 00017183 # asm("brw _addd_6_lp1");; /* and loop on the error */
1000 00017183 13 fe9b brw _addd_6_lp1
1001 00017186 # } /* end of loop on error */
1002 00017186 # } /* end of register corruption error */
1003 00017186 L336:
1004 00017186 # } /* end of subtest 6 */
1005 00017186 L324:
1006 00017186 40 ret#2
1007 00017187 .set L316,0x0
1008 00017187 L318:
1009 00017187 13 fe35 jbr L319
1010 0001718A .data
1011 00000d28 * .text
1012 0001718A .align 1
1013 0001718A .globl _addd_7
1014 0001718A _addd_7:
1015 0001718A 0000 .word L337
1016 0001718C #
1017 0001718C #
1018 0001718C #
1019 0001718C # /************************************************************************
1020 0001718C # *
1021 0001718C # * SUBTEST 7 - Check for PSL corruption
1022 0001718C # *
1023 0001718C # ************************************************************************/
1024 0001718C # addd_7()
1025 0001718C # {
1026 0001718C 13 01d2 jbr L339
1027 0001718F L340:
1028 0001718F # force_loop = FALSE; /* clear force_loop flg */
1029 0001718F 4d effffff6cb clrl _force_loop
1030 00017195 # subtest = 7;
1031 00017195 0d 07 effffff6c4 movl $7,_subtest
1032 0001719C # fill_reg_buf( load_regs ); /* get patterns for regs */
1033 0001719C dd 8f00000000 pushl $_load_regs
1034 000171A2 fe 08 effffff6b7 callf $8,_fill_reg_buf
1035 000171A9 # for( index = 0; index < 3; index++ ) {
1036 000171A9 4d effffff6b1 clrl _index
1037 000171AF L343:
1038 000171AF 1d effffff6ab 03 cmpl _index,$3
1039 000171B6 91 03 13 01a5 jgeq L342
1040 000171BB # dbl_ld_acc = addd_1_data[index].op_1; /* get operand 1 */
1041 000171BB 5c 18 effffff69e 50 mull3 $24,_index,r0
1042 000171C3 0c 8f00000000 50 addl2 $_addd_1_data,r0
1043 000171CA 0d a004 effffff692 movl 4(r0),_dbl_ld_acc+4
1044 000171D2 0d 60 effffff687 movl (r0),_dbl_ld_acc
1045 000171D9 # dbl_value_1 = addd_1_data[index].op_2; /* get operand 2 */
1046 000171D9 5c 18 effffff680 50 mull3 $24,_index,r0
1047 000171E1 0c 8f00000008 50 addl2 $_addd_1_data+8,r0
1048 000171E8 0d a004 effffff674 movl 4(r0),_dbl_value_1+4
1049 000171F0 0d 60 effffff669 movl (r0),_dbl_value_1
1050 000171F7 # dbl_expected = addd_1_data[index].exp; /* get expected */
1051 000171F7 5c 18 effffff662 50 mull3 $24,_index,r0
1052 000171FF 0c 8f00000010 50 addl2 $_addd_1_data+16,r0
1053 00017206 0d a004 effffff656 movl 4(r0),_dbl_expected+4
1054 0001720E 0d 60 effffff64b movl (r0),_dbl_expected
1055 00017215 # sgl_dummy1 = status_array[index]; /* status = +, -, 0 */
1056 00017215 0d effffff645 50 movl _index,r0
1057 0001721C 0d 40effffff63d movl _status_array[r0],_sgl_dummy1
effffff638
1058 00017228 # /*
1059 00017228 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1060 00017228 # * The force loop flag is set after the first error.
1061 00017228 # */
1062 00017228 # asm("_addd_7_lp1:");
1063 00017228 _addd_7_lp1:
1064 00017228 # asm("ldd _dbl_ld_acc"); /* LOAD the accumulator */
1065 00017228 07 effffff632 ldd _dbl_ld_acc
1066 0001722E # asm("nop");
1067 0001722E 10 nop
1068 0001722F # asm("tstl _sgl_dummy1"); /* set the PSL status */
1069 0001722F 5d effffff62b tstl _sgl_dummy1
1070 00017235 # asm("movpsl _init_psl"); /* save the initial PSL */
1071 00017235 cd effffff625 movpsl _init_psl
1072 0001723B # asm("addd _dbl_value_1"); /* do the add */
1073 0001723B c7 effffff61f addd _dbl_value_1
1074 00017241 # asm("nop");
1075 00017241 10 nop
1076 00017242 # asm("movpsl _psl_val"); /* save the final PSL */
1077 00017242 cd effffff618 movpsl _psl_val
1078 00017248 # asm("std _dbl_st_acc"); /* save the accumulator */
1079 00017248 27 effffff612 std _dbl_st_acc
1080 0001724E # if( force_loop )
1081 0001724E 5d effffff60c tstl _force_loop
1082 00017254 31 02 jeql L344
1083 00017256 # asm("brb _addd_7_lp1");; /* loop on the error */
1084 00017256 11 d0 brb _addd_7_lp1
1085 00017258 L344:
1086 00017258 # /*
1087 00017258 # * Now compare the final PSL to the initial PSL -they should be the same
1088 00017258 # */
1089 00017258 # exp_psl = init_psl;
1090 00017258 0d effffff602 effffff5fd movl _init_psl,_exp_psl
1091 00017263 # if( psl_val != exp_psl ) {
1092 00017263 1d effffff5f7 effffff5f2 cmpl _psl_val,_exp_psl
1093 0001726E 21 03 13 00e4 jeql L345
1094 00017273 # errcnt++; /* bump the error count */
1095 00017273 6d effffff5e7 incl _errcnt
1096 00017279 # if( prt_error ) {
1097 00017279 5d effffff5e1 tstl _prt_error
1098 0001727F 21 03 13 00b0 jeql L346
1099 00017284 # writes(" \n"); /* start a new print line */
1100 00017284 .data 1
1101 00000ecd * L347:
1102 00000ecd * 200A00 .ascii " \12\0"
1103 00000ed0 * .text
1104 00017284 dd 8f00000ecd pushl $L347
1105 0001728A fe 08 effffff5cf callf $8,_writes
1106 00017291 # writes("cycle: ");
1107 00017291 .data 1
1108 00000ed0 * L348:
1109 00000ed0 * 6379636C653A2000 .ascii "cycle: \0"
1110 00000ed8 * .text
1111 00017291 dd 8f00000ed0 pushl $L348
1112 00017297 fe 08 effffff5c2 callf $8,_writes
1113 0001729E # writed( cycle );
1114 0001729E dd effffff5bc pushl _cycle
1115 000172A4 fe 08 effffff5b5 callf $8,_writed
1116 000172AB # writes(" ADDD test ");
1117 000172AB .data 1
1118 00000ed8 * L349:
1119 00000ed8 * 2020414444442074657374200 .ascii " ADDD test \0"
0
1120 00000ee5 * .text
1121 000172AB dd 8f00000ed8 pushl $L349
1122 000172B1 fe 08 effffff5a8 callf $8,_writes
1123 000172B8 # writed( test_no );
1124 000172B8 dd effffff5a2 pushl _test_no
1125 000172BE fe 08 effffff59b callf $8,_writed
1126 000172C5 # writes(", subtest 7 - INCORRECT FINAL PSL\n");
1127 000172C5 .data 1
1128 00000ee5 * L350:
1129 00000ee5 * 2C20737562746573742037202 .ascii ", subtest 7 - INCORRECT FINAL PSL\12\0"
D20494E434F52524543542046
494E414C2050534C0A00
1130 00000f08 * .text
1131 000172C5 dd 8f00000ee5 pushl $L350
1132 000172CB fe 08 effffff58e callf $8,_writes
1133 000172D2 # print_addd_data(); /* print the operands */
1134 000172D2 fe 04 ef0000008b callf $4,_print_addd_data
1135 000172D9 # writes("initial PSL = ");
1136 000172D9 .data 1
1137 00000f08 * L351:
1138 00000f08 * 696E697469616C2050534C203 .ascii "initial PSL = \0"
D2000
1139 00000f17 * .text
1140 000172D9 dd 8f00000f08 pushl $L351
1141 000172DF fe 08 effffff57a callf $8,_writes
1142 000172E6 # write32h( init_psl );
1143 000172E6 dd effffff574 pushl _init_psl
1144 000172EC fe 08 effffff56d callf $8,_write32h
1145 000172F3 # writes(", final PSL = ");
1146 000172F3 .data 1
1147 00000f17 * L352:
1148 00000f17 * 2C202066696E616C2050534C2 .ascii ", final PSL = \0"
03D2000
1149 00000f27 * .text
1150 000172F3 dd 8f00000f17 pushl $L352
1151 000172F9 fe 08 effffff560 callf $8,_writes
1152 00017300 # write32h( psl_val );
1153 00017300 dd effffff55a pushl _psl_val
1154 00017306 fe 08 effffff553 callf $8,_write32h
1155 0001730D # writes(", expected PSL = ");
1156 0001730D .data 1
1157 00000f27 * L353:
1158 00000f27 * 2C20206578706563746564205 .ascii ", expected PSL = \0"
0534C203D2000
1159 00000f3a * .text
1160 0001730D dd 8f00000f27 pushl $L353
1161 00017313 fe 08 effffff546 callf $8,_writes
1162 0001731A # write32h( exp_psl );
1163 0001731A dd effffff540 pushl _exp_psl
1164 00017320 fe 08 effffff539 callf $8,_write32h
1165 00017327 # writes("\n");
1166 00017327 .data 1
1167 00000f3a * L354:
1168 00000f3a * 0A00 .ascii "\12\0"
1169 00000f3c * .text
1170 00017327 dd 8f00000f3a pushl $L354
1171 0001732D fe 08 effffff52c callf $8,_writes
1172 00017334 # }
1173 00017334 # if( halt_flg )
1174 00017334 L346:
1175 00017334 5d effffff526 tstl _halt_flg
1176 0001733A 31 09 jeql L355
1177 0001733C # addd_er_halt( BAD_PSL_HLT ); /* halt on the error */
1178 0001733C dd 03 pushl $3
1179 0001733E fe 08 ef00000115 callf $8,_addd_er_halt
1180 00017345 # if( loop_on_err ) {
1181 00017345 L355:
1182 00017345 5d effffff515 tstl _loop_on_err
1183 0001734B 31 0a jeql L356
1184 0001734D # force_loop = TRUE; /* set the force loop flag */
1185 0001734D 0d 01 effffff50c movl $1,_force_loop
1186 00017354 # asm("brw _addd_7_lp1");; /* and loop on the error */
1187 00017354 13 fed1 brw _addd_7_lp1
1188 00017357 # } /* end of loop on error */
1189 00017357 # } /* end of PSL corruption error */
1190 00017357 L356:
1191 00017357 # } /* end of WHILE loop */
1192 00017357 L345:
1193 00017357 L341:
1194 00017357 6d effffff503 incl _index
1195 0001735D 13 fe4f jbr L343
1196 00017360 L342:
1197 00017360 # } /* end of subtest 7 */
1198 00017360 40 ret#2
1199 00017361 .set L337,0x0
1200 00017361 L339:
1201 00017361 13 fe2b jbr L340
1202 00017364 .data
1203 00000d28 * .text
1204 00017364 .align 1
1205 00017364 .globl _print_addd_data
1206 00017364 _print_addd_data:
1207 00017364 0000 .word L357
1208 00017366 #
1209 00017366 #
1210 00017366 #
1211 00017366 # /**************************************************************************
1212 00017366 # *
1213 00017366 # * PRINT THE DATA AND STORE RESULTS
1214 00017366 # *
1215 00017366 # * initial Acc = xxxxxxxx xxxxxxxx, stored = xxxxxxxx xxxxxxxx, index = xx
1216 00017366 # * operand = xxxxxxxx xxxxxxxx, expected = xxxxxxxx xxxxxxxx
1217 00017366 # **************************************************************************/
1218 00017366 # print_addd_data()
1219 00017366 # {
1220 00017366 13 00ed jbr L359
1221 00017369 L360:
1222 00017369 # writes("initial Acc = ");
1223 00017369 .data 1
1224 00000f3c * L361:
1225 00000f3c * 696E697469616C20416363203 .ascii "initial Acc = \0"
D2000
1226 00000f4b * .text
1227 00017369 dd 8f00000f3c pushl $L361
1228 0001736F fe 08 effffff4ea callf $8,_writes
1229 00017376 # write32h( dbl_ld_acc.m );
1230 00017376 dd effffff4e4 pushl _dbl_ld_acc
1231 0001737C fe 08 effffff4dd callf $8,_write32h
1232 00017383 # writec(' ');
1233 00017383 dd 20 pushl $32
1234 00017385 fe 08 effffff4d4 callf $8,_writec
1235 0001738C # write32h( dbl_ld_acc.l );
1236 0001738C dd effffff4d2 pushl _dbl_ld_acc+4
1237 00017392 fe 08 effffff4c7 callf $8,_write32h
1238 00017399 # writes(", stored = ");
1239 00017399 .data 1
1240 00000f4b * L363:
1241 00000f4b * 2C2020202073746F726564203 .ascii ", stored = \0"
D2000
1242 00000f5a * .text
1243 00017399 dd 8f00000f4b pushl $L363
1244 0001739F fe 08 effffff4ba callf $8,_writes
1245 000173A6 # write32h( dbl_st_acc.m );
1246 000173A6 dd effffff4b4 pushl _dbl_st_acc
1247 000173AC fe 08 effffff4ad callf $8,_write32h
1248 000173B3 # writec(' ');
1249 000173B3 dd 20 pushl $32
1250 000173B5 fe 08 effffff4a4 callf $8,_writec
1251 000173BC # write32h( dbl_st_acc.l );
1252 000173BC dd effffff4a2 pushl _dbl_st_acc+4
1253 000173C2 fe 08 effffff497 callf $8,_write32h
1254 000173C9 # writes(", index = ");
1255 000173C9 .data 1
1256 00000f5a * L364:
1257 00000f5a * 2C202020696E646578203D200 .ascii ", index = \0"
0
1258 00000f67 * .text
1259 000173C9 dd 8f00000f5a pushl $L364
1260 000173CF fe 08 effffff48a callf $8,_writes
1261 000173D6 # writed( index );
1262 000173D6 dd effffff484 pushl _index
1263 000173DC fe 08 effffff47d callf $8,_writed
1264 000173E3 # writec('\n');
1265 000173E3 dd 0a pushl $10
1266 000173E5 fe 08 effffff474 callf $8,_writec
1267 000173EC # writes(" operand = ");
1268 000173EC .data 1
1269 00000f67 * L365:
1270 00000f67 * 202020206F706572616E64203 .ascii " operand = \0"
D2000
1271 00000f76 * .text
1272 000173EC dd 8f00000f67 pushl $L365
1273 000173F2 fe 08 effffff467 callf $8,_writes
1274 000173F9 # write32h( dbl_value_1.m );
1275 000173F9 dd effffff461 pushl _dbl_value_1
1276 000173FF fe 08 effffff45a callf $8,_write32h
1277 00017406 # writec(' ');
1278 00017406 dd 20 pushl $32
1279 00017408 fe 08 effffff451 callf $8,_writec
1280 0001740F # write32h( dbl_value_1.l );
1281 0001740F dd effffff44f pushl _dbl_value_1+4
1282 00017415 fe 08 effffff444 callf $8,_write32h
1283 0001741C # writes(", expected = ");
1284 0001741C .data 1
1285 00000f76 * L366:
1286 00000f76 * 2C20206578706563746564203 .ascii ", expected = \0"
D2000
1287 00000f85 * .text
1288 0001741C dd 8f00000f76 pushl $L366
1289 00017422 fe 08 effffff437 callf $8,_writes
1290 00017429 # write32h( dbl_expected.m );
1291 00017429 dd effffff431 pushl _dbl_expected
1292 0001742F fe 08 effffff42a callf $8,_write32h
1293 00017436 # writec(' ');
1294 00017436 dd 20 pushl $32
1295 00017438 fe 08 effffff421 callf $8,_writec
1296 0001743F # write32h( dbl_expected.l );
1297 0001743F dd effffff41f pushl _dbl_expected+4
1298 00017445 fe 08 effffff414 callf $8,_write32h
1299 0001744C # writec('\n');
1300 0001744C dd 0a pushl $10
1301 0001744E fe 08 effffff40b callf $8,_writec
1302 00017455 # }
1303 00017455 40 ret#2
1304 00017456 .set L357,0x0
1305 00017456 L359:
1306 00017456 13 ff10 jbr L360
1307 00017459 .data
1308 00000d28 * .text
1309 00017459 00 .align 1
1310 0001745A .globl _addd_er_halt
1311 0001745A _addd_er_halt:
1312 0001745A 0000 .word L367
1313 0001745C #
1314 0001745C #
1315 0001745C #
1316 0001745C # /**************************************************************************
1317 0001745C # *
1318 0001745C # * HALT ON ERROR ROUTINE
1319 0001745C # *
1320 0001745C # **************************************************************************/
1321 0001745C # addd_er_halt( halt_code )
1322 0001745C # int halt_code;
1323 0001745C # {
1324 0001745C 13 0123 jbr L369
1325 0001745F L370:
1326 0001745F # sgl_value_1 = dbl_ld_acc.m;
1327 0001745F 0d effffff3fb effffff3f6 movl _dbl_ld_acc,_sgl_value_1
1328 0001746A # sgl_value_2 = dbl_ld_acc.l;
1329 0001746A 0d effffff3f4 effffff3eb movl _dbl_ld_acc+4,_sgl_value_2
1330 00017475 # sgl_value_3 = dbl_value_1.m;
1331 00017475 0d effffff3e5 effffff3e0 movl _dbl_value_1,_sgl_value_3
1332 00017480 # sgl_value_4 = dbl_value_1.l;
1333 00017480 0d effffff3de effffff3d5 movl _dbl_value_1+4,_sgl_value_4
1334 0001748B # sgl_value_5 = dbl_st_acc.m;
1335 0001748B 0d effffff3cf effffff3ca movl _dbl_st_acc,_sgl_value_5
1336 00017496 # sgl_value_6 = dbl_st_acc.l;
1337 00017496 0d effffff3c8 effffff3bf movl _dbl_st_acc+4,_sgl_value_6
1338 000174A1 # sgl_dummy1 = halt_code; /* get the error type */
1339 000174A1 0d ad04 effffff3b7 movl 4(fp),_sgl_dummy1
1340 000174A9 # asm("movl _test_no,r0"); /* r0 = test number */
1341 000174A9 0d effffff3b1 50 movl _test_no,r0
1342 000174B0 # asm("movl _subtest,r1"); /* r1 = subtest number */
1343 000174B0 0d effffff3aa 51 movl _subtest,r1
1344 000174B7 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1345 000174B7 0d effffff3a3 52 movl _sgl_dummy1,r2
1346 000174BE # asm("movl _cycle,r3"); /* r3 = cycle count */
1347 000174BE 0d effffff39c 53 movl _cycle,r3
1348 000174C5 # asm("movl _sgl_value_1,r4"); /* r4 = MS operand 1 */
1349 000174C5 0d effffff395 54 movl _sgl_value_1,r4
1350 000174CC # asm("movl _sgl_value_2,r5"); /* r5 = LS operand 1 */
1351 000174CC 0d effffff38e 55 movl _sgl_value_2,r5
1352 000174D3 # asm("movl _sgl_value_3,r6"); /* r6 = MS operand 2 */
1353 000174D3 0d effffff387 56 movl _sgl_value_3,r6
1354 000174DA # asm("movl _sgl_value_4,r7"); /* r7 = LS operand 2 */
1355 000174DA 0d effffff380 57 movl _sgl_value_4,r7
1356 000174E1 # asm("movl _sgl_value_5,r8"); /* r8 = MS stored */
1357 000174E1 0d effffff379 58 movl _sgl_value_5,r8
1358 000174E8 # asm("movl _sgl_value_6,r9"); /* r9 = LS stored */
1359 000174E8 0d effffff372 59 movl _sgl_value_6,r9
1360 000174EF # if( halt_code == BAD_ACC_HLT ) {
1361 000174EF 1d ad04 01 cmpl 4(fp),$1
1362 000174F3 21 2d jneq L371
1363 000174F5 # sgl_value_1 = dbl_expected.m;
1364 000174F5 0d effffff365 effffff360 movl _dbl_expected,_sgl_value_1
1365 00017500 # sgl_value_2 = dbl_expected.l;
1366 00017500 0d effffff35e effffff355 movl _dbl_expected+4,_sgl_value_2
1367 0001750B # asm("movl _sgl_value_1,r10"); /* r10 = MS expected */
1368 0001750B 0d effffff34f 5a movl _sgl_value_1,r10
1369 00017512 # asm("movl _sgl_value_2,r11"); /* r11 = LS expected */
1370 00017512 0d effffff348 5b movl _sgl_value_2,r11
1371 00017519 # asm("movl _index2,r12"); /* r12 = data index */
1372 00017519 0d effffff341 5c movl _index2,r12
1373 00017520 # } else
1374 00017520 11 5e jbr L372
1375 00017522 L371:
1376 00017522 # if( halt_code == BAD_REG_HLT ) {
1377 00017522 1d ad04 02 cmpl 4(fp),$2
1378 00017526 21 3d jneq L373
1379 00017528 # sgl_dummy1 = load_regs[index2];
1380 00017528 0d effffff332 50 movl _index2,r0
1381 0001752F 0d 40effffff32a movl _load_regs[r0],_sgl_dummy1
effffff325
1382 0001753B # sgl_dummy2 = store_regs[index2];
1383 0001753B 0d effffff31f 50 movl _index2,r0
1384 00017542 0d 40effffff317 movl _store_regs[r0],_sgl_dummy2
effffff312
1385 0001754E # asm("movl _index2,r10"); /* r10 = bad register # */
1386 0001754E 0d effffff30c 5a movl _index2,r10
1387 00017555 # asm("movl _sgl_dummy2,r11"); /* r11 = actual value */
1388 00017555 0d effffff305 5b movl _sgl_dummy2,r11
1389 0001755C # asm("movl _sgl_dummy1,r12"); /* r12 = expected value */
1390 0001755C 0d effffff2fe 5c movl _sgl_dummy1,r12
1391 00017563 # } else
1392 00017563 11 1b jbr L374
1393 00017565 L373:
1394 00017565 # if( halt_code == BAD_PSL_HLT ) {
1395 00017565 1d ad04 03 cmpl 4(fp),$3
1396 00017569 21 15 jneq L375
1397 0001756B # asm("movl _init_psl,r10"); /* r10 = initial PSL */
1398 0001756B 0d effffff2ef 5a movl _init_psl,r10
1399 00017572 # asm("movl _psl_val,r11"); /* r11 = final PSL */
1400 00017572 0d effffff2e8 5b movl _psl_val,r11
1401 00017579 # asm("movl _exp_psl,r12"); /* r12 = expected PSL */
1402 00017579 0d effffff2e1 5c movl _exp_psl,r12
1403 00017580 # };
1404 00017580 L375:
1405 00017580 L374:
1406 00017580 L372:
1407 00017580 # asm("halt"); /* HALT ... */
1408 00017580 00 halt
1409 00017581 # }
1410 00017581 40 ret#2
1411 00017582 .set L367,0x0
1412 00017582 L369:
1413 00017582 13 feda jbr L370
1414 00017585 .data
1414 0002DDE5 .data
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