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1.1 ! root 1: #include "fpp_defs.h" ! 2: ! 3: ! 4: /***************************************************************************** ! 5: * ! 6: * ADDF - SINGLE PRECISION FLOATING POINT ADD TEST ! 7: * ! 8: *****************************************************************************/ ! 9: addf() ! 10: { ! 11: asm(".globl _addf_t"); ! 12: asm("_addf_t:"); /* entry address */ ! 13: if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st cycle */ ! 14: writes(" ADDF"); ! 15: addf_1(); /* add through a register */ ! 16: addf_2(); /* add through the cache */ ! 17: addf_3(); /* wait 3 NOPs */ ! 18: addf_4(); /* wait 2 NOPs */ ! 19: addf_5(); /* wait 1 NOP before storing */ ! 20: addf_6(); /* register stability test */ ! 21: addf_7(); /* PSL stability test */ ! 22: addf_8(); /* piped entry test */ ! 23: asm("jmp *return"); /* return to the test monitor */ ! 24: } ! 25: ! 26: ! 27: ! 28: /************************************************************************ ! 29: * ! 30: * SUBTEST 1 - add through a register ! 31: * ! 32: ************************************************************************/ ! 33: addf_1() ! 34: { ! 35: force_loop = FALSE; ! 36: subtest = 1; ! 37: for( index = 0; index < max_addf_1_index; index++ ) { ! 38: sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */ ! 39: sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */ ! 40: sgl_expected = addf_1_data[index].exp; /* get expected result */ ! 41: /* ! 42: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 43: * The force loop flag is set after the first error. ! 44: */ ! 45: asm("_addf_1_lp1:"); ! 46: asm("movl _sgl_ld_acc,r3"); /* move the 1st data to r3 */ ! 47: asm("movl _sgl_value_1,r4"); /* move the 2nd data to r4 */ ! 48: asm("ldf r3"); /* load the 1st operand */ ! 49: asm("addf r4"); /* add the 2nd operand */ ! 50: asm("stf _sgl_st_acc"); /* store the result */ ! 51: if( force_loop ) ! 52: asm("brb _addf_1_lp1");; /* loop on the error */ ! 53: /* ! 54: * end error loop - test the results ! 55: */ ! 56: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 57: errcnt++; /* bump the error count */ ! 58: if( prt_error ) { ! 59: print_addf_er_hdr(); ! 60: writes(" (Reg. Data) - BAD FINAL ACC\n"); ! 61: print_addf_data(); ! 62: } ! 63: if( halt_flg ) ! 64: addf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 65: if( loop_on_err ) { ! 66: force_loop = TRUE; /* set the force loop flag */ ! 67: asm("brw _addf_1_lp1");; /* and loop on the error */ ! 68: } /* end of loop on error */ ! 69: } /* end of compare error */ ! 70: } /* end of WHILE loop */ ! 71: } /* end of subtest 1 */ ! 72: ! 73: ! 74: ! 75: /************************************************************************ ! 76: * ! 77: * SUBTEST 2 - add through memory ! 78: * ! 79: ************************************************************************/ ! 80: addf_2() ! 81: { ! 82: force_loop = FALSE; ! 83: subtest = 2; ! 84: for( index = 0; index < max_addf_1_index; index++ ) { ! 85: sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */ ! 86: sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */ ! 87: sgl_expected = addf_1_data[index].exp; /* get expected result */ ! 88: /* ! 89: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 90: * The force loop flag is set after the first error. ! 91: */ ! 92: asm("_addf_2_lp1:"); ! 93: asm("ldf _sgl_ld_acc"); /* load the 1st operand */ ! 94: asm("addf _sgl_value_1"); /* add the 2nd operand */ ! 95: asm("stf _sgl_st_acc"); /* store the result */ ! 96: if( force_loop ) ! 97: asm("brb _addf_2_lp1");; /* loop on the error */ ! 98: /* ! 99: * end error loop - test the results ! 100: */ ! 101: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 102: errcnt++; /* bump the error count */ ! 103: if( prt_error ) { ! 104: print_addf_er_hdr(); ! 105: writes(" (Cache Data) - BAD FINAL ACC\n"); ! 106: print_addf_data(); ! 107: } ! 108: if( halt_flg ) ! 109: addf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 110: if( loop_on_err ) { ! 111: force_loop = TRUE; /* set the force loop flag */ ! 112: asm("brw _addf_2_lp1");; /* and loop on the error */ ! 113: } /* end of loop on error */ ! 114: } /* end of compare error */ ! 115: } /* end of WHILE loop */ ! 116: } /* end of subtest 2 */ ! 117: ! 118: ! 119: ! 120: /************************************************************************ ! 121: * ! 122: * SUBTEST 3 - Wait 3 NOPs before storing the results ! 123: * ! 124: ************************************************************************/ ! 125: addf_3() ! 126: { ! 127: force_loop = FALSE; ! 128: subtest = 3; ! 129: for( index = 0; index < max_addf_1_index; index++ ) { ! 130: sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */ ! 131: sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */ ! 132: sgl_expected = addf_1_data[index].exp; /* get expected result */ ! 133: /* ! 134: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 135: * The force loop flag is set after the first error. ! 136: */ ! 137: asm("_addf_3_lp1:"); ! 138: asm("ldf _sgl_ld_acc"); /* load the 1st operand */ ! 139: asm("nop"); /* delay */ ! 140: asm("addf _sgl_value_1"); /* add the 2nd operand */ ! 141: asm("nop"); /* delay before ... */ ! 142: asm("nop"); ! 143: asm("nop"); /* ... storing the result */ ! 144: asm("stf _sgl_st_acc"); /* store the result */ ! 145: if( force_loop ) ! 146: asm("brb _addf_3_lp1");; /* loop on the error */ ! 147: /* ! 148: * end error loop - test the results ! 149: */ ! 150: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 151: errcnt++; /* bump the error count */ ! 152: if( prt_error ) { ! 153: print_addf_er_hdr(); ! 154: writes(" (Cache Data - 3 NOPS) - BAD FINAL ACC\n"); ! 155: print_addf_data(); ! 156: } ! 157: if( halt_flg ) ! 158: addf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 159: if( loop_on_err ) { ! 160: force_loop = TRUE; /* set the force loop flag */ ! 161: asm("brw _addf_3_lp1");; /* and loop on the error */ ! 162: } /* end of loop on error */ ! 163: } /* end of compare error */ ! 164: } /* end of WHILE loop */ ! 165: } /* end of subtest 3 */ ! 166: ! 167: ! 168: ! 169: /************************************************************************ ! 170: * ! 171: * SUBTEST 4 - Wait 2 NOPs before storing the results ! 172: * ! 173: ************************************************************************/ ! 174: addf_4() ! 175: { ! 176: force_loop = FALSE; ! 177: subtest = 4; ! 178: for( index = 0; index < max_addf_1_index; index++ ) { ! 179: sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */ ! 180: sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */ ! 181: sgl_expected = addf_1_data[index].exp; /* get expected result */ ! 182: /* ! 183: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 184: * The force loop flag is set after the first error. ! 185: */ ! 186: asm("_addf_4_lp1:"); ! 187: asm("ldf _sgl_ld_acc"); /* load the 1st operand */ ! 188: asm("nop"); /* delay */ ! 189: asm("addf _sgl_value_1"); /* add the 2nd operand */ ! 190: asm("nop"); /* delay before ... */ ! 191: asm("nop"); /* ... storing the result */ ! 192: asm("stf _sgl_st_acc"); /* store the result */ ! 193: if( force_loop ) ! 194: asm("brb _addf_4_lp1");; /* loop on the error */ ! 195: /* ! 196: * end error loop - test the results ! 197: */ ! 198: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 199: errcnt++; /* bump the error count */ ! 200: if( prt_error ) { ! 201: print_addf_er_hdr(); ! 202: writes(" (Cache Data - 2 NOPS) - BAD FINAL ACC\n"); ! 203: print_addf_data(); ! 204: } ! 205: if( halt_flg ) ! 206: addf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 207: if( loop_on_err ) { ! 208: force_loop = TRUE; /* set the force loop flag */ ! 209: asm("brw _addf_4_lp1");; /* and loop on the error */ ! 210: } /* end of loop on error */ ! 211: } /* end of compare error */ ! 212: } /* end of WHILE loop */ ! 213: } /* end of subtest 4 */ ! 214: ! 215: ! 216: ! 217: /************************************************************************ ! 218: * ! 219: * SUBTEST 5 - Wait 1 NOP before storing the results ! 220: * ! 221: ************************************************************************/ ! 222: addf_5() ! 223: { ! 224: force_loop = FALSE; ! 225: subtest = 5; ! 226: for( index = 0; index < max_addf_1_index; index++ ) { ! 227: sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */ ! 228: sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */ ! 229: sgl_expected = addf_1_data[index].exp; /* get expected result */ ! 230: /* ! 231: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 232: * The force loop flag is set after the first error. ! 233: */ ! 234: asm("_addf_5_lp1:"); ! 235: asm("ldf _sgl_ld_acc"); /* load the 1st operand */ ! 236: asm("nop"); /* delay */ ! 237: asm("addf _sgl_value_1"); /* add the 2nd operand */ ! 238: asm("nop"); /* delay before storing */ ! 239: asm("stf _sgl_st_acc"); /* store the result */ ! 240: if( force_loop ) ! 241: asm("brb _addf_5_lp1");; /* loop on the error */ ! 242: /* ! 243: * end error loop - test the results ! 244: */ ! 245: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 246: errcnt++; /* bump the error count */ ! 247: if( prt_error ) { ! 248: print_addf_er_hdr(); ! 249: writes(" (Cache Data - 1 NOP) - BAD FINAL ACC\n"); ! 250: print_addf_data(); ! 251: } ! 252: if( halt_flg ) ! 253: addf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 254: if( loop_on_err ) { ! 255: force_loop = TRUE; /* set the force loop flag */ ! 256: asm("brw _addf_5_lp1");; /* and loop on the error */ ! 257: } /* end of loop on error */ ! 258: } /* end of compare error */ ! 259: } /* end of WHILE loop */ ! 260: } /* end of subtest 5 */ ! 261: ! 262: ! 263: ! 264: /************************************************************************ ! 265: * ! 266: * SUBTEST 6 - Check for register corruption ! 267: * ! 268: ************************************************************************/ ! 269: addf_6() ! 270: { ! 271: force_loop = FALSE; /* clear force_loop flg */ ! 272: subtest = 6; ! 273: fill_reg_buf( load_regs ); /* get patterns for regs */ ! 274: index = 0; ! 275: sgl_ld_acc = addf_1_data[0].op_1; /* get operand 1 */ ! 276: sgl_value_1 = addf_1_data[0].op_2; /* get operand 2 */ ! 277: sgl_expected = addf_1_data[0].exp; /* get expected result */ ! 278: /* ! 279: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 280: * The force loop flag is set after the first error. ! 281: */ ! 282: asm("_addf_6_lp1:"); ! 283: asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */ ! 284: asm("nop"); ! 285: asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */ ! 286: asm("nop"); ! 287: asm("addf _sgl_value_1"); /* do the add */ ! 288: asm("nop"); ! 289: asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */ ! 290: asm("stf _sgl_st_acc"); /* save the accumulator */ ! 291: if( force_loop ) ! 292: asm("brb _addf_6_lp1");; /* loop on the error */ ! 293: /* ! 294: * Now compare the stored register values to those that were loaded ! 295: */ ! 296: index2 = 0; ! 297: while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) ) ! 298: index2++; /* check reg values */ ! 299: if( index2 < 13 ) { /* error if index2 < 13 */ ! 300: errcnt++; /* bump the error count */ ! 301: if( prt_error ) { ! 302: print_addf_er_hdr(); ! 303: writes(" - A REGISTER WAS MODIFIED\n"); ! 304: print_addf_data(); ! 305: writes("register "); /* print the information */ ! 306: writed( index2 ); /* about the corrupted */ ! 307: writes(" = "); /* register */ ! 308: write32h( store_regs[index2] ); ! 309: writes(", should be = "); ! 310: write32h( load_regs[index2] ); ! 311: writes("\n"); ! 312: } ! 313: if( halt_flg ) ! 314: addf_er_halt( BAD_REG_HLT ); /* halt on the error */ ! 315: if( loop_on_err ) { ! 316: force_loop = TRUE; /* set the force loop flag */ ! 317: asm("brw _addf_6_lp1");; /* and loop on the error */ ! 318: } /* end of loop on error */ ! 319: } /* end of register corruption error */ ! 320: } /* end of subtest 6 */ ! 321: ! 322: ! 323: ! 324: /************************************************************************ ! 325: * ! 326: * SUBTEST 7 - Check for PSL corruption ! 327: * ! 328: ************************************************************************/ ! 329: addf_7() ! 330: { ! 331: force_loop = FALSE; /* clear force_loop flg */ ! 332: subtest = 7; ! 333: fill_reg_buf( load_regs ); /* get patterns for regs */ ! 334: for( index = 0; index < 3; index++ ) { ! 335: sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */ ! 336: sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */ ! 337: sgl_expected = addf_1_data[index].exp; /* get expected */ ! 338: sgl_dummy1 = status_array[index]; /* status = +, -, 0 */ ! 339: /* ! 340: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 341: * The force loop flag is set after the first error. ! 342: */ ! 343: asm("_addf_7_lp1:"); ! 344: asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */ ! 345: asm("nop"); ! 346: asm("tstl _sgl_dummy1"); /* set the PSL status */ ! 347: asm("movpsl _init_psl"); /* save the initial PSL */ ! 348: asm("addf _sgl_value_1"); /* do the add */ ! 349: asm("nop"); ! 350: asm("movpsl _psl_val"); /* save the final PSL */ ! 351: asm("stf _sgl_st_acc"); /* save the accumulator */ ! 352: if( force_loop ) ! 353: asm("brb _addf_7_lp1");; /* loop on the error */ ! 354: /* ! 355: * Now compare the final PSL to the initial PSL -they should be the same ! 356: */ ! 357: exp_psl = init_psl; ! 358: if( psl_val != exp_psl ) { ! 359: errcnt++; /* bump the error count */ ! 360: if( prt_error ) { ! 361: print_addf_er_hdr(); ! 362: writes(" - INCORRECT FINAL PSL\n"); ! 363: print_addf_data(); ! 364: writes("initial PSL = "); ! 365: write32h( init_psl ); ! 366: writes(", final PSL = "); ! 367: write32h( psl_val ); ! 368: writes(", expected PSL = "); ! 369: write32h( exp_psl ); ! 370: writes("\n"); ! 371: } ! 372: if( halt_flg ) ! 373: addf_er_halt( BAD_PSL_HLT ); /* halt on the error */ ! 374: if( loop_on_err ) { ! 375: force_loop = TRUE; /* set the force loop flag */ ! 376: asm("brw _addf_7_lp1");; /* and loop on the error */ ! 377: } /* end of loop on error */ ! 378: } /* end of PSL corruption error */ ! 379: } /* end of data WHILE loop */ ! 380: } /* end of subtest 7 */ ! 381: ! 382: ! 383: ! 384: /************************************************************************ ! 385: * ! 386: * SUBTEST 8 - pipelined entry test ! 387: * ! 388: ************************************************************************/ ! 389: addf_8() ! 390: { ! 391: force_loop = FALSE; ! 392: subtest = 8; ! 393: for( index = 0; index < max_addf_1_index; index++ ) { ! 394: sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */ ! 395: sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */ ! 396: sgl_expected = addf_1_data[index].exp; /* get expected result */ ! 397: /* ! 398: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 399: * The force loop flag is set after the first error. ! 400: */ ! 401: asm("_addf_8_lp1:"); ! 402: asm("movl $0,r0"); /* clear r0 */ ! 403: asm("ldf r0"); /* load the Acc. with 0.0 */ ! 404: asm("addf _sgl_ld_acc"); /* add the 1st operand */ ! 405: asm("addf _sgl_value_1"); /* add the 2nd operand */ ! 406: asm("stf _sgl_st_acc"); /* store the result */ ! 407: if( force_loop ) ! 408: asm("brb _addf_8_lp1");; /* loop on the error */ ! 409: /* ! 410: * end error loop - test the results ! 411: */ ! 412: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 413: errcnt++; /* bump the error count */ ! 414: if( prt_error ) { ! 415: print_addf_er_hdr(); ! 416: writes(" (Piped Entry) - BAD FINAL ACC\n"); ! 417: print_addf_data(); ! 418: } ! 419: if( halt_flg ) ! 420: addf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 421: if( loop_on_err ) { ! 422: force_loop = TRUE; /* set the force loop flag */ ! 423: asm("brw _addf_8_lp1"); /* and loop on the error */ ! 424: } /* end of loop on error */ ! 425: } /* end of compare error */ ! 426: } /* end of data While loop */ ! 427: } /* end of subtest 8 */ ! 428: ! 429: ! 430: ! 431: /************************************************************************** ! 432: * ! 433: * PRINT THE ERROR HEADER ! 434: * ! 435: **************************************************************************/ ! 436: print_addf_er_hdr() ! 437: { ! 438: writes(" \n"); /* start a new print line */ ! 439: writes("cycle: "); /* print the cycle count */ ! 440: writed( cycle ); ! 441: writes(" ADDF test "); /* print the test number */ ! 442: writed( test_no ); ! 443: writes(", subtest "); /* print the subtest no. */ ! 444: writed( subtest ); ! 445: } ! 446: ! 447: ! 448: ! 449: /************************************************************************** ! 450: * ! 451: * PRINT THE DATA AND STORE RESULTS ! 452: * ! 453: * initial Acc = xxxxxxxx, stored = xxxxxxxx, data index = xx ! 454: * operand = xxxxxxxx, expected = xxxxxxxx ! 455: **************************************************************************/ ! 456: print_addf_data() ! 457: { ! 458: writes("initial Acc = "); ! 459: write32h( sgl_ld_acc ); ! 460: writes(", stored = "); ! 461: write32h( sgl_st_acc ); ! 462: writes(", data index = "); ! 463: writed( index ); ! 464: writec('\n'); ! 465: writes(" operand = "); ! 466: write32h( sgl_value_1 ); ! 467: writes(", expected = "); ! 468: write32h( sgl_expected ); ! 469: writec('\n'); ! 470: } ! 471: ! 472: ! 473: ! 474: /************************************************************************** ! 475: * ! 476: * HALT ON ERROR ROUTINE ! 477: * ! 478: **************************************************************************/ ! 479: addf_er_halt( halt_code ) ! 480: int halt_code; ! 481: { ! 482: sgl_dummy1 = halt_code; /* get the error type */ ! 483: asm("movl _test_no,r0"); /* r0 = test number */ ! 484: asm("movl _subtest,r1"); /* r1 = subtest number */ ! 485: asm("movl _sgl_dummy1,r2"); /* r2 = error code */ ! 486: asm("movl _cycle,r3"); /* r3 = cycle count */ ! 487: asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */ ! 488: asm("movl _sgl_value_1,r5"); /* r5 = data added */ ! 489: asm("movl _sgl_st_acc,r6"); /* r6 = data stored */ ! 490: if( halt_code == BAD_ACC_HLT ) { ! 491: asm("movl _sgl_expected,r7"); /* r7 = data expected */ ! 492: asm("movl _index,r8"); /* r8 = data index */ ! 493: } else ! 494: if( halt_code == BAD_REG_HLT ) { ! 495: sgl_dummy1 = load_regs[index2]; ! 496: sgl_dummy2 = store_regs[index2]; ! 497: asm("movl _index2,r7"); /* r7 = bad register # */ ! 498: asm("movl _sgl_dummy2,r8"); /* r8 = actual value */ ! 499: asm("movl _sgl_dummy1,r9"); /* r9 = expected value */ ! 500: } else ! 501: if( halt_code == BAD_PSL_HLT ) { ! 502: asm("movl _init_psl,r7"); /* r7 = initial PSL */ ! 503: asm("movl _psl_val,r8"); /* r8 = final PSL */ ! 504: asm("movl _exp_psl,r9"); /* r9 = expected PSL */ ! 505: }; ! 506: asm("halt"); /* HALT ... */ ! 507: }
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