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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
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1.1 root 1: 1 00000000 LL0:
2: 2 00000000 .data
3: 3 00000a78 * .text
4: 4 00000000 .align 1
5: 5 00000000 .globl _addf
6: 6 00000000 _addf:
7: 7 0000D62C 0000 .word L215
8: 8 0000D62E # #include "fpp_defs.h"
9: 9 0000D62E #
10: 10 0000D62E #
11: 11 0000D62E # /*****************************************************************************
12: 12 0000D62E # *
13: 13 0000D62E # * ADDF - SINGLE PRECISION FLOATING POINT ADD TEST
14: 14 0000D62E # *
15: 15 0000D62E # *****************************************************************************/
16: 16 0000D62E # addf()
17: 17 0000D62E # {
18: 18 0000D62E 11 5d jbr L217
19: 19 0000D630 L218:
20: 20 0000D630 # asm(".globl _addf_t");
21: 21 0000D630 .globl _addf_t
22: 22 0000D630 # asm("_addf_t:"); /* entry address */
23: 23 0000D630 _addf_t:
24: 24 0000D630 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st cycle */
25: 25 0000D630 1d effffffff6 01 cmpl _cycle,$1
26: 26 0000D637 21 15 jneq L219
27: 27 0000D639 5d efffffffed tstl _prt_hdrs
28: 28 0000D63F 31 0d jeql L219
29: 29 0000D641 # writes(" ADDF");
30: 30 0000D641 .data 1
31: 31 00000a78 * L221:
32: 32 00000a78 * 204144444600 .ascii " ADDF\0"
33: 33 00000a7e * .text
34: 34 0000D641 dd 8f00000a78 pushl $L221
35: 35 0000D647 fe 08 efffffffde callf $8,_writes
36: 36 0000D64E # addf_1(); /* add through a register */
37: 37 0000D64E L219:
38: 38 0000D64E fe 04 ef0000003b callf $4,_addf_1
39: 39 0000D655 # addf_2(); /* add through the cache */
40: 40 0000D655 fe 04 ef0000011e callf $4,_addf_2
41: 41 0000D65C # addf_3(); /* wait 3 NOPs */
42: 42 0000D65C fe 04 ef000001fb callf $4,_addf_3
43: 43 0000D663 # addf_4(); /* wait 2 NOPs */
44: 44 0000D663 fe 04 ef000002dc callf $4,_addf_4
45: 45 0000D66A # addf_5(); /* wait 1 NOP before storing */
46: 46 0000D66A fe 04 ef000003bb callf $4,_addf_5
47: 47 0000D671 # addf_6(); /* register stability test */
48: 48 0000D671 fe 04 ef0000049a callf $4,_addf_6
49: 49 0000D678 # addf_7(); /* PSL stability test */
50: 50 0000D678 fe 04 ef00000609 callf $4,_addf_7
51: 51 0000D67F # addf_8(); /* piped entry test */
52: 52 0000D67F fe 04 ef0000077e callf $4,_addf_8
53: 53 0000D686 # asm("jmp *return"); /* return to the test monitor */
54: 54 0000D686 71 ffffffffa0 jmp *return
55: 55 0000D68C # }
56: 56 0000D68C 40 ret#2
57: 57 0000D68D .set L215,0x0
58: 58 0000D68D L217:
59: 59 0000D68D 11 a1 jbr L218
60: 60 0000D68F .data
61: 61 00000a78 * .text
62: 62 0000D68F 00 .align 1
63: 63 0000D690 .globl _addf_1
64: 64 0000D690 _addf_1:
65: 65 0000D690 0000 .word L230
66: 66 0000D692 #
67: 67 0000D692 #
68: 68 0000D692 #
69: 69 0000D692 # /************************************************************************
70: 70 0000D692 # *
71: 71 0000D692 # * SUBTEST 1 - add through a register
72: 72 0000D692 # *
73: 73 0000D692 # ************************************************************************/
74: 74 0000D692 # addf_1()
75: 75 0000D692 # {
76: 76 0000D692 13 00e1 jbr L232
77: 77 0000D695 L233:
78: 78 0000D695 # force_loop = FALSE;
79: 79 0000D695 4d efffffff91 clrl _force_loop
80: 80 0000D69B # subtest = 1;
81: 81 0000D69B 0d 01 efffffff8a movl $1,_subtest
82: 82 0000D6A2 # for( index = 0; index < max_addf_1_index; index++ ) {
83: 83 0000D6A2 4d efffffff84 clrl _index
84: 84 0000D6A8 L236:
85: 85 0000D6A8 1d efffffff7e efffffff79 cmpl _index,_max_addf_1_index
86: 86 0000D6B3 91 03 13 00bd jgeq L235
87: 87 0000D6B8 # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
88: 88 0000D6B8 5c 0c efffffff6d 50 mull3 $12,_index,r0
89: 89 0000D6C0 0d e000000000 efffffff61 movl _addf_1_data(r0),_sgl_ld_acc
90: 90 0000D6CB # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
91: 91 0000D6CB 5c 0c efffffff5a 50 mull3 $12,_index,r0
92: 92 0000D6D3 0d e000000004 efffffff4e movl _addf_1_data+4(r0),_sgl_value_1
93: 93 0000D6DE # sgl_expected = addf_1_data[index].exp; /* get expected result */
94: 94 0000D6DE 5c 0c efffffff47 50 mull3 $12,_index,r0
95: 95 0000D6E6 0d e000000008 efffffff3b movl _addf_1_data+8(r0),_sgl_expected
96: 96 0000D6F1 # /*
97: 97 0000D6F1 # * If LOOP ON ERROR is set, this is the loop for this subtest.
98: 98 0000D6F1 # * The force loop flag is set after the first error.
99: 99 0000D6F1 # */
100: 100 0000D6F1 # asm("_addf_1_lp1:");
101: 101 0000D6F1 _addf_1_lp1:
102: 102 0000D6F1 # asm("movl _sgl_ld_acc,r3"); /* move the 1st data to r3 */
103: 103 0000D6F1 0d efffffff35 53 movl _sgl_ld_acc,r3
104: 104 0000D6F8 # asm("movl _sgl_value_1,r4"); /* move the 2nd data to r4 */
105: 105 0000D6F8 0d efffffff2e 54 movl _sgl_value_1,r4
106: 106 0000D6FF # asm("ldf r3"); /* load the 1st operand */
107: 107 0000D6FF 06 53 ldf r3
108: 108 0000D701 # asm("addf r4"); /* add the 2nd operand */
109: 109 0000D701 c6 54 addf r4
110: 110 0000D703 # asm("stf _sgl_st_acc"); /* store the result */
111: 111 0000D703 26 efffffff23 stf _sgl_st_acc
112: 112 0000D709 # if( force_loop )
113: 113 0000D709 5d efffffff1d tstl _force_loop
114: 114 0000D70F 31 02 jeql L237
115: 115 0000D711 # asm("brb _addf_1_lp1");; /* loop on the error */
116: 116 0000D711 11 de brb _addf_1_lp1
117: 117 0000D713 L237:
118: 118 0000D713 # /*
119: 119 0000D713 # * end error loop - test the results
120: 120 0000D713 # */
121: 121 0000D713 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
122: 122 0000D713 1d efffffff13 efffffff0e cmpl _sgl_st_acc,_sgl_expected
123: 123 0000D71E 31 4c jeql L238
124: 124 0000D720 # errcnt++; /* bump the error count */
125: 125 0000D720 6d efffffff06 incl _errcnt
126: 126 0000D726 # if( prt_error ) {
127: 127 0000D726 5d efffffff00 tstl _prt_error
128: 128 0000D72C 31 1b jeql L239
129: 129 0000D72E # print_addf_er_hdr();
130: 130 0000D72E fe 04 ef000007b7 callf $4,_print_addf_er_hdr
131: 131 0000D735 # writes(" (Reg. Data) - BAD FINAL ACC\n");
132: 132 0000D735 .data 1
133: 133 00000a7e * L241:
134: 134 00000a7e * 20285265672E2044617461292 .ascii " (Reg. Data) - BAD FINAL ACC\12\0"
135: 02D204241442046494E414C20
136: 4143430A00
137: 135 00000a9c * .text
138: 136 0000D735 dd 8f00000a7e pushl $L241
139: 137 0000D73B fe 08 effffffeea callf $8,_writes
140: 138 0000D742 # print_addf_data();
141: 139 0000D742 fe 04 ef00000805 callf $4,_print_addf_data
142: 140 0000D749 # }
143: 141 0000D749 # if( halt_flg )
144: 142 0000D749 L239:
145: 143 0000D749 5d effffffedd tstl _halt_flg
146: 144 0000D74F 31 09 jeql L243
147: 145 0000D751 # addf_er_halt( BAD_ACC_HLT ); /* halt on the error */
148: 146 0000D751 dd 01 pushl $1
149: 147 0000D753 fe 08 ef00000892 callf $8,_addf_er_halt
150: 148 0000D75A # if( loop_on_err ) {
151: 149 0000D75A L243:
152: 150 0000D75A 5d effffffecc tstl _loop_on_err
153: 151 0000D760 31 0a jeql L245
154: 152 0000D762 # force_loop = TRUE; /* set the force loop flag */
155: 153 0000D762 0d 01 effffffec3 movl $1,_force_loop
156: 154 0000D769 # asm("brw _addf_1_lp1");; /* and loop on the error */
157: 155 0000D769 13 ff85 brw _addf_1_lp1
158: 156 0000D76C # } /* end of loop on error */
159: 157 0000D76C # } /* end of compare error */
160: 158 0000D76C L245:
161: 159 0000D76C # } /* end of WHILE loop */
162: 160 0000D76C L238:
163: 161 0000D76C L234:
164: 162 0000D76C 6d effffffeba incl _index
165: 163 0000D772 13 ff33 jbr L236
166: 164 0000D775 L235:
167: 165 0000D775 # } /* end of subtest 1 */
168: 166 0000D775 40 ret#2
169: 167 0000D776 .set L230,0x0
170: 168 0000D776 L232:
171: 169 0000D776 13 ff1c jbr L233
172: 170 0000D779 .data
173: 171 00000a78 * .text
174: 172 0000D779 00 .align 1
175: 173 0000D77A .globl _addf_2
176: 174 0000D77A _addf_2:
177: 175 0000D77A 0000 .word L246
178: 176 0000D77C #
179: 177 0000D77C #
180: 178 0000D77C #
181: 179 0000D77C # /************************************************************************
182: 180 0000D77C # *
183: 181 0000D77C # * SUBTEST 2 - add through memory
184: 182 0000D77C # *
185: 183 0000D77C # ************************************************************************/
186: 184 0000D77C # addf_2()
187: 185 0000D77C # {
188: 186 0000D77C 13 00db jbr L248
189: 187 0000D77F L249:
190: 188 0000D77F # force_loop = FALSE;
191: 189 0000D77F 4d effffffea7 clrl _force_loop
192: 190 0000D785 # subtest = 2;
193: 191 0000D785 0d 02 effffffea0 movl $2,_subtest
194: 192 0000D78C # for( index = 0; index < max_addf_1_index; index++ ) {
195: 193 0000D78C 4d effffffe9a clrl _index
196: 194 0000D792 L252:
197: 195 0000D792 1d effffffe94 effffffe8f cmpl _index,_max_addf_1_index
198: 196 0000D79D 91 03 13 00b7 jgeq L251
199: 197 0000D7A2 # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
200: 198 0000D7A2 5c 0c effffffe83 50 mull3 $12,_index,r0
201: 199 0000D7AA 0d e000000000 effffffe77 movl _addf_1_data(r0),_sgl_ld_acc
202: 200 0000D7B5 # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
203: 201 0000D7B5 5c 0c effffffe70 50 mull3 $12,_index,r0
204: 202 0000D7BD 0d e000000004 effffffe64 movl _addf_1_data+4(r0),_sgl_value_1
205: 203 0000D7C8 # sgl_expected = addf_1_data[index].exp; /* get expected result */
206: 204 0000D7C8 5c 0c effffffe5d 50 mull3 $12,_index,r0
207: 205 0000D7D0 0d e000000008 effffffe51 movl _addf_1_data+8(r0),_sgl_expected
208: 206 0000D7DB # /*
209: 207 0000D7DB # * If LOOP ON ERROR is set, this is the loop for this subtest.
210: 208 0000D7DB # * The force loop flag is set after the first error.
211: 209 0000D7DB # */
212: 210 0000D7DB # asm("_addf_2_lp1:");
213: 211 0000D7DB _addf_2_lp1:
214: 212 0000D7DB # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
215: 213 0000D7DB 06 effffffe4b ldf _sgl_ld_acc
216: 214 0000D7E1 # asm("addf _sgl_value_1"); /* add the 2nd operand */
217: 215 0000D7E1 c6 effffffe45 addf _sgl_value_1
218: 216 0000D7E7 # asm("stf _sgl_st_acc"); /* store the result */
219: 217 0000D7E7 26 effffffe3f stf _sgl_st_acc
220: 218 0000D7ED # if( force_loop )
221: 219 0000D7ED 5d effffffe39 tstl _force_loop
222: 220 0000D7F3 31 02 jeql L253
223: 221 0000D7F5 # asm("brb _addf_2_lp1");; /* loop on the error */
224: 222 0000D7F5 11 e4 brb _addf_2_lp1
225: 223 0000D7F7 L253:
226: 224 0000D7F7 # /*
227: 225 0000D7F7 # * end error loop - test the results
228: 226 0000D7F7 # */
229: 227 0000D7F7 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
230: 228 0000D7F7 1d effffffe2f effffffe2a cmpl _sgl_st_acc,_sgl_expected
231: 229 0000D802 31 4c jeql L254
232: 230 0000D804 # errcnt++; /* bump the error count */
233: 231 0000D804 6d effffffe22 incl _errcnt
234: 232 0000D80A # if( prt_error ) {
235: 233 0000D80A 5d effffffe1c tstl _prt_error
236: 234 0000D810 31 1b jeql L255
237: 235 0000D812 # print_addf_er_hdr();
238: 236 0000D812 fe 04 ef000006d3 callf $4,_print_addf_er_hdr
239: 237 0000D819 # writes(" (Cache Data) - BAD FINAL ACC\n");
240: 238 0000D819 .data 1
241: 239 00000a9c * L256:
242: 240 00000a9c * 2028436163686520446174612 .ascii " (Cache Data) - BAD FINAL ACC\12\0"
243: 9202D204241442046494E414C
244: 204143430A00
245: 241 00000abb * .text
246: 242 0000D819 dd 8f00000a9c pushl $L256
247: 243 0000D81F fe 08 effffffe06 callf $8,_writes
248: 244 0000D826 # print_addf_data();
249: 245 0000D826 fe 04 ef00000721 callf $4,_print_addf_data
250: 246 0000D82D # }
251: 247 0000D82D # if( halt_flg )
252: 248 0000D82D L255:
253: 249 0000D82D 5d effffffdf9 tstl _halt_flg
254: 250 0000D833 31 09 jeql L257
255: 251 0000D835 # addf_er_halt( BAD_ACC_HLT ); /* halt on the error */
256: 252 0000D835 dd 01 pushl $1
257: 253 0000D837 fe 08 ef000007ae callf $8,_addf_er_halt
258: 254 0000D83E # if( loop_on_err ) {
259: 255 0000D83E L257:
260: 256 0000D83E 5d effffffde8 tstl _loop_on_err
261: 257 0000D844 31 0a jeql L258
262: 258 0000D846 # force_loop = TRUE; /* set the force loop flag */
263: 259 0000D846 0d 01 effffffddf movl $1,_force_loop
264: 260 0000D84D # asm("brw _addf_2_lp1");; /* and loop on the error */
265: 261 0000D84D 13 ff8b brw _addf_2_lp1
266: 262 0000D850 # } /* end of loop on error */
267: 263 0000D850 # } /* end of compare error */
268: 264 0000D850 L258:
269: 265 0000D850 # } /* end of WHILE loop */
270: 266 0000D850 L254:
271: 267 0000D850 L250:
272: 268 0000D850 6d effffffdd6 incl _index
273: 269 0000D856 13 ff39 jbr L252
274: 270 0000D859 L251:
275: 271 0000D859 # } /* end of subtest 2 */
276: 272 0000D859 40 ret#2
277: 273 0000D85A .set L246,0x0
278: 274 0000D85A L248:
279: 275 0000D85A 13 ff22 jbr L249
280: 276 0000D85D .data
281: 277 00000a78 * .text
282: 278 0000D85D 00 .align 1
283: 279 0000D85E .globl _addf_3
284: 280 0000D85E _addf_3:
285: 281 0000D85E 0000 .word L259
286: 282 0000D860 #
287: 283 0000D860 #
288: 284 0000D860 #
289: 285 0000D860 # /************************************************************************
290: 286 0000D860 # *
291: 287 0000D860 # * SUBTEST 3 - Wait 3 NOPs before storing the results
292: 288 0000D860 # *
293: 289 0000D860 # ************************************************************************/
294: 290 0000D860 # addf_3()
295: 291 0000D860 # {
296: 292 0000D860 13 00df jbr L261
297: 293 0000D863 L262:
298: 294 0000D863 # force_loop = FALSE;
299: 295 0000D863 4d effffffdc3 clrl _force_loop
300: 296 0000D869 # subtest = 3;
301: 297 0000D869 0d 03 effffffdbc movl $3,_subtest
302: 298 0000D870 # for( index = 0; index < max_addf_1_index; index++ ) {
303: 299 0000D870 4d effffffdb6 clrl _index
304: 300 0000D876 L265:
305: 301 0000D876 1d effffffdb0 effffffdab cmpl _index,_max_addf_1_index
306: 302 0000D881 91 03 13 00bb jgeq L264
307: 303 0000D886 # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
308: 304 0000D886 5c 0c effffffd9f 50 mull3 $12,_index,r0
309: 305 0000D88E 0d e000000000 effffffd93 movl _addf_1_data(r0),_sgl_ld_acc
310: 306 0000D899 # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
311: 307 0000D899 5c 0c effffffd8c 50 mull3 $12,_index,r0
312: 308 0000D8A1 0d e000000004 effffffd80 movl _addf_1_data+4(r0),_sgl_value_1
313: 309 0000D8AC # sgl_expected = addf_1_data[index].exp; /* get expected result */
314: 310 0000D8AC 5c 0c effffffd79 50 mull3 $12,_index,r0
315: 311 0000D8B4 0d e000000008 effffffd6d movl _addf_1_data+8(r0),_sgl_expected
316: 312 0000D8BF # /*
317: 313 0000D8BF # * If LOOP ON ERROR is set, this is the loop for this subtest.
318: 314 0000D8BF # * The force loop flag is set after the first error.
319: 315 0000D8BF # */
320: 316 0000D8BF # asm("_addf_3_lp1:");
321: 317 0000D8BF _addf_3_lp1:
322: 318 0000D8BF # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
323: 319 0000D8BF 06 effffffd67 ldf _sgl_ld_acc
324: 320 0000D8C5 # asm("nop"); /* delay */
325: 321 0000D8C5 10 nop
326: 322 0000D8C6 # asm("addf _sgl_value_1"); /* add the 2nd operand */
327: 323 0000D8C6 c6 effffffd60 addf _sgl_value_1
328: 324 0000D8CC # asm("nop"); /* delay before ... */
329: 325 0000D8CC 10 nop
330: 326 0000D8CD # asm("nop");
331: 327 0000D8CD 10 nop
332: 328 0000D8CE # asm("nop"); /* ... storing the result */
333: 329 0000D8CE 10 nop
334: 330 0000D8CF # asm("stf _sgl_st_acc"); /* store the result */
335: 331 0000D8CF 26 effffffd57 stf _sgl_st_acc
336: 332 0000D8D5 # if( force_loop )
337: 333 0000D8D5 5d effffffd51 tstl _force_loop
338: 334 0000D8DB 31 02 jeql L266
339: 335 0000D8DD # asm("brb _addf_3_lp1");; /* loop on the error */
340: 336 0000D8DD 11 e0 brb _addf_3_lp1
341: 337 0000D8DF L266:
342: 338 0000D8DF # /*
343: 339 0000D8DF # * end error loop - test the results
344: 340 0000D8DF # */
345: 341 0000D8DF # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
346: 342 0000D8DF 1d effffffd47 effffffd42 cmpl _sgl_st_acc,_sgl_expected
347: 343 0000D8EA 31 4c jeql L267
348: 344 0000D8EC # errcnt++; /* bump the error count */
349: 345 0000D8EC 6d effffffd3a incl _errcnt
350: 346 0000D8F2 # if( prt_error ) {
351: 347 0000D8F2 5d effffffd34 tstl _prt_error
352: 348 0000D8F8 31 1b jeql L268
353: 349 0000D8FA # print_addf_er_hdr();
354: 350 0000D8FA fe 04 ef000005eb callf $4,_print_addf_er_hdr
355: 351 0000D901 # writes(" (Cache Data - 3 NOPS) - BAD FINAL ACC\n");
356: 352 0000D901 .data 1
357: 353 00000abb * L269:
358: 354 00000abb * 2028436163686520446174612 .ascii " (Cache Data - 3 NOPS) - BAD FINAL ACC\12\0"
359: 02D2033204E4F505329202D20
360: 4241442046494E414C2041434
361: 30A00
362: 355 00000ae3 * .text
363: 356 0000D901 dd 8f00000abb pushl $L269
364: 357 0000D907 fe 08 effffffd1e callf $8,_writes
365: 358 0000D90E # print_addf_data();
366: 359 0000D90E fe 04 ef00000639 callf $4,_print_addf_data
367: 360 0000D915 # }
368: 361 0000D915 # if( halt_flg )
369: 362 0000D915 L268:
370: 363 0000D915 5d effffffd11 tstl _halt_flg
371: 364 0000D91B 31 09 jeql L270
372: 365 0000D91D # addf_er_halt( BAD_ACC_HLT ); /* halt on the error */
373: 366 0000D91D dd 01 pushl $1
374: 367 0000D91F fe 08 ef000006c6 callf $8,_addf_er_halt
375: 368 0000D926 # if( loop_on_err ) {
376: 369 0000D926 L270:
377: 370 0000D926 5d effffffd00 tstl _loop_on_err
378: 371 0000D92C 31 0a jeql L271
379: 372 0000D92E # force_loop = TRUE; /* set the force loop flag */
380: 373 0000D92E 0d 01 effffffcf7 movl $1,_force_loop
381: 374 0000D935 # asm("brw _addf_3_lp1");; /* and loop on the error */
382: 375 0000D935 13 ff87 brw _addf_3_lp1
383: 376 0000D938 # } /* end of loop on error */
384: 377 0000D938 # } /* end of compare error */
385: 378 0000D938 L271:
386: 379 0000D938 # } /* end of WHILE loop */
387: 380 0000D938 L267:
388: 381 0000D938 L263:
389: 382 0000D938 6d effffffcee incl _index
390: 383 0000D93E 13 ff35 jbr L265
391: 384 0000D941 L264:
392: 385 0000D941 # } /* end of subtest 3 */
393: 386 0000D941 40 ret#2
394: 387 0000D942 .set L259,0x0
395: 388 0000D942 L261:
396: 389 0000D942 13 ff1e jbr L262
397: 390 0000D945 .data
398: 391 00000a78 * .text
399: 392 0000D945 00 .align 1
400: 393 0000D946 .globl _addf_4
401: 394 0000D946 _addf_4:
402: 395 0000D946 0000 .word L272
403: 396 0000D948 #
404: 397 0000D948 #
405: 398 0000D948 #
406: 399 0000D948 # /************************************************************************
407: 400 0000D948 # *
408: 401 0000D948 # * SUBTEST 4 - Wait 2 NOPs before storing the results
409: 402 0000D948 # *
410: 403 0000D948 # ************************************************************************/
411: 404 0000D948 # addf_4()
412: 405 0000D948 # {
413: 406 0000D948 13 00de jbr L274
414: 407 0000D94B L275:
415: 408 0000D94B # force_loop = FALSE;
416: 409 0000D94B 4d effffffcdb clrl _force_loop
417: 410 0000D951 # subtest = 4;
418: 411 0000D951 0d 04 effffffcd4 movl $4,_subtest
419: 412 0000D958 # for( index = 0; index < max_addf_1_index; index++ ) {
420: 413 0000D958 4d effffffcce clrl _index
421: 414 0000D95E L278:
422: 415 0000D95E 1d effffffcc8 effffffcc3 cmpl _index,_max_addf_1_index
423: 416 0000D969 91 03 13 00ba jgeq L277
424: 417 0000D96E # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
425: 418 0000D96E 5c 0c effffffcb7 50 mull3 $12,_index,r0
426: 419 0000D976 0d e000000000 effffffcab movl _addf_1_data(r0),_sgl_ld_acc
427: 420 0000D981 # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
428: 421 0000D981 5c 0c effffffca4 50 mull3 $12,_index,r0
429: 422 0000D989 0d e000000004 effffffc98 movl _addf_1_data+4(r0),_sgl_value_1
430: 423 0000D994 # sgl_expected = addf_1_data[index].exp; /* get expected result */
431: 424 0000D994 5c 0c effffffc91 50 mull3 $12,_index,r0
432: 425 0000D99C 0d e000000008 effffffc85 movl _addf_1_data+8(r0),_sgl_expected
433: 426 0000D9A7 # /*
434: 427 0000D9A7 # * If LOOP ON ERROR is set, this is the loop for this subtest.
435: 428 0000D9A7 # * The force loop flag is set after the first error.
436: 429 0000D9A7 # */
437: 430 0000D9A7 # asm("_addf_4_lp1:");
438: 431 0000D9A7 _addf_4_lp1:
439: 432 0000D9A7 # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
440: 433 0000D9A7 06 effffffc7f ldf _sgl_ld_acc
441: 434 0000D9AD # asm("nop"); /* delay */
442: 435 0000D9AD 10 nop
443: 436 0000D9AE # asm("addf _sgl_value_1"); /* add the 2nd operand */
444: 437 0000D9AE c6 effffffc78 addf _sgl_value_1
445: 438 0000D9B4 # asm("nop"); /* delay before ... */
446: 439 0000D9B4 10 nop
447: 440 0000D9B5 # asm("nop"); /* ... storing the result */
448: 441 0000D9B5 10 nop
449: 442 0000D9B6 # asm("stf _sgl_st_acc"); /* store the result */
450: 443 0000D9B6 26 effffffc70 stf _sgl_st_acc
451: 444 0000D9BC # if( force_loop )
452: 445 0000D9BC 5d effffffc6a tstl _force_loop
453: 446 0000D9C2 31 02 jeql L279
454: 447 0000D9C4 # asm("brb _addf_4_lp1");; /* loop on the error */
455: 448 0000D9C4 11 e1 brb _addf_4_lp1
456: 449 0000D9C6 L279:
457: 450 0000D9C6 # /*
458: 451 0000D9C6 # * end error loop - test the results
459: 452 0000D9C6 # */
460: 453 0000D9C6 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
461: 454 0000D9C6 1d effffffc60 effffffc5b cmpl _sgl_st_acc,_sgl_expected
462: 455 0000D9D1 31 4c jeql L280
463: 456 0000D9D3 # errcnt++; /* bump the error count */
464: 457 0000D9D3 6d effffffc53 incl _errcnt
465: 458 0000D9D9 # if( prt_error ) {
466: 459 0000D9D9 5d effffffc4d tstl _prt_error
467: 460 0000D9DF 31 1b jeql L281
468: 461 0000D9E1 # print_addf_er_hdr();
469: 462 0000D9E1 fe 04 ef00000504 callf $4,_print_addf_er_hdr
470: 463 0000D9E8 # writes(" (Cache Data - 2 NOPS) - BAD FINAL ACC\n");
471: 464 0000D9E8 .data 1
472: 465 00000ae3 * L282:
473: 466 00000ae3 * 2028436163686520446174612 .ascii " (Cache Data - 2 NOPS) - BAD FINAL ACC\12\0"
474: 02D2032204E4F505329202D20
475: 4241442046494E414C2041434
476: 30A00
477: 467 00000b0b * .text
478: 468 0000D9E8 dd 8f00000ae3 pushl $L282
479: 469 0000D9EE fe 08 effffffc37 callf $8,_writes
480: 470 0000D9F5 # print_addf_data();
481: 471 0000D9F5 fe 04 ef00000552 callf $4,_print_addf_data
482: 472 0000D9FC # }
483: 473 0000D9FC # if( halt_flg )
484: 474 0000D9FC L281:
485: 475 0000D9FC 5d effffffc2a tstl _halt_flg
486: 476 0000DA02 31 09 jeql L283
487: 477 0000DA04 # addf_er_halt( BAD_ACC_HLT ); /* halt on the error */
488: 478 0000DA04 dd 01 pushl $1
489: 479 0000DA06 fe 08 ef000005df callf $8,_addf_er_halt
490: 480 0000DA0D # if( loop_on_err ) {
491: 481 0000DA0D L283:
492: 482 0000DA0D 5d effffffc19 tstl _loop_on_err
493: 483 0000DA13 31 0a jeql L284
494: 484 0000DA15 # force_loop = TRUE; /* set the force loop flag */
495: 485 0000DA15 0d 01 effffffc10 movl $1,_force_loop
496: 486 0000DA1C # asm("brw _addf_4_lp1");; /* and loop on the error */
497: 487 0000DA1C 13 ff88 brw _addf_4_lp1
498: 488 0000DA1F # } /* end of loop on error */
499: 489 0000DA1F # } /* end of compare error */
500: 490 0000DA1F L284:
501: 491 0000DA1F # } /* end of WHILE loop */
502: 492 0000DA1F L280:
503: 493 0000DA1F L276:
504: 494 0000DA1F 6d effffffc07 incl _index
505: 495 0000DA25 13 ff36 jbr L278
506: 496 0000DA28 L277:
507: 497 0000DA28 # } /* end of subtest 4 */
508: 498 0000DA28 40 ret#2
509: 499 0000DA29 .set L272,0x0
510: 500 0000DA29 L274:
511: 501 0000DA29 13 ff1f jbr L275
512: 502 0000DA2C .data
513: 503 00000a78 * .text
514: 504 0000DA2C .align 1
515: 505 0000DA2C .globl _addf_5
516: 506 0000DA2C _addf_5:
517: 507 0000DA2C 0000 .word L285
518: 508 0000DA2E #
519: 509 0000DA2E #
520: 510 0000DA2E #
521: 511 0000DA2E # /************************************************************************
522: 512 0000DA2E # *
523: 513 0000DA2E # * SUBTEST 5 - Wait 1 NOP before storing the results
524: 514 0000DA2E # *
525: 515 0000DA2E # ************************************************************************/
526: 516 0000DA2E # addf_5()
527: 517 0000DA2E # {
528: 518 0000DA2E 13 00dd jbr L287
529: 519 0000DA31 L288:
530: 520 0000DA31 # force_loop = FALSE;
531: 521 0000DA31 4d effffffbf5 clrl _force_loop
532: 522 0000DA37 # subtest = 5;
533: 523 0000DA37 0d 05 effffffbee movl $5,_subtest
534: 524 0000DA3E # for( index = 0; index < max_addf_1_index; index++ ) {
535: 525 0000DA3E 4d effffffbe8 clrl _index
536: 526 0000DA44 L291:
537: 527 0000DA44 1d effffffbe2 effffffbdd cmpl _index,_max_addf_1_index
538: 528 0000DA4F 91 03 13 00b9 jgeq L290
539: 529 0000DA54 # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
540: 530 0000DA54 5c 0c effffffbd1 50 mull3 $12,_index,r0
541: 531 0000DA5C 0d e000000000 effffffbc5 movl _addf_1_data(r0),_sgl_ld_acc
542: 532 0000DA67 # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
543: 533 0000DA67 5c 0c effffffbbe 50 mull3 $12,_index,r0
544: 534 0000DA6F 0d e000000004 effffffbb2 movl _addf_1_data+4(r0),_sgl_value_1
545: 535 0000DA7A # sgl_expected = addf_1_data[index].exp; /* get expected result */
546: 536 0000DA7A 5c 0c effffffbab 50 mull3 $12,_index,r0
547: 537 0000DA82 0d e000000008 effffffb9f movl _addf_1_data+8(r0),_sgl_expected
548: 538 0000DA8D # /*
549: 539 0000DA8D # * If LOOP ON ERROR is set, this is the loop for this subtest.
550: 540 0000DA8D # * The force loop flag is set after the first error.
551: 541 0000DA8D # */
552: 542 0000DA8D # asm("_addf_5_lp1:");
553: 543 0000DA8D _addf_5_lp1:
554: 544 0000DA8D # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
555: 545 0000DA8D 06 effffffb99 ldf _sgl_ld_acc
556: 546 0000DA93 # asm("nop"); /* delay */
557: 547 0000DA93 10 nop
558: 548 0000DA94 # asm("addf _sgl_value_1"); /* add the 2nd operand */
559: 549 0000DA94 c6 effffffb92 addf _sgl_value_1
560: 550 0000DA9A # asm("nop"); /* delay before storing */
561: 551 0000DA9A 10 nop
562: 552 0000DA9B # asm("stf _sgl_st_acc"); /* store the result */
563: 553 0000DA9B 26 effffffb8b stf _sgl_st_acc
564: 554 0000DAA1 # if( force_loop )
565: 555 0000DAA1 5d effffffb85 tstl _force_loop
566: 556 0000DAA7 31 02 jeql L292
567: 557 0000DAA9 # asm("brb _addf_5_lp1");; /* loop on the error */
568: 558 0000DAA9 11 e2 brb _addf_5_lp1
569: 559 0000DAAB L292:
570: 560 0000DAAB # /*
571: 561 0000DAAB # * end error loop - test the results
572: 562 0000DAAB # */
573: 563 0000DAAB # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
574: 564 0000DAAB 1d effffffb7b effffffb76 cmpl _sgl_st_acc,_sgl_expected
575: 565 0000DAB6 31 4c jeql L293
576: 566 0000DAB8 # errcnt++; /* bump the error count */
577: 567 0000DAB8 6d effffffb6e incl _errcnt
578: 568 0000DABE # if( prt_error ) {
579: 569 0000DABE 5d effffffb68 tstl _prt_error
580: 570 0000DAC4 31 1b jeql L294
581: 571 0000DAC6 # print_addf_er_hdr();
582: 572 0000DAC6 fe 04 ef0000041f callf $4,_print_addf_er_hdr
583: 573 0000DACD # writes(" (Cache Data - 1 NOP) - BAD FINAL ACC\n");
584: 574 0000DACD .data 1
585: 575 00000b0b * L295:
586: 576 00000b0b * 2028436163686520446174612 .ascii " (Cache Data - 1 NOP) - BAD FINAL ACC\12\0"
587: 02D2031204E4F5029202D2042
588: 41442046494E414C204143430
589: A00
590: 577 00000b32 * .text
591: 578 0000DACD dd 8f00000b0b pushl $L295
592: 579 0000DAD3 fe 08 effffffb52 callf $8,_writes
593: 580 0000DADA # print_addf_data();
594: 581 0000DADA fe 04 ef0000046d callf $4,_print_addf_data
595: 582 0000DAE1 # }
596: 583 0000DAE1 # if( halt_flg )
597: 584 0000DAE1 L294:
598: 585 0000DAE1 5d effffffb45 tstl _halt_flg
599: 586 0000DAE7 31 09 jeql L296
600: 587 0000DAE9 # addf_er_halt( BAD_ACC_HLT ); /* halt on the error */
601: 588 0000DAE9 dd 01 pushl $1
602: 589 0000DAEB fe 08 ef000004fa callf $8,_addf_er_halt
603: 590 0000DAF2 # if( loop_on_err ) {
604: 591 0000DAF2 L296:
605: 592 0000DAF2 5d effffffb34 tstl _loop_on_err
606: 593 0000DAF8 31 0a jeql L297
607: 594 0000DAFA # force_loop = TRUE; /* set the force loop flag */
608: 595 0000DAFA 0d 01 effffffb2b movl $1,_force_loop
609: 596 0000DB01 # asm("brw _addf_5_lp1");; /* and loop on the error */
610: 597 0000DB01 13 ff89 brw _addf_5_lp1
611: 598 0000DB04 # } /* end of loop on error */
612: 599 0000DB04 # } /* end of compare error */
613: 600 0000DB04 L297:
614: 601 0000DB04 # } /* end of WHILE loop */
615: 602 0000DB04 L293:
616: 603 0000DB04 L289:
617: 604 0000DB04 6d effffffb22 incl _index
618: 605 0000DB0A 13 ff37 jbr L291
619: 606 0000DB0D L290:
620: 607 0000DB0D # } /* end of subtest 5 */
621: 608 0000DB0D 40 ret#2
622: 609 0000DB0E .set L285,0x0
623: 610 0000DB0E L287:
624: 611 0000DB0E 13 ff20 jbr L288
625: 612 0000DB11 .data
626: 613 00000a78 * .text
627: 614 0000DB11 00 .align 1
628: 615 0000DB12 .globl _addf_6
629: 616 0000DB12 _addf_6:
630: 617 0000DB12 0000 .word L298
631: 618 0000DB14 #
632: 619 0000DB14 #
633: 620 0000DB14 #
634: 621 0000DB14 # /************************************************************************
635: 622 0000DB14 # *
636: 623 0000DB14 # * SUBTEST 6 - Check for register corruption
637: 624 0000DB14 # *
638: 625 0000DB14 # ************************************************************************/
639: 626 0000DB14 # addf_6()
640: 627 0000DB14 # {
641: 628 0000DB14 13 016d jbr L300
642: 629 0000DB17 L301:
643: 630 0000DB17 # force_loop = FALSE; /* clear force_loop flg */
644: 631 0000DB17 4d effffffb0f clrl _force_loop
645: 632 0000DB1D # subtest = 6;
646: 633 0000DB1D 0d 06 effffffb08 movl $6,_subtest
647: 634 0000DB24 # fill_reg_buf( load_regs ); /* get patterns for regs */
648: 635 0000DB24 dd 8f00000000 pushl $_load_regs
649: 636 0000DB2A fe 08 effffffafb callf $8,_fill_reg_buf
650: 637 0000DB31 # index = 0;
651: 638 0000DB31 4d effffffaf5 clrl _index
652: 639 0000DB37 # sgl_ld_acc = addf_1_data[0].op_1; /* get operand 1 */
653: 640 0000DB37 0d effffffaef effffffaea movl _addf_1_data,_sgl_ld_acc
654: 641 0000DB42 # sgl_value_1 = addf_1_data[0].op_2; /* get operand 2 */
655: 642 0000DB42 0d effffffae8 effffffadf movl _addf_1_data+4,_sgl_value_1
656: 643 0000DB4D # sgl_expected = addf_1_data[0].exp; /* get expected result */
657: 644 0000DB4D 0d effffffae1 effffffad4 movl _addf_1_data+8,_sgl_expected
658: 645 0000DB58 # /*
659: 646 0000DB58 # * If LOOP ON ERROR is set, this is the loop for this subtest.
660: 647 0000DB58 # * The force loop flag is set after the first error.
661: 648 0000DB58 # */
662: 649 0000DB58 # asm("_addf_6_lp1:");
663: 650 0000DB58 _addf_6_lp1:
664: 651 0000DB58 # asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */
665: 652 0000DB58 06 efffffface ldf _sgl_ld_acc
666: 653 0000DB5E # asm("nop");
667: 654 0000DB5E 10 nop
668: 655 0000DB5F # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
669: 656 0000DB5F ab 891fff effffffac4 loadr $0x1fff,_load_regs
670: 657 0000DB68 # asm("nop");
671: 658 0000DB68 10 nop
672: 659 0000DB69 # asm("addf _sgl_value_1"); /* do the add */
673: 660 0000DB69 c6 effffffabd addf _sgl_value_1
674: 661 0000DB6F # asm("nop");
675: 662 0000DB6F 10 nop
676: 663 0000DB70 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
677: 664 0000DB70 bb 891fff effffffab3 storer $0x1fff,_store_regs
678: 665 0000DB79 # asm("stf _sgl_st_acc"); /* save the accumulator */
679: 666 0000DB79 26 effffffaad stf _sgl_st_acc
680: 667 0000DB7F # if( force_loop )
681: 668 0000DB7F 5d effffffaa7 tstl _force_loop
682: 669 0000DB85 31 02 jeql L303
683: 670 0000DB87 # asm("brb _addf_6_lp1");; /* loop on the error */
684: 671 0000DB87 11 cf brb _addf_6_lp1
685: 672 0000DB89 L303:
686: 673 0000DB89 # /*
687: 674 0000DB89 # * Now compare the stored register values to those that were loaded
688: 675 0000DB89 # */
689: 676 0000DB89 # index2 = 0;
690: 677 0000DB89 4d effffffa9d clrl _index2
691: 678 0000DB8F # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
692: 679 0000DB8F L304:
693: 680 0000DB8F 0d effffffa97 50 movl _index2,r0
694: 681 0000DB96 0d effffffa90 51 movl _index2,r1
695: 682 0000DB9D 1d 40effffffa88 cmpl _load_regs[r0],_store_regs[r1]
696: 41effffffa82
697: 683 0000DBAA 21 11 jneq L305
698: 684 0000DBAC 1d effffffa7a 0d cmpl _index2,$13
699: 685 0000DBB3 81 08 jgeq L305
700: 686 0000DBB5 # index2++; /* check reg values */
701: 687 0000DBB5 6d effffffa71 incl _index2
702: 688 0000DBBB 11 d2 jbr L304
703: 689 0000DBBD L305:
704: 690 0000DBBD # if( index2 < 13 ) { /* error if index2 < 13 */
705: 691 0000DBBD 1d effffffa69 0d cmpl _index2,$13
706: 692 0000DBC4 91 03 13 00ba jgeq L306
707: 693 0000DBC9 # errcnt++; /* bump the error count */
708: 694 0000DBC9 6d effffffa5d incl _errcnt
709: 695 0000DBCF # if( prt_error ) {
710: 696 0000DBCF 5d effffffa57 tstl _prt_error
711: 697 0000DBD5 21 03 13 0086 jeql L307
712: 698 0000DBDA # print_addf_er_hdr();
713: 699 0000DBDA fe 04 ef0000030b callf $4,_print_addf_er_hdr
714: 700 0000DBE1 # writes(" - A REGISTER WAS MODIFIED\n");
715: 701 0000DBE1 .data 1
716: 702 00000b32 * L308:
717: 703 00000b32 * 202D204120524547495354455 .ascii " - A REGISTER WAS MODIFIED\12\0"
718: 220574153204D4F4449464945
719: 440A00
720: 704 00000b4e * .text
721: 705 0000DBE1 dd 8f00000b32 pushl $L308
722: 706 0000DBE7 fe 08 effffffa3e callf $8,_writes
723: 707 0000DBEE # print_addf_data();
724: 708 0000DBEE fe 04 ef00000359 callf $4,_print_addf_data
725: 709 0000DBF5 # writes("register "); /* print the information */
726: 710 0000DBF5 .data 1
727: 711 00000b4e * L309:
728: 712 00000b4e * 72656769737465722000 .ascii "register \0"
729: 713 00000b58 * .text
730: 714 0000DBF5 dd 8f00000b4e pushl $L309
731: 715 0000DBFB fe 08 effffffa2a callf $8,_writes
732: 716 0000DC02 # writed( index2 ); /* about the corrupted */
733: 717 0000DC02 dd effffffa24 pushl _index2
734: 718 0000DC08 fe 08 effffffa1d callf $8,_writed
735: 719 0000DC0F # writes(" = "); /* register */
736: 720 0000DC0F .data 1
737: 721 00000b58 * L311:
738: 722 00000b58 * 203D2000 .ascii " = \0"
739: 723 00000b5c * .text
740: 724 0000DC0F dd 8f00000b58 pushl $L311
741: 725 0000DC15 fe 08 effffffa10 callf $8,_writes
742: 726 0000DC1C # write32h( store_regs[index2] );
743: 727 0000DC1C 0d effffffa0a 50 movl _index2,r0
744: 728 0000DC23 dd 40effffffa02 pushl _store_regs[r0]
745: 729 0000DC2A fe 08 effffff9fb callf $8,_write32h
746: 730 0000DC31 # writes(", should be = ");
747: 731 0000DC31 .data 1
748: 732 00000b5c * L313:
749: 733 00000b5c * 2C202073686F756C642062652 .ascii ", should be = \0"
750: 03D2000
751: 734 00000b6c * .text
752: 735 0000DC31 dd 8f00000b5c pushl $L313
753: 736 0000DC37 fe 08 effffff9ee callf $8,_writes
754: 737 0000DC3E # write32h( load_regs[index2] );
755: 738 0000DC3E 0d effffff9e8 50 movl _index2,r0
756: 739 0000DC45 dd 40effffff9e0 pushl _load_regs[r0]
757: 740 0000DC4C fe 08 effffff9d9 callf $8,_write32h
758: 741 0000DC53 # writes("\n");
759: 742 0000DC53 .data 1
760: 743 00000b6c * L314:
761: 744 00000b6c * 0A00 .ascii "\12\0"
762: 745 00000b6e * .text
763: 746 0000DC53 dd 8f00000b6c pushl $L314
764: 747 0000DC59 fe 08 effffff9cc callf $8,_writes
765: 748 0000DC60 # }
766: 749 0000DC60 # if( halt_flg )
767: 750 0000DC60 L307:
768: 751 0000DC60 5d effffff9c6 tstl _halt_flg
769: 752 0000DC66 31 09 jeql L315
770: 753 0000DC68 # addf_er_halt( BAD_REG_HLT ); /* halt on the error */
771: 754 0000DC68 dd 02 pushl $2
772: 755 0000DC6A fe 08 ef0000037b callf $8,_addf_er_halt
773: 756 0000DC71 # if( loop_on_err ) {
774: 757 0000DC71 L315:
775: 758 0000DC71 5d effffff9b5 tstl _loop_on_err
776: 759 0000DC77 31 0a jeql L316
777: 760 0000DC79 # force_loop = TRUE; /* set the force loop flag */
778: 761 0000DC79 0d 01 effffff9ac movl $1,_force_loop
779: 762 0000DC80 # asm("brw _addf_6_lp1");; /* and loop on the error */
780: 763 0000DC80 13 fed5 brw _addf_6_lp1
781: 764 0000DC83 # } /* end of loop on error */
782: 765 0000DC83 # } /* end of register corruption error */
783: 766 0000DC83 L316:
784: 767 0000DC83 # } /* end of subtest 6 */
785: 768 0000DC83 L306:
786: 769 0000DC83 40 ret#2
787: 770 0000DC84 .set L298,0x0
788: 771 0000DC84 L300:
789: 772 0000DC84 13 fe90 jbr L301
790: 773 0000DC87 .data
791: 774 00000a78 * .text
792: 775 0000DC87 00 .align 1
793: 776 0000DC88 .globl _addf_7
794: 777 0000DC88 _addf_7:
795: 778 0000DC88 0000 .word L317
796: 779 0000DC8A #
797: 780 0000DC8A #
798: 781 0000DC8A #
799: 782 0000DC8A # /************************************************************************
800: 783 0000DC8A # *
801: 784 0000DC8A # * SUBTEST 7 - Check for PSL corruption
802: 785 0000DC8A # *
803: 786 0000DC8A # ************************************************************************/
804: 787 0000DC8A # addf_7()
805: 788 0000DC8A # {
806: 789 0000DC8A 13 0174 jbr L319
807: 790 0000DC8D L320:
808: 791 0000DC8D # force_loop = FALSE; /* clear force_loop flg */
809: 792 0000DC8D 4d effffff999 clrl _force_loop
810: 793 0000DC93 # subtest = 7;
811: 794 0000DC93 0d 07 effffff992 movl $7,_subtest
812: 795 0000DC9A # fill_reg_buf( load_regs ); /* get patterns for regs */
813: 796 0000DC9A dd 8f00000000 pushl $_load_regs
814: 797 0000DCA0 fe 08 effffff985 callf $8,_fill_reg_buf
815: 798 0000DCA7 # for( index = 0; index < 3; index++ ) {
816: 799 0000DCA7 4d effffff97f clrl _index
817: 800 0000DCAD L323:
818: 801 0000DCAD 1d effffff979 03 cmpl _index,$3
819: 802 0000DCB4 91 03 13 0147 jgeq L322
820: 803 0000DCB9 # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
821: 804 0000DCB9 5c 0c effffff96c 50 mull3 $12,_index,r0
822: 805 0000DCC1 0d e000000000 effffff960 movl _addf_1_data(r0),_sgl_ld_acc
823: 806 0000DCCC # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
824: 807 0000DCCC 5c 0c effffff959 50 mull3 $12,_index,r0
825: 808 0000DCD4 0d e000000004 effffff94d movl _addf_1_data+4(r0),_sgl_value_1
826: 809 0000DCDF # sgl_expected = addf_1_data[index].exp; /* get expected */
827: 810 0000DCDF 5c 0c effffff946 50 mull3 $12,_index,r0
828: 811 0000DCE7 0d e000000008 effffff93a movl _addf_1_data+8(r0),_sgl_expected
829: 812 0000DCF2 # sgl_dummy1 = status_array[index]; /* status = +, -, 0 */
830: 813 0000DCF2 0d effffff934 50 movl _index,r0
831: 814 0000DCF9 0d 40effffff92c movl _status_array[r0],_sgl_dummy1
832: effffff927
833: 815 0000DD05 # /*
834: 816 0000DD05 # * If LOOP ON ERROR is set, this is the loop for this subtest.
835: 817 0000DD05 # * The force loop flag is set after the first error.
836: 818 0000DD05 # */
837: 819 0000DD05 # asm("_addf_7_lp1:");
838: 820 0000DD05 _addf_7_lp1:
839: 821 0000DD05 # asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */
840: 822 0000DD05 06 effffff921 ldf _sgl_ld_acc
841: 823 0000DD0B # asm("nop");
842: 824 0000DD0B 10 nop
843: 825 0000DD0C # asm("tstl _sgl_dummy1"); /* set the PSL status */
844: 826 0000DD0C 5d effffff91a tstl _sgl_dummy1
845: 827 0000DD12 # asm("movpsl _init_psl"); /* save the initial PSL */
846: 828 0000DD12 cd effffff914 movpsl _init_psl
847: 829 0000DD18 # asm("addf _sgl_value_1"); /* do the add */
848: 830 0000DD18 c6 effffff90e addf _sgl_value_1
849: 831 0000DD1E # asm("nop");
850: 832 0000DD1E 10 nop
851: 833 0000DD1F # asm("movpsl _psl_val"); /* save the final PSL */
852: 834 0000DD1F cd effffff907 movpsl _psl_val
853: 835 0000DD25 # asm("stf _sgl_st_acc"); /* save the accumulator */
854: 836 0000DD25 26 effffff901 stf _sgl_st_acc
855: 837 0000DD2B # if( force_loop )
856: 838 0000DD2B 5d effffff8fb tstl _force_loop
857: 839 0000DD31 31 02 jeql L324
858: 840 0000DD33 # asm("brb _addf_7_lp1");; /* loop on the error */
859: 841 0000DD33 11 d0 brb _addf_7_lp1
860: 842 0000DD35 L324:
861: 843 0000DD35 # /*
862: 844 0000DD35 # * Now compare the final PSL to the initial PSL -they should be the same
863: 845 0000DD35 # */
864: 846 0000DD35 # exp_psl = init_psl;
865: 847 0000DD35 0d effffff8f1 effffff8ec movl _init_psl,_exp_psl
866: 848 0000DD40 # if( psl_val != exp_psl ) {
867: 849 0000DD40 1d effffff8e6 effffff8e1 cmpl _psl_val,_exp_psl
868: 850 0000DD4B 21 03 13 00a7 jeql L325
869: 851 0000DD50 # errcnt++; /* bump the error count */
870: 852 0000DD50 6d effffff8d6 incl _errcnt
871: 853 0000DD56 # if( prt_error ) {
872: 854 0000DD56 5d effffff8d0 tstl _prt_error
873: 855 0000DD5C 31 76 jeql L326
874: 856 0000DD5E # print_addf_er_hdr();
875: 857 0000DD5E fe 04 ef00000187 callf $4,_print_addf_er_hdr
876: 858 0000DD65 # writes(" - INCORRECT FINAL PSL\n");
877: 859 0000DD65 .data 1
878: 860 00000b6e * L327:
879: 861 00000b6e * 202D20494E434F52524543542 .ascii " - INCORRECT FINAL PSL\12\0"
880: 046494E414C2050534C0A00
881: 862 00000b86 * .text
882: 863 0000DD65 dd 8f00000b6e pushl $L327
883: 864 0000DD6B fe 08 effffff8ba callf $8,_writes
884: 865 0000DD72 # print_addf_data();
885: 866 0000DD72 fe 04 ef000001d5 callf $4,_print_addf_data
886: 867 0000DD79 # writes("initial PSL = ");
887: 868 0000DD79 .data 1
888: 869 00000b86 * L328:
889: 870 00000b86 * 696E697469616C2050534C203 .ascii "initial PSL = \0"
890: D2000
891: 871 00000b95 * .text
892: 872 0000DD79 dd 8f00000b86 pushl $L328
893: 873 0000DD7F fe 08 effffff8a6 callf $8,_writes
894: 874 0000DD86 # write32h( init_psl );
895: 875 0000DD86 dd effffff8a0 pushl _init_psl
896: 876 0000DD8C fe 08 effffff899 callf $8,_write32h
897: 877 0000DD93 # writes(", final PSL = ");
898: 878 0000DD93 .data 1
899: 879 00000b95 * L329:
900: 880 00000b95 * 2C2066696E616C2050534C203 .ascii ", final PSL = \0"
901: D2000
902: 881 00000ba4 * .text
903: 882 0000DD93 dd 8f00000b95 pushl $L329
904: 883 0000DD99 fe 08 effffff88c callf $8,_writes
905: 884 0000DDA0 # write32h( psl_val );
906: 885 0000DDA0 dd effffff886 pushl _psl_val
907: 886 0000DDA6 fe 08 effffff87f callf $8,_write32h
908: 887 0000DDAD # writes(", expected PSL = ");
909: 888 0000DDAD .data 1
910: 889 00000ba4 * L330:
911: 890 00000ba4 * 2C20657870656374656420505 .ascii ", expected PSL = \0"
912: 34C203D2000
913: 891 00000bb6 * .text
914: 892 0000DDAD dd 8f00000ba4 pushl $L330
915: 893 0000DDB3 fe 08 effffff872 callf $8,_writes
916: 894 0000DDBA # write32h( exp_psl );
917: 895 0000DDBA dd effffff86c pushl _exp_psl
918: 896 0000DDC0 fe 08 effffff865 callf $8,_write32h
919: 897 0000DDC7 # writes("\n");
920: 898 0000DDC7 .data 1
921: 899 00000bb6 * L331:
922: 900 00000bb6 * 0A00 .ascii "\12\0"
923: 901 00000bb8 * .text
924: 902 0000DDC7 dd 8f00000bb6 pushl $L331
925: 903 0000DDCD fe 08 effffff858 callf $8,_writes
926: 904 0000DDD4 # }
927: 905 0000DDD4 # if( halt_flg )
928: 906 0000DDD4 L326:
929: 907 0000DDD4 5d effffff852 tstl _halt_flg
930: 908 0000DDDA 31 09 jeql L332
931: 909 0000DDDC # addf_er_halt( BAD_PSL_HLT ); /* halt on the error */
932: 910 0000DDDC dd 03 pushl $3
933: 911 0000DDDE fe 08 ef00000207 callf $8,_addf_er_halt
934: 912 0000DDE5 # if( loop_on_err ) {
935: 913 0000DDE5 L332:
936: 914 0000DDE5 5d effffff841 tstl _loop_on_err
937: 915 0000DDEB 31 0a jeql L333
938: 916 0000DDED # force_loop = TRUE; /* set the force loop flag */
939: 917 0000DDED 0d 01 effffff838 movl $1,_force_loop
940: 918 0000DDF4 # asm("brw _addf_7_lp1");; /* and loop on the error */
941: 919 0000DDF4 13 ff0e brw _addf_7_lp1
942: 920 0000DDF7 # } /* end of loop on error */
943: 921 0000DDF7 # } /* end of PSL corruption error */
944: 922 0000DDF7 L333:
945: 923 0000DDF7 # } /* end of data WHILE loop */
946: 924 0000DDF7 L325:
947: 925 0000DDF7 L321:
948: 926 0000DDF7 6d effffff82f incl _index
949: 927 0000DDFD 13 fead jbr L323
950: 928 0000DE00 L322:
951: 929 0000DE00 # } /* end of subtest 7 */
952: 930 0000DE00 40 ret#2
953: 931 0000DE01 .set L317,0x0
954: 932 0000DE01 L319:
955: 933 0000DE01 13 fe89 jbr L320
956: 934 0000DE04 .data
957: 935 00000a78 * .text
958: 936 0000DE04 .align 1
959: 937 0000DE04 .globl _addf_8
960: 938 0000DE04 _addf_8:
961: 939 0000DE04 0000 .word L334
962: 940 0000DE06 #
963: 941 0000DE06 #
964: 942 0000DE06 #
965: 943 0000DE06 # /************************************************************************
966: 944 0000DE06 # *
967: 945 0000DE06 # * SUBTEST 8 - pipelined entry test
968: 946 0000DE06 # *
969: 947 0000DE06 # ************************************************************************/
970: 948 0000DE06 # addf_8()
971: 949 0000DE06 # {
972: 950 0000DE06 13 00e0 jbr L336
973: 951 0000DE09 L337:
974: 952 0000DE09 # force_loop = FALSE;
975: 953 0000DE09 4d effffff81d clrl _force_loop
976: 954 0000DE0F # subtest = 8;
977: 955 0000DE0F 0d 08 effffff816 movl $8,_subtest
978: 956 0000DE16 # for( index = 0; index < max_addf_1_index; index++ ) {
979: 957 0000DE16 4d effffff810 clrl _index
980: 958 0000DE1C L340:
981: 959 0000DE1C 1d effffff80a effffff805 cmpl _index,_max_addf_1_index
982: 960 0000DE27 91 03 13 00bc jgeq L339
983: 961 0000DE2C # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
984: 962 0000DE2C 5c 0c effffff7f9 50 mull3 $12,_index,r0
985: 963 0000DE34 0d e000000000 effffff7ed movl _addf_1_data(r0),_sgl_ld_acc
986: 964 0000DE3F # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
987: 965 0000DE3F 5c 0c effffff7e6 50 mull3 $12,_index,r0
988: 966 0000DE47 0d e000000004 effffff7da movl _addf_1_data+4(r0),_sgl_value_1
989: 967 0000DE52 # sgl_expected = addf_1_data[index].exp; /* get expected result */
990: 968 0000DE52 5c 0c effffff7d3 50 mull3 $12,_index,r0
991: 969 0000DE5A 0d e000000008 effffff7c7 movl _addf_1_data+8(r0),_sgl_expected
992: 970 0000DE65 # /*
993: 971 0000DE65 # * If LOOP ON ERROR is set, this is the loop for this subtest.
994: 972 0000DE65 # * The force loop flag is set after the first error.
995: 973 0000DE65 # */
996: 974 0000DE65 # asm("_addf_8_lp1:");
997: 975 0000DE65 _addf_8_lp1:
998: 976 0000DE65 # asm("movl $0,r0"); /* clear r0 */
999: 977 0000DE65 0d 00 50 movl $0,r0
1000: 978 0000DE68 # asm("ldf r0"); /* load the Acc. with 0.0 */
1001: 979 0000DE68 06 50 ldf r0
1002: 980 0000DE6A # asm("addf _sgl_ld_acc"); /* add the 1st operand */
1003: 981 0000DE6A c6 effffff7bc addf _sgl_ld_acc
1004: 982 0000DE70 # asm("addf _sgl_value_1"); /* add the 2nd operand */
1005: 983 0000DE70 c6 effffff7b6 addf _sgl_value_1
1006: 984 0000DE76 # asm("stf _sgl_st_acc"); /* store the result */
1007: 985 0000DE76 26 effffff7b0 stf _sgl_st_acc
1008: 986 0000DE7C # if( force_loop )
1009: 987 0000DE7C 5d effffff7aa tstl _force_loop
1010: 988 0000DE82 31 02 jeql L341
1011: 989 0000DE84 # asm("brb _addf_8_lp1");; /* loop on the error */
1012: 990 0000DE84 11 df brb _addf_8_lp1
1013: 991 0000DE86 L341:
1014: 992 0000DE86 # /*
1015: 993 0000DE86 # * end error loop - test the results
1016: 994 0000DE86 # */
1017: 995 0000DE86 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
1018: 996 0000DE86 1d effffff7a0 effffff79b cmpl _sgl_st_acc,_sgl_expected
1019: 997 0000DE91 31 4c jeql L342
1020: 998 0000DE93 # errcnt++; /* bump the error count */
1021: 999 0000DE93 6d effffff793 incl _errcnt
1022: 1000 0000DE99 # if( prt_error ) {
1023: 1001 0000DE99 5d effffff78d tstl _prt_error
1024: 1002 0000DE9F 31 1b jeql L343
1025: 1003 0000DEA1 # print_addf_er_hdr();
1026: 1004 0000DEA1 fe 04 ef00000044 callf $4,_print_addf_er_hdr
1027: 1005 0000DEA8 # writes(" (Piped Entry) - BAD FINAL ACC\n");
1028: 1006 0000DEA8 .data 1
1029: 1007 00000bb8 * L344:
1030: 1008 00000bb8 * 2028506970656420456E74727 .ascii " (Piped Entry) - BAD FINAL ACC\12\0"
1031: 929202D204241442046494E41
1032: 4C204143430A00
1033: 1009 00000bd8 * .text
1034: 1010 0000DEA8 dd 8f00000bb8 pushl $L344
1035: 1011 0000DEAE fe 08 effffff777 callf $8,_writes
1036: 1012 0000DEB5 # print_addf_data();
1037: 1013 0000DEB5 fe 04 ef00000092 callf $4,_print_addf_data
1038: 1014 0000DEBC # }
1039: 1015 0000DEBC # if( halt_flg )
1040: 1016 0000DEBC L343:
1041: 1017 0000DEBC 5d effffff76a tstl _halt_flg
1042: 1018 0000DEC2 31 09 jeql L345
1043: 1019 0000DEC4 # addf_er_halt( BAD_ACC_HLT ); /* halt on the error */
1044: 1020 0000DEC4 dd 01 pushl $1
1045: 1021 0000DEC6 fe 08 ef0000011f callf $8,_addf_er_halt
1046: 1022 0000DECD # if( loop_on_err ) {
1047: 1023 0000DECD L345:
1048: 1024 0000DECD 5d effffff759 tstl _loop_on_err
1049: 1025 0000DED3 31 0a jeql L346
1050: 1026 0000DED5 # force_loop = TRUE; /* set the force loop flag */
1051: 1027 0000DED5 0d 01 effffff750 movl $1,_force_loop
1052: 1028 0000DEDC # asm("brw _addf_8_lp1"); /* and loop on the error */
1053: 1029 0000DEDC 13 ff86 brw _addf_8_lp1
1054: 1030 0000DEDF # } /* end of loop on error */
1055: 1031 0000DEDF # } /* end of compare error */
1056: 1032 0000DEDF L346:
1057: 1033 0000DEDF # } /* end of data While loop */
1058: 1034 0000DEDF L342:
1059: 1035 0000DEDF L338:
1060: 1036 0000DEDF 6d effffff747 incl _index
1061: 1037 0000DEE5 13 ff34 jbr L340
1062: 1038 0000DEE8 L339:
1063: 1039 0000DEE8 # } /* end of subtest 8 */
1064: 1040 0000DEE8 40 ret#2
1065: 1041 0000DEE9 .set L334,0x0
1066: 1042 0000DEE9 L336:
1067: 1043 0000DEE9 13 ff1d jbr L337
1068: 1044 0000DEEC .data
1069: 1045 00000a78 * .text
1070: 1046 0000DEEC .align 1
1071: 1047 0000DEEC .globl _print_addf_er_hdr
1072: 1048 0000DEEC _print_addf_er_hdr:
1073: 1049 0000DEEC 0000 .word L347
1074: 1050 0000DEEE #
1075: 1051 0000DEEE #
1076: 1052 0000DEEE #
1077: 1053 0000DEEE # /**************************************************************************
1078: 1054 0000DEEE # *
1079: 1055 0000DEEE # * PRINT THE ERROR HEADER
1080: 1056 0000DEEE # *
1081: 1057 0000DEEE # **************************************************************************/
1082: 1058 0000DEEE # print_addf_er_hdr()
1083: 1059 0000DEEE # {
1084: 1060 0000DEEE 11 5c jbr L349
1085: 1061 0000DEF0 L350:
1086: 1062 0000DEF0 # writes(" \n"); /* start a new print line */
1087: 1063 0000DEF0 .data 1
1088: 1064 00000bd8 * L351:
1089: 1065 00000bd8 * 200A00 .ascii " \12\0"
1090: 1066 00000bdb * .text
1091: 1067 0000DEF0 dd 8f00000bd8 pushl $L351
1092: 1068 0000DEF6 fe 08 effffff72f callf $8,_writes
1093: 1069 0000DEFD # writes("cycle: "); /* print the cycle count */
1094: 1070 0000DEFD .data 1
1095: 1071 00000bdb * L352:
1096: 1072 00000bdb * 6379636C653A2000 .ascii "cycle: \0"
1097: 1073 00000be3 * .text
1098: 1074 0000DEFD dd 8f00000bdb pushl $L352
1099: 1075 0000DF03 fe 08 effffff722 callf $8,_writes
1100: 1076 0000DF0A # writed( cycle );
1101: 1077 0000DF0A dd effffff71c pushl _cycle
1102: 1078 0000DF10 fe 08 effffff715 callf $8,_writed
1103: 1079 0000DF17 # writes(" ADDF test "); /* print the test number */
1104: 1080 0000DF17 .data 1
1105: 1081 00000be3 * L353:
1106: 1082 00000be3 * 2020414444462074657374200 .ascii " ADDF test \0"
1107: 0
1108: 1083 00000bf0 * .text
1109: 1084 0000DF17 dd 8f00000be3 pushl $L353
1110: 1085 0000DF1D fe 08 effffff708 callf $8,_writes
1111: 1086 0000DF24 # writed( test_no );
1112: 1087 0000DF24 dd effffff702 pushl _test_no
1113: 1088 0000DF2A fe 08 effffff6fb callf $8,_writed
1114: 1089 0000DF31 # writes(", subtest "); /* print the subtest no. */
1115: 1090 0000DF31 .data 1
1116: 1091 00000bf0 * L354:
1117: 1092 00000bf0 * 2C20737562746573742000 .ascii ", subtest \0"
1118: 1093 00000bfb * .text
1119: 1094 0000DF31 dd 8f00000bf0 pushl $L354
1120: 1095 0000DF37 fe 08 effffff6ee callf $8,_writes
1121: 1096 0000DF3E # writed( subtest );
1122: 1097 0000DF3E dd effffff6e8 pushl _subtest
1123: 1098 0000DF44 fe 08 effffff6e1 callf $8,_writed
1124: 1099 0000DF4B # }
1125: 1100 0000DF4B 40 ret#2
1126: 1101 0000DF4C .set L347,0x0
1127: 1102 0000DF4C L349:
1128: 1103 0000DF4C 11 a2 jbr L350
1129: 1104 0000DF4E .data
1130: 1105 00000a78 * .text
1131: 1106 0000DF4E .align 1
1132: 1107 0000DF4E .globl _print_addf_data
1133: 1108 0000DF4E _print_addf_data:
1134: 1109 0000DF4E 0000 .word L355
1135: 1110 0000DF50 #
1136: 1111 0000DF50 #
1137: 1112 0000DF50 #
1138: 1113 0000DF50 # /**************************************************************************
1139: 1114 0000DF50 # *
1140: 1115 0000DF50 # * PRINT THE DATA AND STORE RESULTS
1141: 1116 0000DF50 # *
1142: 1117 0000DF50 # * initial Acc = xxxxxxxx, stored = xxxxxxxx, data index = xx
1143: 1118 0000DF50 # * operand = xxxxxxxx, expected = xxxxxxxx
1144: 1119 0000DF50 # **************************************************************************/
1145: 1120 0000DF50 # print_addf_data()
1146: 1121 0000DF50 # {
1147: 1122 0000DF50 13 0095 jbr L357
1148: 1123 0000DF53 L358:
1149: 1124 0000DF53 # writes("initial Acc = ");
1150: 1125 0000DF53 .data 1
1151: 1126 00000bfb * L359:
1152: 1127 00000bfb * 696E697469616C20416363203 .ascii "initial Acc = \0"
1153: D2000
1154: 1128 00000c0a * .text
1155: 1129 0000DF53 dd 8f00000bfb pushl $L359
1156: 1130 0000DF59 fe 08 effffff6cc callf $8,_writes
1157: 1131 0000DF60 # write32h( sgl_ld_acc );
1158: 1132 0000DF60 dd effffff6c6 pushl _sgl_ld_acc
1159: 1133 0000DF66 fe 08 effffff6bf callf $8,_write32h
1160: 1134 0000DF6D # writes(", stored = ");
1161: 1135 0000DF6D .data 1
1162: 1136 00000c0a * L360:
1163: 1137 00000c0a * 2C2020202073746F726564203 .ascii ", stored = \0"
1164: D2000
1165: 1138 00000c19 * .text
1166: 1139 0000DF6D dd 8f00000c0a pushl $L360
1167: 1140 0000DF73 fe 08 effffff6b2 callf $8,_writes
1168: 1141 0000DF7A # write32h( sgl_st_acc );
1169: 1142 0000DF7A dd effffff6ac pushl _sgl_st_acc
1170: 1143 0000DF80 fe 08 effffff6a5 callf $8,_write32h
1171: 1144 0000DF87 # writes(", data index = ");
1172: 1145 0000DF87 .data 1
1173: 1146 00000c19 * L361:
1174: 1147 00000c19 * 2C20206461746120696E64657 .ascii ", data index = \0"
1175: 8203D2000
1176: 1148 00000c2a * .text
1177: 1149 0000DF87 dd 8f00000c19 pushl $L361
1178: 1150 0000DF8D fe 08 effffff698 callf $8,_writes
1179: 1151 0000DF94 # writed( index );
1180: 1152 0000DF94 dd effffff692 pushl _index
1181: 1153 0000DF9A fe 08 effffff68b callf $8,_writed
1182: 1154 0000DFA1 # writec('\n');
1183: 1155 0000DFA1 dd 0a pushl $10
1184: 1156 0000DFA3 fe 08 effffff682 callf $8,_writec
1185: 1157 0000DFAA # writes(" operand = ");
1186: 1158 0000DFAA .data 1
1187: 1159 00000c2a * L363:
1188: 1160 00000c2a * 202020206F706572616E64203 .ascii " operand = \0"
1189: D2000
1190: 1161 00000c39 * .text
1191: 1162 0000DFAA dd 8f00000c2a pushl $L363
1192: 1163 0000DFB0 fe 08 effffff675 callf $8,_writes
1193: 1164 0000DFB7 # write32h( sgl_value_1 );
1194: 1165 0000DFB7 dd effffff66f pushl _sgl_value_1
1195: 1166 0000DFBD fe 08 effffff668 callf $8,_write32h
1196: 1167 0000DFC4 # writes(", expected = ");
1197: 1168 0000DFC4 .data 1
1198: 1169 00000c39 * L364:
1199: 1170 00000c39 * 2C20206578706563746564203 .ascii ", expected = \0"
1200: D2000
1201: 1171 00000c48 * .text
1202: 1172 0000DFC4 dd 8f00000c39 pushl $L364
1203: 1173 0000DFCA fe 08 effffff65b callf $8,_writes
1204: 1174 0000DFD1 # write32h( sgl_expected );
1205: 1175 0000DFD1 dd effffff655 pushl _sgl_expected
1206: 1176 0000DFD7 fe 08 effffff64e callf $8,_write32h
1207: 1177 0000DFDE # writec('\n');
1208: 1178 0000DFDE dd 0a pushl $10
1209: 1179 0000DFE0 fe 08 effffff645 callf $8,_writec
1210: 1180 0000DFE7 # }
1211: 1181 0000DFE7 40 ret#2
1212: 1182 0000DFE8 .set L355,0x0
1213: 1183 0000DFE8 L357:
1214: 1184 0000DFE8 13 ff68 jbr L358
1215: 1185 0000DFEB .data
1216: 1186 00000a78 * .text
1217: 1187 0000DFEB 00 .align 1
1218: 1188 0000DFEC .globl _addf_er_halt
1219: 1189 0000DFEC _addf_er_halt:
1220: 1190 0000DFEC 0000 .word L365
1221: 1191 0000DFEE #
1222: 1192 0000DFEE #
1223: 1193 0000DFEE #
1224: 1194 0000DFEE # /**************************************************************************
1225: 1195 0000DFEE # *
1226: 1196 0000DFEE # * HALT ON ERROR ROUTINE
1227: 1197 0000DFEE # *
1228: 1198 0000DFEE # **************************************************************************/
1229: 1199 0000DFEE # addf_er_halt( halt_code )
1230: 1200 0000DFEE # int halt_code;
1231: 1201 0000DFEE # {
1232: 1202 0000DFEE 13 00af jbr L367
1233: 1203 0000DFF1 L368:
1234: 1204 0000DFF1 # sgl_dummy1 = halt_code; /* get the error type */
1235: 1205 0000DFF1 0d ad04 effffff633 movl 4(fp),_sgl_dummy1
1236: 1206 0000DFF9 # asm("movl _test_no,r0"); /* r0 = test number */
1237: 1207 0000DFF9 0d effffff62d 50 movl _test_no,r0
1238: 1208 0000E000 # asm("movl _subtest,r1"); /* r1 = subtest number */
1239: 1209 0000E000 0d effffff626 51 movl _subtest,r1
1240: 1210 0000E007 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1241: 1211 0000E007 0d effffff61f 52 movl _sgl_dummy1,r2
1242: 1212 0000E00E # asm("movl _cycle,r3"); /* r3 = cycle count */
1243: 1213 0000E00E 0d effffff618 53 movl _cycle,r3
1244: 1214 0000E015 # asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */
1245: 1215 0000E015 0d effffff611 54 movl _sgl_ld_acc,r4
1246: 1216 0000E01C # asm("movl _sgl_value_1,r5"); /* r5 = data added */
1247: 1217 0000E01C 0d effffff60a 55 movl _sgl_value_1,r5
1248: 1218 0000E023 # asm("movl _sgl_st_acc,r6"); /* r6 = data stored */
1249: 1219 0000E023 0d effffff603 56 movl _sgl_st_acc,r6
1250: 1220 0000E02A # if( halt_code == BAD_ACC_HLT ) {
1251: 1221 0000E02A 1d ad04 01 cmpl 4(fp),$1
1252: 1222 0000E02E 21 10 jneq L369
1253: 1223 0000E030 # asm("movl _sgl_expected,r7"); /* r7 = data expected */
1254: 1224 0000E030 0d effffff5f6 57 movl _sgl_expected,r7
1255: 1225 0000E037 # asm("movl _index,r8"); /* r8 = data index */
1256: 1226 0000E037 0d effffff5ef 58 movl _index,r8
1257: 1227 0000E03E # } else
1258: 1228 0000E03E 11 5e jbr L370
1259: 1229 0000E040 L369:
1260: 1230 0000E040 # if( halt_code == BAD_REG_HLT ) {
1261: 1231 0000E040 1d ad04 02 cmpl 4(fp),$2
1262: 1232 0000E044 21 3d jneq L371
1263: 1233 0000E046 # sgl_dummy1 = load_regs[index2];
1264: 1234 0000E046 0d effffff5e0 50 movl _index2,r0
1265: 1235 0000E04D 0d 40effffff5d8 movl _load_regs[r0],_sgl_dummy1
1266: effffff5d3
1267: 1236 0000E059 # sgl_dummy2 = store_regs[index2];
1268: 1237 0000E059 0d effffff5cd 50 movl _index2,r0
1269: 1238 0000E060 0d 40effffff5c5 movl _store_regs[r0],_sgl_dummy2
1270: effffff5c0
1271: 1239 0000E06C # asm("movl _index2,r7"); /* r7 = bad register # */
1272: 1240 0000E06C 0d effffff5ba 57 movl _index2,r7
1273: 1241 0000E073 # asm("movl _sgl_dummy2,r8"); /* r8 = actual value */
1274: 1242 0000E073 0d effffff5b3 58 movl _sgl_dummy2,r8
1275: 1243 0000E07A # asm("movl _sgl_dummy1,r9"); /* r9 = expected value */
1276: 1244 0000E07A 0d effffff5ac 59 movl _sgl_dummy1,r9
1277: 1245 0000E081 # } else
1278: 1246 0000E081 11 1b jbr L372
1279: 1247 0000E083 L371:
1280: 1248 0000E083 # if( halt_code == BAD_PSL_HLT ) {
1281: 1249 0000E083 1d ad04 03 cmpl 4(fp),$3
1282: 1250 0000E087 21 15 jneq L373
1283: 1251 0000E089 # asm("movl _init_psl,r7"); /* r7 = initial PSL */
1284: 1252 0000E089 0d effffff59d 57 movl _init_psl,r7
1285: 1253 0000E090 # asm("movl _psl_val,r8"); /* r8 = final PSL */
1286: 1254 0000E090 0d effffff596 58 movl _psl_val,r8
1287: 1255 0000E097 # asm("movl _exp_psl,r9"); /* r9 = expected PSL */
1288: 1256 0000E097 0d effffff58f 59 movl _exp_psl,r9
1289: 1257 0000E09E # };
1290: 1258 0000E09E L373:
1291: 1259 0000E09E L372:
1292: 1260 0000E09E L370:
1293: 1261 0000E09E # asm("halt"); /* HALT ... */
1294: 1262 0000E09E 00 halt
1295: 1263 0000E09F # }
1296: 1264 0000E09F 40 ret#2
1297: 1265 0000E0A0 .set L365,0x0
1298: 1266 0000E0A0 L367:
1299: 1267 0000E0A0 13 ff4e jbr L368
1300: 1268 0000E0A3 .data
1301: 1268 0001B6CF .data
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