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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
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Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 00000a78 * .text
4 00000000 .align 1
5 00000000 .globl _addf
6 00000000 _addf:
7 0000D62C 0000 .word L215
8 0000D62E # #include "fpp_defs.h"
9 0000D62E #
10 0000D62E #
11 0000D62E # /*****************************************************************************
12 0000D62E # *
13 0000D62E # * ADDF - SINGLE PRECISION FLOATING POINT ADD TEST
14 0000D62E # *
15 0000D62E # *****************************************************************************/
16 0000D62E # addf()
17 0000D62E # {
18 0000D62E 11 5d jbr L217
19 0000D630 L218:
20 0000D630 # asm(".globl _addf_t");
21 0000D630 .globl _addf_t
22 0000D630 # asm("_addf_t:"); /* entry address */
23 0000D630 _addf_t:
24 0000D630 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st cycle */
25 0000D630 1d effffffff6 01 cmpl _cycle,$1
26 0000D637 21 15 jneq L219
27 0000D639 5d efffffffed tstl _prt_hdrs
28 0000D63F 31 0d jeql L219
29 0000D641 # writes(" ADDF");
30 0000D641 .data 1
31 00000a78 * L221:
32 00000a78 * 204144444600 .ascii " ADDF\0"
33 00000a7e * .text
34 0000D641 dd 8f00000a78 pushl $L221
35 0000D647 fe 08 efffffffde callf $8,_writes
36 0000D64E # addf_1(); /* add through a register */
37 0000D64E L219:
38 0000D64E fe 04 ef0000003b callf $4,_addf_1
39 0000D655 # addf_2(); /* add through the cache */
40 0000D655 fe 04 ef0000011e callf $4,_addf_2
41 0000D65C # addf_3(); /* wait 3 NOPs */
42 0000D65C fe 04 ef000001fb callf $4,_addf_3
43 0000D663 # addf_4(); /* wait 2 NOPs */
44 0000D663 fe 04 ef000002dc callf $4,_addf_4
45 0000D66A # addf_5(); /* wait 1 NOP before storing */
46 0000D66A fe 04 ef000003bb callf $4,_addf_5
47 0000D671 # addf_6(); /* register stability test */
48 0000D671 fe 04 ef0000049a callf $4,_addf_6
49 0000D678 # addf_7(); /* PSL stability test */
50 0000D678 fe 04 ef00000609 callf $4,_addf_7
51 0000D67F # addf_8(); /* piped entry test */
52 0000D67F fe 04 ef0000077e callf $4,_addf_8
53 0000D686 # asm("jmp *return"); /* return to the test monitor */
54 0000D686 71 ffffffffa0 jmp *return
55 0000D68C # }
56 0000D68C 40 ret#2
57 0000D68D .set L215,0x0
58 0000D68D L217:
59 0000D68D 11 a1 jbr L218
60 0000D68F .data
61 00000a78 * .text
62 0000D68F 00 .align 1
63 0000D690 .globl _addf_1
64 0000D690 _addf_1:
65 0000D690 0000 .word L230
66 0000D692 #
67 0000D692 #
68 0000D692 #
69 0000D692 # /************************************************************************
70 0000D692 # *
71 0000D692 # * SUBTEST 1 - add through a register
72 0000D692 # *
73 0000D692 # ************************************************************************/
74 0000D692 # addf_1()
75 0000D692 # {
76 0000D692 13 00e1 jbr L232
77 0000D695 L233:
78 0000D695 # force_loop = FALSE;
79 0000D695 4d efffffff91 clrl _force_loop
80 0000D69B # subtest = 1;
81 0000D69B 0d 01 efffffff8a movl $1,_subtest
82 0000D6A2 # for( index = 0; index < max_addf_1_index; index++ ) {
83 0000D6A2 4d efffffff84 clrl _index
84 0000D6A8 L236:
85 0000D6A8 1d efffffff7e efffffff79 cmpl _index,_max_addf_1_index
86 0000D6B3 91 03 13 00bd jgeq L235
87 0000D6B8 # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
88 0000D6B8 5c 0c efffffff6d 50 mull3 $12,_index,r0
89 0000D6C0 0d e000000000 efffffff61 movl _addf_1_data(r0),_sgl_ld_acc
90 0000D6CB # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
91 0000D6CB 5c 0c efffffff5a 50 mull3 $12,_index,r0
92 0000D6D3 0d e000000004 efffffff4e movl _addf_1_data+4(r0),_sgl_value_1
93 0000D6DE # sgl_expected = addf_1_data[index].exp; /* get expected result */
94 0000D6DE 5c 0c efffffff47 50 mull3 $12,_index,r0
95 0000D6E6 0d e000000008 efffffff3b movl _addf_1_data+8(r0),_sgl_expected
96 0000D6F1 # /*
97 0000D6F1 # * If LOOP ON ERROR is set, this is the loop for this subtest.
98 0000D6F1 # * The force loop flag is set after the first error.
99 0000D6F1 # */
100 0000D6F1 # asm("_addf_1_lp1:");
101 0000D6F1 _addf_1_lp1:
102 0000D6F1 # asm("movl _sgl_ld_acc,r3"); /* move the 1st data to r3 */
103 0000D6F1 0d efffffff35 53 movl _sgl_ld_acc,r3
104 0000D6F8 # asm("movl _sgl_value_1,r4"); /* move the 2nd data to r4 */
105 0000D6F8 0d efffffff2e 54 movl _sgl_value_1,r4
106 0000D6FF # asm("ldf r3"); /* load the 1st operand */
107 0000D6FF 06 53 ldf r3
108 0000D701 # asm("addf r4"); /* add the 2nd operand */
109 0000D701 c6 54 addf r4
110 0000D703 # asm("stf _sgl_st_acc"); /* store the result */
111 0000D703 26 efffffff23 stf _sgl_st_acc
112 0000D709 # if( force_loop )
113 0000D709 5d efffffff1d tstl _force_loop
114 0000D70F 31 02 jeql L237
115 0000D711 # asm("brb _addf_1_lp1");; /* loop on the error */
116 0000D711 11 de brb _addf_1_lp1
117 0000D713 L237:
118 0000D713 # /*
119 0000D713 # * end error loop - test the results
120 0000D713 # */
121 0000D713 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
122 0000D713 1d efffffff13 efffffff0e cmpl _sgl_st_acc,_sgl_expected
123 0000D71E 31 4c jeql L238
124 0000D720 # errcnt++; /* bump the error count */
125 0000D720 6d efffffff06 incl _errcnt
126 0000D726 # if( prt_error ) {
127 0000D726 5d efffffff00 tstl _prt_error
128 0000D72C 31 1b jeql L239
129 0000D72E # print_addf_er_hdr();
130 0000D72E fe 04 ef000007b7 callf $4,_print_addf_er_hdr
131 0000D735 # writes(" (Reg. Data) - BAD FINAL ACC\n");
132 0000D735 .data 1
133 00000a7e * L241:
134 00000a7e * 20285265672E2044617461292 .ascii " (Reg. Data) - BAD FINAL ACC\12\0"
02D204241442046494E414C20
4143430A00
135 00000a9c * .text
136 0000D735 dd 8f00000a7e pushl $L241
137 0000D73B fe 08 effffffeea callf $8,_writes
138 0000D742 # print_addf_data();
139 0000D742 fe 04 ef00000805 callf $4,_print_addf_data
140 0000D749 # }
141 0000D749 # if( halt_flg )
142 0000D749 L239:
143 0000D749 5d effffffedd tstl _halt_flg
144 0000D74F 31 09 jeql L243
145 0000D751 # addf_er_halt( BAD_ACC_HLT ); /* halt on the error */
146 0000D751 dd 01 pushl $1
147 0000D753 fe 08 ef00000892 callf $8,_addf_er_halt
148 0000D75A # if( loop_on_err ) {
149 0000D75A L243:
150 0000D75A 5d effffffecc tstl _loop_on_err
151 0000D760 31 0a jeql L245
152 0000D762 # force_loop = TRUE; /* set the force loop flag */
153 0000D762 0d 01 effffffec3 movl $1,_force_loop
154 0000D769 # asm("brw _addf_1_lp1");; /* and loop on the error */
155 0000D769 13 ff85 brw _addf_1_lp1
156 0000D76C # } /* end of loop on error */
157 0000D76C # } /* end of compare error */
158 0000D76C L245:
159 0000D76C # } /* end of WHILE loop */
160 0000D76C L238:
161 0000D76C L234:
162 0000D76C 6d effffffeba incl _index
163 0000D772 13 ff33 jbr L236
164 0000D775 L235:
165 0000D775 # } /* end of subtest 1 */
166 0000D775 40 ret#2
167 0000D776 .set L230,0x0
168 0000D776 L232:
169 0000D776 13 ff1c jbr L233
170 0000D779 .data
171 00000a78 * .text
172 0000D779 00 .align 1
173 0000D77A .globl _addf_2
174 0000D77A _addf_2:
175 0000D77A 0000 .word L246
176 0000D77C #
177 0000D77C #
178 0000D77C #
179 0000D77C # /************************************************************************
180 0000D77C # *
181 0000D77C # * SUBTEST 2 - add through memory
182 0000D77C # *
183 0000D77C # ************************************************************************/
184 0000D77C # addf_2()
185 0000D77C # {
186 0000D77C 13 00db jbr L248
187 0000D77F L249:
188 0000D77F # force_loop = FALSE;
189 0000D77F 4d effffffea7 clrl _force_loop
190 0000D785 # subtest = 2;
191 0000D785 0d 02 effffffea0 movl $2,_subtest
192 0000D78C # for( index = 0; index < max_addf_1_index; index++ ) {
193 0000D78C 4d effffffe9a clrl _index
194 0000D792 L252:
195 0000D792 1d effffffe94 effffffe8f cmpl _index,_max_addf_1_index
196 0000D79D 91 03 13 00b7 jgeq L251
197 0000D7A2 # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
198 0000D7A2 5c 0c effffffe83 50 mull3 $12,_index,r0
199 0000D7AA 0d e000000000 effffffe77 movl _addf_1_data(r0),_sgl_ld_acc
200 0000D7B5 # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
201 0000D7B5 5c 0c effffffe70 50 mull3 $12,_index,r0
202 0000D7BD 0d e000000004 effffffe64 movl _addf_1_data+4(r0),_sgl_value_1
203 0000D7C8 # sgl_expected = addf_1_data[index].exp; /* get expected result */
204 0000D7C8 5c 0c effffffe5d 50 mull3 $12,_index,r0
205 0000D7D0 0d e000000008 effffffe51 movl _addf_1_data+8(r0),_sgl_expected
206 0000D7DB # /*
207 0000D7DB # * If LOOP ON ERROR is set, this is the loop for this subtest.
208 0000D7DB # * The force loop flag is set after the first error.
209 0000D7DB # */
210 0000D7DB # asm("_addf_2_lp1:");
211 0000D7DB _addf_2_lp1:
212 0000D7DB # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
213 0000D7DB 06 effffffe4b ldf _sgl_ld_acc
214 0000D7E1 # asm("addf _sgl_value_1"); /* add the 2nd operand */
215 0000D7E1 c6 effffffe45 addf _sgl_value_1
216 0000D7E7 # asm("stf _sgl_st_acc"); /* store the result */
217 0000D7E7 26 effffffe3f stf _sgl_st_acc
218 0000D7ED # if( force_loop )
219 0000D7ED 5d effffffe39 tstl _force_loop
220 0000D7F3 31 02 jeql L253
221 0000D7F5 # asm("brb _addf_2_lp1");; /* loop on the error */
222 0000D7F5 11 e4 brb _addf_2_lp1
223 0000D7F7 L253:
224 0000D7F7 # /*
225 0000D7F7 # * end error loop - test the results
226 0000D7F7 # */
227 0000D7F7 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
228 0000D7F7 1d effffffe2f effffffe2a cmpl _sgl_st_acc,_sgl_expected
229 0000D802 31 4c jeql L254
230 0000D804 # errcnt++; /* bump the error count */
231 0000D804 6d effffffe22 incl _errcnt
232 0000D80A # if( prt_error ) {
233 0000D80A 5d effffffe1c tstl _prt_error
234 0000D810 31 1b jeql L255
235 0000D812 # print_addf_er_hdr();
236 0000D812 fe 04 ef000006d3 callf $4,_print_addf_er_hdr
237 0000D819 # writes(" (Cache Data) - BAD FINAL ACC\n");
238 0000D819 .data 1
239 00000a9c * L256:
240 00000a9c * 2028436163686520446174612 .ascii " (Cache Data) - BAD FINAL ACC\12\0"
9202D204241442046494E414C
204143430A00
241 00000abb * .text
242 0000D819 dd 8f00000a9c pushl $L256
243 0000D81F fe 08 effffffe06 callf $8,_writes
244 0000D826 # print_addf_data();
245 0000D826 fe 04 ef00000721 callf $4,_print_addf_data
246 0000D82D # }
247 0000D82D # if( halt_flg )
248 0000D82D L255:
249 0000D82D 5d effffffdf9 tstl _halt_flg
250 0000D833 31 09 jeql L257
251 0000D835 # addf_er_halt( BAD_ACC_HLT ); /* halt on the error */
252 0000D835 dd 01 pushl $1
253 0000D837 fe 08 ef000007ae callf $8,_addf_er_halt
254 0000D83E # if( loop_on_err ) {
255 0000D83E L257:
256 0000D83E 5d effffffde8 tstl _loop_on_err
257 0000D844 31 0a jeql L258
258 0000D846 # force_loop = TRUE; /* set the force loop flag */
259 0000D846 0d 01 effffffddf movl $1,_force_loop
260 0000D84D # asm("brw _addf_2_lp1");; /* and loop on the error */
261 0000D84D 13 ff8b brw _addf_2_lp1
262 0000D850 # } /* end of loop on error */
263 0000D850 # } /* end of compare error */
264 0000D850 L258:
265 0000D850 # } /* end of WHILE loop */
266 0000D850 L254:
267 0000D850 L250:
268 0000D850 6d effffffdd6 incl _index
269 0000D856 13 ff39 jbr L252
270 0000D859 L251:
271 0000D859 # } /* end of subtest 2 */
272 0000D859 40 ret#2
273 0000D85A .set L246,0x0
274 0000D85A L248:
275 0000D85A 13 ff22 jbr L249
276 0000D85D .data
277 00000a78 * .text
278 0000D85D 00 .align 1
279 0000D85E .globl _addf_3
280 0000D85E _addf_3:
281 0000D85E 0000 .word L259
282 0000D860 #
283 0000D860 #
284 0000D860 #
285 0000D860 # /************************************************************************
286 0000D860 # *
287 0000D860 # * SUBTEST 3 - Wait 3 NOPs before storing the results
288 0000D860 # *
289 0000D860 # ************************************************************************/
290 0000D860 # addf_3()
291 0000D860 # {
292 0000D860 13 00df jbr L261
293 0000D863 L262:
294 0000D863 # force_loop = FALSE;
295 0000D863 4d effffffdc3 clrl _force_loop
296 0000D869 # subtest = 3;
297 0000D869 0d 03 effffffdbc movl $3,_subtest
298 0000D870 # for( index = 0; index < max_addf_1_index; index++ ) {
299 0000D870 4d effffffdb6 clrl _index
300 0000D876 L265:
301 0000D876 1d effffffdb0 effffffdab cmpl _index,_max_addf_1_index
302 0000D881 91 03 13 00bb jgeq L264
303 0000D886 # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
304 0000D886 5c 0c effffffd9f 50 mull3 $12,_index,r0
305 0000D88E 0d e000000000 effffffd93 movl _addf_1_data(r0),_sgl_ld_acc
306 0000D899 # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
307 0000D899 5c 0c effffffd8c 50 mull3 $12,_index,r0
308 0000D8A1 0d e000000004 effffffd80 movl _addf_1_data+4(r0),_sgl_value_1
309 0000D8AC # sgl_expected = addf_1_data[index].exp; /* get expected result */
310 0000D8AC 5c 0c effffffd79 50 mull3 $12,_index,r0
311 0000D8B4 0d e000000008 effffffd6d movl _addf_1_data+8(r0),_sgl_expected
312 0000D8BF # /*
313 0000D8BF # * If LOOP ON ERROR is set, this is the loop for this subtest.
314 0000D8BF # * The force loop flag is set after the first error.
315 0000D8BF # */
316 0000D8BF # asm("_addf_3_lp1:");
317 0000D8BF _addf_3_lp1:
318 0000D8BF # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
319 0000D8BF 06 effffffd67 ldf _sgl_ld_acc
320 0000D8C5 # asm("nop"); /* delay */
321 0000D8C5 10 nop
322 0000D8C6 # asm("addf _sgl_value_1"); /* add the 2nd operand */
323 0000D8C6 c6 effffffd60 addf _sgl_value_1
324 0000D8CC # asm("nop"); /* delay before ... */
325 0000D8CC 10 nop
326 0000D8CD # asm("nop");
327 0000D8CD 10 nop
328 0000D8CE # asm("nop"); /* ... storing the result */
329 0000D8CE 10 nop
330 0000D8CF # asm("stf _sgl_st_acc"); /* store the result */
331 0000D8CF 26 effffffd57 stf _sgl_st_acc
332 0000D8D5 # if( force_loop )
333 0000D8D5 5d effffffd51 tstl _force_loop
334 0000D8DB 31 02 jeql L266
335 0000D8DD # asm("brb _addf_3_lp1");; /* loop on the error */
336 0000D8DD 11 e0 brb _addf_3_lp1
337 0000D8DF L266:
338 0000D8DF # /*
339 0000D8DF # * end error loop - test the results
340 0000D8DF # */
341 0000D8DF # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
342 0000D8DF 1d effffffd47 effffffd42 cmpl _sgl_st_acc,_sgl_expected
343 0000D8EA 31 4c jeql L267
344 0000D8EC # errcnt++; /* bump the error count */
345 0000D8EC 6d effffffd3a incl _errcnt
346 0000D8F2 # if( prt_error ) {
347 0000D8F2 5d effffffd34 tstl _prt_error
348 0000D8F8 31 1b jeql L268
349 0000D8FA # print_addf_er_hdr();
350 0000D8FA fe 04 ef000005eb callf $4,_print_addf_er_hdr
351 0000D901 # writes(" (Cache Data - 3 NOPS) - BAD FINAL ACC\n");
352 0000D901 .data 1
353 00000abb * L269:
354 00000abb * 2028436163686520446174612 .ascii " (Cache Data - 3 NOPS) - BAD FINAL ACC\12\0"
02D2033204E4F505329202D20
4241442046494E414C2041434
30A00
355 00000ae3 * .text
356 0000D901 dd 8f00000abb pushl $L269
357 0000D907 fe 08 effffffd1e callf $8,_writes
358 0000D90E # print_addf_data();
359 0000D90E fe 04 ef00000639 callf $4,_print_addf_data
360 0000D915 # }
361 0000D915 # if( halt_flg )
362 0000D915 L268:
363 0000D915 5d effffffd11 tstl _halt_flg
364 0000D91B 31 09 jeql L270
365 0000D91D # addf_er_halt( BAD_ACC_HLT ); /* halt on the error */
366 0000D91D dd 01 pushl $1
367 0000D91F fe 08 ef000006c6 callf $8,_addf_er_halt
368 0000D926 # if( loop_on_err ) {
369 0000D926 L270:
370 0000D926 5d effffffd00 tstl _loop_on_err
371 0000D92C 31 0a jeql L271
372 0000D92E # force_loop = TRUE; /* set the force loop flag */
373 0000D92E 0d 01 effffffcf7 movl $1,_force_loop
374 0000D935 # asm("brw _addf_3_lp1");; /* and loop on the error */
375 0000D935 13 ff87 brw _addf_3_lp1
376 0000D938 # } /* end of loop on error */
377 0000D938 # } /* end of compare error */
378 0000D938 L271:
379 0000D938 # } /* end of WHILE loop */
380 0000D938 L267:
381 0000D938 L263:
382 0000D938 6d effffffcee incl _index
383 0000D93E 13 ff35 jbr L265
384 0000D941 L264:
385 0000D941 # } /* end of subtest 3 */
386 0000D941 40 ret#2
387 0000D942 .set L259,0x0
388 0000D942 L261:
389 0000D942 13 ff1e jbr L262
390 0000D945 .data
391 00000a78 * .text
392 0000D945 00 .align 1
393 0000D946 .globl _addf_4
394 0000D946 _addf_4:
395 0000D946 0000 .word L272
396 0000D948 #
397 0000D948 #
398 0000D948 #
399 0000D948 # /************************************************************************
400 0000D948 # *
401 0000D948 # * SUBTEST 4 - Wait 2 NOPs before storing the results
402 0000D948 # *
403 0000D948 # ************************************************************************/
404 0000D948 # addf_4()
405 0000D948 # {
406 0000D948 13 00de jbr L274
407 0000D94B L275:
408 0000D94B # force_loop = FALSE;
409 0000D94B 4d effffffcdb clrl _force_loop
410 0000D951 # subtest = 4;
411 0000D951 0d 04 effffffcd4 movl $4,_subtest
412 0000D958 # for( index = 0; index < max_addf_1_index; index++ ) {
413 0000D958 4d effffffcce clrl _index
414 0000D95E L278:
415 0000D95E 1d effffffcc8 effffffcc3 cmpl _index,_max_addf_1_index
416 0000D969 91 03 13 00ba jgeq L277
417 0000D96E # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
418 0000D96E 5c 0c effffffcb7 50 mull3 $12,_index,r0
419 0000D976 0d e000000000 effffffcab movl _addf_1_data(r0),_sgl_ld_acc
420 0000D981 # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
421 0000D981 5c 0c effffffca4 50 mull3 $12,_index,r0
422 0000D989 0d e000000004 effffffc98 movl _addf_1_data+4(r0),_sgl_value_1
423 0000D994 # sgl_expected = addf_1_data[index].exp; /* get expected result */
424 0000D994 5c 0c effffffc91 50 mull3 $12,_index,r0
425 0000D99C 0d e000000008 effffffc85 movl _addf_1_data+8(r0),_sgl_expected
426 0000D9A7 # /*
427 0000D9A7 # * If LOOP ON ERROR is set, this is the loop for this subtest.
428 0000D9A7 # * The force loop flag is set after the first error.
429 0000D9A7 # */
430 0000D9A7 # asm("_addf_4_lp1:");
431 0000D9A7 _addf_4_lp1:
432 0000D9A7 # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
433 0000D9A7 06 effffffc7f ldf _sgl_ld_acc
434 0000D9AD # asm("nop"); /* delay */
435 0000D9AD 10 nop
436 0000D9AE # asm("addf _sgl_value_1"); /* add the 2nd operand */
437 0000D9AE c6 effffffc78 addf _sgl_value_1
438 0000D9B4 # asm("nop"); /* delay before ... */
439 0000D9B4 10 nop
440 0000D9B5 # asm("nop"); /* ... storing the result */
441 0000D9B5 10 nop
442 0000D9B6 # asm("stf _sgl_st_acc"); /* store the result */
443 0000D9B6 26 effffffc70 stf _sgl_st_acc
444 0000D9BC # if( force_loop )
445 0000D9BC 5d effffffc6a tstl _force_loop
446 0000D9C2 31 02 jeql L279
447 0000D9C4 # asm("brb _addf_4_lp1");; /* loop on the error */
448 0000D9C4 11 e1 brb _addf_4_lp1
449 0000D9C6 L279:
450 0000D9C6 # /*
451 0000D9C6 # * end error loop - test the results
452 0000D9C6 # */
453 0000D9C6 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
454 0000D9C6 1d effffffc60 effffffc5b cmpl _sgl_st_acc,_sgl_expected
455 0000D9D1 31 4c jeql L280
456 0000D9D3 # errcnt++; /* bump the error count */
457 0000D9D3 6d effffffc53 incl _errcnt
458 0000D9D9 # if( prt_error ) {
459 0000D9D9 5d effffffc4d tstl _prt_error
460 0000D9DF 31 1b jeql L281
461 0000D9E1 # print_addf_er_hdr();
462 0000D9E1 fe 04 ef00000504 callf $4,_print_addf_er_hdr
463 0000D9E8 # writes(" (Cache Data - 2 NOPS) - BAD FINAL ACC\n");
464 0000D9E8 .data 1
465 00000ae3 * L282:
466 00000ae3 * 2028436163686520446174612 .ascii " (Cache Data - 2 NOPS) - BAD FINAL ACC\12\0"
02D2032204E4F505329202D20
4241442046494E414C2041434
30A00
467 00000b0b * .text
468 0000D9E8 dd 8f00000ae3 pushl $L282
469 0000D9EE fe 08 effffffc37 callf $8,_writes
470 0000D9F5 # print_addf_data();
471 0000D9F5 fe 04 ef00000552 callf $4,_print_addf_data
472 0000D9FC # }
473 0000D9FC # if( halt_flg )
474 0000D9FC L281:
475 0000D9FC 5d effffffc2a tstl _halt_flg
476 0000DA02 31 09 jeql L283
477 0000DA04 # addf_er_halt( BAD_ACC_HLT ); /* halt on the error */
478 0000DA04 dd 01 pushl $1
479 0000DA06 fe 08 ef000005df callf $8,_addf_er_halt
480 0000DA0D # if( loop_on_err ) {
481 0000DA0D L283:
482 0000DA0D 5d effffffc19 tstl _loop_on_err
483 0000DA13 31 0a jeql L284
484 0000DA15 # force_loop = TRUE; /* set the force loop flag */
485 0000DA15 0d 01 effffffc10 movl $1,_force_loop
486 0000DA1C # asm("brw _addf_4_lp1");; /* and loop on the error */
487 0000DA1C 13 ff88 brw _addf_4_lp1
488 0000DA1F # } /* end of loop on error */
489 0000DA1F # } /* end of compare error */
490 0000DA1F L284:
491 0000DA1F # } /* end of WHILE loop */
492 0000DA1F L280:
493 0000DA1F L276:
494 0000DA1F 6d effffffc07 incl _index
495 0000DA25 13 ff36 jbr L278
496 0000DA28 L277:
497 0000DA28 # } /* end of subtest 4 */
498 0000DA28 40 ret#2
499 0000DA29 .set L272,0x0
500 0000DA29 L274:
501 0000DA29 13 ff1f jbr L275
502 0000DA2C .data
503 00000a78 * .text
504 0000DA2C .align 1
505 0000DA2C .globl _addf_5
506 0000DA2C _addf_5:
507 0000DA2C 0000 .word L285
508 0000DA2E #
509 0000DA2E #
510 0000DA2E #
511 0000DA2E # /************************************************************************
512 0000DA2E # *
513 0000DA2E # * SUBTEST 5 - Wait 1 NOP before storing the results
514 0000DA2E # *
515 0000DA2E # ************************************************************************/
516 0000DA2E # addf_5()
517 0000DA2E # {
518 0000DA2E 13 00dd jbr L287
519 0000DA31 L288:
520 0000DA31 # force_loop = FALSE;
521 0000DA31 4d effffffbf5 clrl _force_loop
522 0000DA37 # subtest = 5;
523 0000DA37 0d 05 effffffbee movl $5,_subtest
524 0000DA3E # for( index = 0; index < max_addf_1_index; index++ ) {
525 0000DA3E 4d effffffbe8 clrl _index
526 0000DA44 L291:
527 0000DA44 1d effffffbe2 effffffbdd cmpl _index,_max_addf_1_index
528 0000DA4F 91 03 13 00b9 jgeq L290
529 0000DA54 # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
530 0000DA54 5c 0c effffffbd1 50 mull3 $12,_index,r0
531 0000DA5C 0d e000000000 effffffbc5 movl _addf_1_data(r0),_sgl_ld_acc
532 0000DA67 # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
533 0000DA67 5c 0c effffffbbe 50 mull3 $12,_index,r0
534 0000DA6F 0d e000000004 effffffbb2 movl _addf_1_data+4(r0),_sgl_value_1
535 0000DA7A # sgl_expected = addf_1_data[index].exp; /* get expected result */
536 0000DA7A 5c 0c effffffbab 50 mull3 $12,_index,r0
537 0000DA82 0d e000000008 effffffb9f movl _addf_1_data+8(r0),_sgl_expected
538 0000DA8D # /*
539 0000DA8D # * If LOOP ON ERROR is set, this is the loop for this subtest.
540 0000DA8D # * The force loop flag is set after the first error.
541 0000DA8D # */
542 0000DA8D # asm("_addf_5_lp1:");
543 0000DA8D _addf_5_lp1:
544 0000DA8D # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
545 0000DA8D 06 effffffb99 ldf _sgl_ld_acc
546 0000DA93 # asm("nop"); /* delay */
547 0000DA93 10 nop
548 0000DA94 # asm("addf _sgl_value_1"); /* add the 2nd operand */
549 0000DA94 c6 effffffb92 addf _sgl_value_1
550 0000DA9A # asm("nop"); /* delay before storing */
551 0000DA9A 10 nop
552 0000DA9B # asm("stf _sgl_st_acc"); /* store the result */
553 0000DA9B 26 effffffb8b stf _sgl_st_acc
554 0000DAA1 # if( force_loop )
555 0000DAA1 5d effffffb85 tstl _force_loop
556 0000DAA7 31 02 jeql L292
557 0000DAA9 # asm("brb _addf_5_lp1");; /* loop on the error */
558 0000DAA9 11 e2 brb _addf_5_lp1
559 0000DAAB L292:
560 0000DAAB # /*
561 0000DAAB # * end error loop - test the results
562 0000DAAB # */
563 0000DAAB # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
564 0000DAAB 1d effffffb7b effffffb76 cmpl _sgl_st_acc,_sgl_expected
565 0000DAB6 31 4c jeql L293
566 0000DAB8 # errcnt++; /* bump the error count */
567 0000DAB8 6d effffffb6e incl _errcnt
568 0000DABE # if( prt_error ) {
569 0000DABE 5d effffffb68 tstl _prt_error
570 0000DAC4 31 1b jeql L294
571 0000DAC6 # print_addf_er_hdr();
572 0000DAC6 fe 04 ef0000041f callf $4,_print_addf_er_hdr
573 0000DACD # writes(" (Cache Data - 1 NOP) - BAD FINAL ACC\n");
574 0000DACD .data 1
575 00000b0b * L295:
576 00000b0b * 2028436163686520446174612 .ascii " (Cache Data - 1 NOP) - BAD FINAL ACC\12\0"
02D2031204E4F5029202D2042
41442046494E414C204143430
A00
577 00000b32 * .text
578 0000DACD dd 8f00000b0b pushl $L295
579 0000DAD3 fe 08 effffffb52 callf $8,_writes
580 0000DADA # print_addf_data();
581 0000DADA fe 04 ef0000046d callf $4,_print_addf_data
582 0000DAE1 # }
583 0000DAE1 # if( halt_flg )
584 0000DAE1 L294:
585 0000DAE1 5d effffffb45 tstl _halt_flg
586 0000DAE7 31 09 jeql L296
587 0000DAE9 # addf_er_halt( BAD_ACC_HLT ); /* halt on the error */
588 0000DAE9 dd 01 pushl $1
589 0000DAEB fe 08 ef000004fa callf $8,_addf_er_halt
590 0000DAF2 # if( loop_on_err ) {
591 0000DAF2 L296:
592 0000DAF2 5d effffffb34 tstl _loop_on_err
593 0000DAF8 31 0a jeql L297
594 0000DAFA # force_loop = TRUE; /* set the force loop flag */
595 0000DAFA 0d 01 effffffb2b movl $1,_force_loop
596 0000DB01 # asm("brw _addf_5_lp1");; /* and loop on the error */
597 0000DB01 13 ff89 brw _addf_5_lp1
598 0000DB04 # } /* end of loop on error */
599 0000DB04 # } /* end of compare error */
600 0000DB04 L297:
601 0000DB04 # } /* end of WHILE loop */
602 0000DB04 L293:
603 0000DB04 L289:
604 0000DB04 6d effffffb22 incl _index
605 0000DB0A 13 ff37 jbr L291
606 0000DB0D L290:
607 0000DB0D # } /* end of subtest 5 */
608 0000DB0D 40 ret#2
609 0000DB0E .set L285,0x0
610 0000DB0E L287:
611 0000DB0E 13 ff20 jbr L288
612 0000DB11 .data
613 00000a78 * .text
614 0000DB11 00 .align 1
615 0000DB12 .globl _addf_6
616 0000DB12 _addf_6:
617 0000DB12 0000 .word L298
618 0000DB14 #
619 0000DB14 #
620 0000DB14 #
621 0000DB14 # /************************************************************************
622 0000DB14 # *
623 0000DB14 # * SUBTEST 6 - Check for register corruption
624 0000DB14 # *
625 0000DB14 # ************************************************************************/
626 0000DB14 # addf_6()
627 0000DB14 # {
628 0000DB14 13 016d jbr L300
629 0000DB17 L301:
630 0000DB17 # force_loop = FALSE; /* clear force_loop flg */
631 0000DB17 4d effffffb0f clrl _force_loop
632 0000DB1D # subtest = 6;
633 0000DB1D 0d 06 effffffb08 movl $6,_subtest
634 0000DB24 # fill_reg_buf( load_regs ); /* get patterns for regs */
635 0000DB24 dd 8f00000000 pushl $_load_regs
636 0000DB2A fe 08 effffffafb callf $8,_fill_reg_buf
637 0000DB31 # index = 0;
638 0000DB31 4d effffffaf5 clrl _index
639 0000DB37 # sgl_ld_acc = addf_1_data[0].op_1; /* get operand 1 */
640 0000DB37 0d effffffaef effffffaea movl _addf_1_data,_sgl_ld_acc
641 0000DB42 # sgl_value_1 = addf_1_data[0].op_2; /* get operand 2 */
642 0000DB42 0d effffffae8 effffffadf movl _addf_1_data+4,_sgl_value_1
643 0000DB4D # sgl_expected = addf_1_data[0].exp; /* get expected result */
644 0000DB4D 0d effffffae1 effffffad4 movl _addf_1_data+8,_sgl_expected
645 0000DB58 # /*
646 0000DB58 # * If LOOP ON ERROR is set, this is the loop for this subtest.
647 0000DB58 # * The force loop flag is set after the first error.
648 0000DB58 # */
649 0000DB58 # asm("_addf_6_lp1:");
650 0000DB58 _addf_6_lp1:
651 0000DB58 # asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */
652 0000DB58 06 efffffface ldf _sgl_ld_acc
653 0000DB5E # asm("nop");
654 0000DB5E 10 nop
655 0000DB5F # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
656 0000DB5F ab 891fff effffffac4 loadr $0x1fff,_load_regs
657 0000DB68 # asm("nop");
658 0000DB68 10 nop
659 0000DB69 # asm("addf _sgl_value_1"); /* do the add */
660 0000DB69 c6 effffffabd addf _sgl_value_1
661 0000DB6F # asm("nop");
662 0000DB6F 10 nop
663 0000DB70 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
664 0000DB70 bb 891fff effffffab3 storer $0x1fff,_store_regs
665 0000DB79 # asm("stf _sgl_st_acc"); /* save the accumulator */
666 0000DB79 26 effffffaad stf _sgl_st_acc
667 0000DB7F # if( force_loop )
668 0000DB7F 5d effffffaa7 tstl _force_loop
669 0000DB85 31 02 jeql L303
670 0000DB87 # asm("brb _addf_6_lp1");; /* loop on the error */
671 0000DB87 11 cf brb _addf_6_lp1
672 0000DB89 L303:
673 0000DB89 # /*
674 0000DB89 # * Now compare the stored register values to those that were loaded
675 0000DB89 # */
676 0000DB89 # index2 = 0;
677 0000DB89 4d effffffa9d clrl _index2
678 0000DB8F # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
679 0000DB8F L304:
680 0000DB8F 0d effffffa97 50 movl _index2,r0
681 0000DB96 0d effffffa90 51 movl _index2,r1
682 0000DB9D 1d 40effffffa88 cmpl _load_regs[r0],_store_regs[r1]
41effffffa82
683 0000DBAA 21 11 jneq L305
684 0000DBAC 1d effffffa7a 0d cmpl _index2,$13
685 0000DBB3 81 08 jgeq L305
686 0000DBB5 # index2++; /* check reg values */
687 0000DBB5 6d effffffa71 incl _index2
688 0000DBBB 11 d2 jbr L304
689 0000DBBD L305:
690 0000DBBD # if( index2 < 13 ) { /* error if index2 < 13 */
691 0000DBBD 1d effffffa69 0d cmpl _index2,$13
692 0000DBC4 91 03 13 00ba jgeq L306
693 0000DBC9 # errcnt++; /* bump the error count */
694 0000DBC9 6d effffffa5d incl _errcnt
695 0000DBCF # if( prt_error ) {
696 0000DBCF 5d effffffa57 tstl _prt_error
697 0000DBD5 21 03 13 0086 jeql L307
698 0000DBDA # print_addf_er_hdr();
699 0000DBDA fe 04 ef0000030b callf $4,_print_addf_er_hdr
700 0000DBE1 # writes(" - A REGISTER WAS MODIFIED\n");
701 0000DBE1 .data 1
702 00000b32 * L308:
703 00000b32 * 202D204120524547495354455 .ascii " - A REGISTER WAS MODIFIED\12\0"
220574153204D4F4449464945
440A00
704 00000b4e * .text
705 0000DBE1 dd 8f00000b32 pushl $L308
706 0000DBE7 fe 08 effffffa3e callf $8,_writes
707 0000DBEE # print_addf_data();
708 0000DBEE fe 04 ef00000359 callf $4,_print_addf_data
709 0000DBF5 # writes("register "); /* print the information */
710 0000DBF5 .data 1
711 00000b4e * L309:
712 00000b4e * 72656769737465722000 .ascii "register \0"
713 00000b58 * .text
714 0000DBF5 dd 8f00000b4e pushl $L309
715 0000DBFB fe 08 effffffa2a callf $8,_writes
716 0000DC02 # writed( index2 ); /* about the corrupted */
717 0000DC02 dd effffffa24 pushl _index2
718 0000DC08 fe 08 effffffa1d callf $8,_writed
719 0000DC0F # writes(" = "); /* register */
720 0000DC0F .data 1
721 00000b58 * L311:
722 00000b58 * 203D2000 .ascii " = \0"
723 00000b5c * .text
724 0000DC0F dd 8f00000b58 pushl $L311
725 0000DC15 fe 08 effffffa10 callf $8,_writes
726 0000DC1C # write32h( store_regs[index2] );
727 0000DC1C 0d effffffa0a 50 movl _index2,r0
728 0000DC23 dd 40effffffa02 pushl _store_regs[r0]
729 0000DC2A fe 08 effffff9fb callf $8,_write32h
730 0000DC31 # writes(", should be = ");
731 0000DC31 .data 1
732 00000b5c * L313:
733 00000b5c * 2C202073686F756C642062652 .ascii ", should be = \0"
03D2000
734 00000b6c * .text
735 0000DC31 dd 8f00000b5c pushl $L313
736 0000DC37 fe 08 effffff9ee callf $8,_writes
737 0000DC3E # write32h( load_regs[index2] );
738 0000DC3E 0d effffff9e8 50 movl _index2,r0
739 0000DC45 dd 40effffff9e0 pushl _load_regs[r0]
740 0000DC4C fe 08 effffff9d9 callf $8,_write32h
741 0000DC53 # writes("\n");
742 0000DC53 .data 1
743 00000b6c * L314:
744 00000b6c * 0A00 .ascii "\12\0"
745 00000b6e * .text
746 0000DC53 dd 8f00000b6c pushl $L314
747 0000DC59 fe 08 effffff9cc callf $8,_writes
748 0000DC60 # }
749 0000DC60 # if( halt_flg )
750 0000DC60 L307:
751 0000DC60 5d effffff9c6 tstl _halt_flg
752 0000DC66 31 09 jeql L315
753 0000DC68 # addf_er_halt( BAD_REG_HLT ); /* halt on the error */
754 0000DC68 dd 02 pushl $2
755 0000DC6A fe 08 ef0000037b callf $8,_addf_er_halt
756 0000DC71 # if( loop_on_err ) {
757 0000DC71 L315:
758 0000DC71 5d effffff9b5 tstl _loop_on_err
759 0000DC77 31 0a jeql L316
760 0000DC79 # force_loop = TRUE; /* set the force loop flag */
761 0000DC79 0d 01 effffff9ac movl $1,_force_loop
762 0000DC80 # asm("brw _addf_6_lp1");; /* and loop on the error */
763 0000DC80 13 fed5 brw _addf_6_lp1
764 0000DC83 # } /* end of loop on error */
765 0000DC83 # } /* end of register corruption error */
766 0000DC83 L316:
767 0000DC83 # } /* end of subtest 6 */
768 0000DC83 L306:
769 0000DC83 40 ret#2
770 0000DC84 .set L298,0x0
771 0000DC84 L300:
772 0000DC84 13 fe90 jbr L301
773 0000DC87 .data
774 00000a78 * .text
775 0000DC87 00 .align 1
776 0000DC88 .globl _addf_7
777 0000DC88 _addf_7:
778 0000DC88 0000 .word L317
779 0000DC8A #
780 0000DC8A #
781 0000DC8A #
782 0000DC8A # /************************************************************************
783 0000DC8A # *
784 0000DC8A # * SUBTEST 7 - Check for PSL corruption
785 0000DC8A # *
786 0000DC8A # ************************************************************************/
787 0000DC8A # addf_7()
788 0000DC8A # {
789 0000DC8A 13 0174 jbr L319
790 0000DC8D L320:
791 0000DC8D # force_loop = FALSE; /* clear force_loop flg */
792 0000DC8D 4d effffff999 clrl _force_loop
793 0000DC93 # subtest = 7;
794 0000DC93 0d 07 effffff992 movl $7,_subtest
795 0000DC9A # fill_reg_buf( load_regs ); /* get patterns for regs */
796 0000DC9A dd 8f00000000 pushl $_load_regs
797 0000DCA0 fe 08 effffff985 callf $8,_fill_reg_buf
798 0000DCA7 # for( index = 0; index < 3; index++ ) {
799 0000DCA7 4d effffff97f clrl _index
800 0000DCAD L323:
801 0000DCAD 1d effffff979 03 cmpl _index,$3
802 0000DCB4 91 03 13 0147 jgeq L322
803 0000DCB9 # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
804 0000DCB9 5c 0c effffff96c 50 mull3 $12,_index,r0
805 0000DCC1 0d e000000000 effffff960 movl _addf_1_data(r0),_sgl_ld_acc
806 0000DCCC # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
807 0000DCCC 5c 0c effffff959 50 mull3 $12,_index,r0
808 0000DCD4 0d e000000004 effffff94d movl _addf_1_data+4(r0),_sgl_value_1
809 0000DCDF # sgl_expected = addf_1_data[index].exp; /* get expected */
810 0000DCDF 5c 0c effffff946 50 mull3 $12,_index,r0
811 0000DCE7 0d e000000008 effffff93a movl _addf_1_data+8(r0),_sgl_expected
812 0000DCF2 # sgl_dummy1 = status_array[index]; /* status = +, -, 0 */
813 0000DCF2 0d effffff934 50 movl _index,r0
814 0000DCF9 0d 40effffff92c movl _status_array[r0],_sgl_dummy1
effffff927
815 0000DD05 # /*
816 0000DD05 # * If LOOP ON ERROR is set, this is the loop for this subtest.
817 0000DD05 # * The force loop flag is set after the first error.
818 0000DD05 # */
819 0000DD05 # asm("_addf_7_lp1:");
820 0000DD05 _addf_7_lp1:
821 0000DD05 # asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */
822 0000DD05 06 effffff921 ldf _sgl_ld_acc
823 0000DD0B # asm("nop");
824 0000DD0B 10 nop
825 0000DD0C # asm("tstl _sgl_dummy1"); /* set the PSL status */
826 0000DD0C 5d effffff91a tstl _sgl_dummy1
827 0000DD12 # asm("movpsl _init_psl"); /* save the initial PSL */
828 0000DD12 cd effffff914 movpsl _init_psl
829 0000DD18 # asm("addf _sgl_value_1"); /* do the add */
830 0000DD18 c6 effffff90e addf _sgl_value_1
831 0000DD1E # asm("nop");
832 0000DD1E 10 nop
833 0000DD1F # asm("movpsl _psl_val"); /* save the final PSL */
834 0000DD1F cd effffff907 movpsl _psl_val
835 0000DD25 # asm("stf _sgl_st_acc"); /* save the accumulator */
836 0000DD25 26 effffff901 stf _sgl_st_acc
837 0000DD2B # if( force_loop )
838 0000DD2B 5d effffff8fb tstl _force_loop
839 0000DD31 31 02 jeql L324
840 0000DD33 # asm("brb _addf_7_lp1");; /* loop on the error */
841 0000DD33 11 d0 brb _addf_7_lp1
842 0000DD35 L324:
843 0000DD35 # /*
844 0000DD35 # * Now compare the final PSL to the initial PSL -they should be the same
845 0000DD35 # */
846 0000DD35 # exp_psl = init_psl;
847 0000DD35 0d effffff8f1 effffff8ec movl _init_psl,_exp_psl
848 0000DD40 # if( psl_val != exp_psl ) {
849 0000DD40 1d effffff8e6 effffff8e1 cmpl _psl_val,_exp_psl
850 0000DD4B 21 03 13 00a7 jeql L325
851 0000DD50 # errcnt++; /* bump the error count */
852 0000DD50 6d effffff8d6 incl _errcnt
853 0000DD56 # if( prt_error ) {
854 0000DD56 5d effffff8d0 tstl _prt_error
855 0000DD5C 31 76 jeql L326
856 0000DD5E # print_addf_er_hdr();
857 0000DD5E fe 04 ef00000187 callf $4,_print_addf_er_hdr
858 0000DD65 # writes(" - INCORRECT FINAL PSL\n");
859 0000DD65 .data 1
860 00000b6e * L327:
861 00000b6e * 202D20494E434F52524543542 .ascii " - INCORRECT FINAL PSL\12\0"
046494E414C2050534C0A00
862 00000b86 * .text
863 0000DD65 dd 8f00000b6e pushl $L327
864 0000DD6B fe 08 effffff8ba callf $8,_writes
865 0000DD72 # print_addf_data();
866 0000DD72 fe 04 ef000001d5 callf $4,_print_addf_data
867 0000DD79 # writes("initial PSL = ");
868 0000DD79 .data 1
869 00000b86 * L328:
870 00000b86 * 696E697469616C2050534C203 .ascii "initial PSL = \0"
D2000
871 00000b95 * .text
872 0000DD79 dd 8f00000b86 pushl $L328
873 0000DD7F fe 08 effffff8a6 callf $8,_writes
874 0000DD86 # write32h( init_psl );
875 0000DD86 dd effffff8a0 pushl _init_psl
876 0000DD8C fe 08 effffff899 callf $8,_write32h
877 0000DD93 # writes(", final PSL = ");
878 0000DD93 .data 1
879 00000b95 * L329:
880 00000b95 * 2C2066696E616C2050534C203 .ascii ", final PSL = \0"
D2000
881 00000ba4 * .text
882 0000DD93 dd 8f00000b95 pushl $L329
883 0000DD99 fe 08 effffff88c callf $8,_writes
884 0000DDA0 # write32h( psl_val );
885 0000DDA0 dd effffff886 pushl _psl_val
886 0000DDA6 fe 08 effffff87f callf $8,_write32h
887 0000DDAD # writes(", expected PSL = ");
888 0000DDAD .data 1
889 00000ba4 * L330:
890 00000ba4 * 2C20657870656374656420505 .ascii ", expected PSL = \0"
34C203D2000
891 00000bb6 * .text
892 0000DDAD dd 8f00000ba4 pushl $L330
893 0000DDB3 fe 08 effffff872 callf $8,_writes
894 0000DDBA # write32h( exp_psl );
895 0000DDBA dd effffff86c pushl _exp_psl
896 0000DDC0 fe 08 effffff865 callf $8,_write32h
897 0000DDC7 # writes("\n");
898 0000DDC7 .data 1
899 00000bb6 * L331:
900 00000bb6 * 0A00 .ascii "\12\0"
901 00000bb8 * .text
902 0000DDC7 dd 8f00000bb6 pushl $L331
903 0000DDCD fe 08 effffff858 callf $8,_writes
904 0000DDD4 # }
905 0000DDD4 # if( halt_flg )
906 0000DDD4 L326:
907 0000DDD4 5d effffff852 tstl _halt_flg
908 0000DDDA 31 09 jeql L332
909 0000DDDC # addf_er_halt( BAD_PSL_HLT ); /* halt on the error */
910 0000DDDC dd 03 pushl $3
911 0000DDDE fe 08 ef00000207 callf $8,_addf_er_halt
912 0000DDE5 # if( loop_on_err ) {
913 0000DDE5 L332:
914 0000DDE5 5d effffff841 tstl _loop_on_err
915 0000DDEB 31 0a jeql L333
916 0000DDED # force_loop = TRUE; /* set the force loop flag */
917 0000DDED 0d 01 effffff838 movl $1,_force_loop
918 0000DDF4 # asm("brw _addf_7_lp1");; /* and loop on the error */
919 0000DDF4 13 ff0e brw _addf_7_lp1
920 0000DDF7 # } /* end of loop on error */
921 0000DDF7 # } /* end of PSL corruption error */
922 0000DDF7 L333:
923 0000DDF7 # } /* end of data WHILE loop */
924 0000DDF7 L325:
925 0000DDF7 L321:
926 0000DDF7 6d effffff82f incl _index
927 0000DDFD 13 fead jbr L323
928 0000DE00 L322:
929 0000DE00 # } /* end of subtest 7 */
930 0000DE00 40 ret#2
931 0000DE01 .set L317,0x0
932 0000DE01 L319:
933 0000DE01 13 fe89 jbr L320
934 0000DE04 .data
935 00000a78 * .text
936 0000DE04 .align 1
937 0000DE04 .globl _addf_8
938 0000DE04 _addf_8:
939 0000DE04 0000 .word L334
940 0000DE06 #
941 0000DE06 #
942 0000DE06 #
943 0000DE06 # /************************************************************************
944 0000DE06 # *
945 0000DE06 # * SUBTEST 8 - pipelined entry test
946 0000DE06 # *
947 0000DE06 # ************************************************************************/
948 0000DE06 # addf_8()
949 0000DE06 # {
950 0000DE06 13 00e0 jbr L336
951 0000DE09 L337:
952 0000DE09 # force_loop = FALSE;
953 0000DE09 4d effffff81d clrl _force_loop
954 0000DE0F # subtest = 8;
955 0000DE0F 0d 08 effffff816 movl $8,_subtest
956 0000DE16 # for( index = 0; index < max_addf_1_index; index++ ) {
957 0000DE16 4d effffff810 clrl _index
958 0000DE1C L340:
959 0000DE1C 1d effffff80a effffff805 cmpl _index,_max_addf_1_index
960 0000DE27 91 03 13 00bc jgeq L339
961 0000DE2C # sgl_ld_acc = addf_1_data[index].op_1; /* get operand 1 */
962 0000DE2C 5c 0c effffff7f9 50 mull3 $12,_index,r0
963 0000DE34 0d e000000000 effffff7ed movl _addf_1_data(r0),_sgl_ld_acc
964 0000DE3F # sgl_value_1 = addf_1_data[index].op_2; /* get operand 2 */
965 0000DE3F 5c 0c effffff7e6 50 mull3 $12,_index,r0
966 0000DE47 0d e000000004 effffff7da movl _addf_1_data+4(r0),_sgl_value_1
967 0000DE52 # sgl_expected = addf_1_data[index].exp; /* get expected result */
968 0000DE52 5c 0c effffff7d3 50 mull3 $12,_index,r0
969 0000DE5A 0d e000000008 effffff7c7 movl _addf_1_data+8(r0),_sgl_expected
970 0000DE65 # /*
971 0000DE65 # * If LOOP ON ERROR is set, this is the loop for this subtest.
972 0000DE65 # * The force loop flag is set after the first error.
973 0000DE65 # */
974 0000DE65 # asm("_addf_8_lp1:");
975 0000DE65 _addf_8_lp1:
976 0000DE65 # asm("movl $0,r0"); /* clear r0 */
977 0000DE65 0d 00 50 movl $0,r0
978 0000DE68 # asm("ldf r0"); /* load the Acc. with 0.0 */
979 0000DE68 06 50 ldf r0
980 0000DE6A # asm("addf _sgl_ld_acc"); /* add the 1st operand */
981 0000DE6A c6 effffff7bc addf _sgl_ld_acc
982 0000DE70 # asm("addf _sgl_value_1"); /* add the 2nd operand */
983 0000DE70 c6 effffff7b6 addf _sgl_value_1
984 0000DE76 # asm("stf _sgl_st_acc"); /* store the result */
985 0000DE76 26 effffff7b0 stf _sgl_st_acc
986 0000DE7C # if( force_loop )
987 0000DE7C 5d effffff7aa tstl _force_loop
988 0000DE82 31 02 jeql L341
989 0000DE84 # asm("brb _addf_8_lp1");; /* loop on the error */
990 0000DE84 11 df brb _addf_8_lp1
991 0000DE86 L341:
992 0000DE86 # /*
993 0000DE86 # * end error loop - test the results
994 0000DE86 # */
995 0000DE86 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
996 0000DE86 1d effffff7a0 effffff79b cmpl _sgl_st_acc,_sgl_expected
997 0000DE91 31 4c jeql L342
998 0000DE93 # errcnt++; /* bump the error count */
999 0000DE93 6d effffff793 incl _errcnt
1000 0000DE99 # if( prt_error ) {
1001 0000DE99 5d effffff78d tstl _prt_error
1002 0000DE9F 31 1b jeql L343
1003 0000DEA1 # print_addf_er_hdr();
1004 0000DEA1 fe 04 ef00000044 callf $4,_print_addf_er_hdr
1005 0000DEA8 # writes(" (Piped Entry) - BAD FINAL ACC\n");
1006 0000DEA8 .data 1
1007 00000bb8 * L344:
1008 00000bb8 * 2028506970656420456E74727 .ascii " (Piped Entry) - BAD FINAL ACC\12\0"
929202D204241442046494E41
4C204143430A00
1009 00000bd8 * .text
1010 0000DEA8 dd 8f00000bb8 pushl $L344
1011 0000DEAE fe 08 effffff777 callf $8,_writes
1012 0000DEB5 # print_addf_data();
1013 0000DEB5 fe 04 ef00000092 callf $4,_print_addf_data
1014 0000DEBC # }
1015 0000DEBC # if( halt_flg )
1016 0000DEBC L343:
1017 0000DEBC 5d effffff76a tstl _halt_flg
1018 0000DEC2 31 09 jeql L345
1019 0000DEC4 # addf_er_halt( BAD_ACC_HLT ); /* halt on the error */
1020 0000DEC4 dd 01 pushl $1
1021 0000DEC6 fe 08 ef0000011f callf $8,_addf_er_halt
1022 0000DECD # if( loop_on_err ) {
1023 0000DECD L345:
1024 0000DECD 5d effffff759 tstl _loop_on_err
1025 0000DED3 31 0a jeql L346
1026 0000DED5 # force_loop = TRUE; /* set the force loop flag */
1027 0000DED5 0d 01 effffff750 movl $1,_force_loop
1028 0000DEDC # asm("brw _addf_8_lp1"); /* and loop on the error */
1029 0000DEDC 13 ff86 brw _addf_8_lp1
1030 0000DEDF # } /* end of loop on error */
1031 0000DEDF # } /* end of compare error */
1032 0000DEDF L346:
1033 0000DEDF # } /* end of data While loop */
1034 0000DEDF L342:
1035 0000DEDF L338:
1036 0000DEDF 6d effffff747 incl _index
1037 0000DEE5 13 ff34 jbr L340
1038 0000DEE8 L339:
1039 0000DEE8 # } /* end of subtest 8 */
1040 0000DEE8 40 ret#2
1041 0000DEE9 .set L334,0x0
1042 0000DEE9 L336:
1043 0000DEE9 13 ff1d jbr L337
1044 0000DEEC .data
1045 00000a78 * .text
1046 0000DEEC .align 1
1047 0000DEEC .globl _print_addf_er_hdr
1048 0000DEEC _print_addf_er_hdr:
1049 0000DEEC 0000 .word L347
1050 0000DEEE #
1051 0000DEEE #
1052 0000DEEE #
1053 0000DEEE # /**************************************************************************
1054 0000DEEE # *
1055 0000DEEE # * PRINT THE ERROR HEADER
1056 0000DEEE # *
1057 0000DEEE # **************************************************************************/
1058 0000DEEE # print_addf_er_hdr()
1059 0000DEEE # {
1060 0000DEEE 11 5c jbr L349
1061 0000DEF0 L350:
1062 0000DEF0 # writes(" \n"); /* start a new print line */
1063 0000DEF0 .data 1
1064 00000bd8 * L351:
1065 00000bd8 * 200A00 .ascii " \12\0"
1066 00000bdb * .text
1067 0000DEF0 dd 8f00000bd8 pushl $L351
1068 0000DEF6 fe 08 effffff72f callf $8,_writes
1069 0000DEFD # writes("cycle: "); /* print the cycle count */
1070 0000DEFD .data 1
1071 00000bdb * L352:
1072 00000bdb * 6379636C653A2000 .ascii "cycle: \0"
1073 00000be3 * .text
1074 0000DEFD dd 8f00000bdb pushl $L352
1075 0000DF03 fe 08 effffff722 callf $8,_writes
1076 0000DF0A # writed( cycle );
1077 0000DF0A dd effffff71c pushl _cycle
1078 0000DF10 fe 08 effffff715 callf $8,_writed
1079 0000DF17 # writes(" ADDF test "); /* print the test number */
1080 0000DF17 .data 1
1081 00000be3 * L353:
1082 00000be3 * 2020414444462074657374200 .ascii " ADDF test \0"
0
1083 00000bf0 * .text
1084 0000DF17 dd 8f00000be3 pushl $L353
1085 0000DF1D fe 08 effffff708 callf $8,_writes
1086 0000DF24 # writed( test_no );
1087 0000DF24 dd effffff702 pushl _test_no
1088 0000DF2A fe 08 effffff6fb callf $8,_writed
1089 0000DF31 # writes(", subtest "); /* print the subtest no. */
1090 0000DF31 .data 1
1091 00000bf0 * L354:
1092 00000bf0 * 2C20737562746573742000 .ascii ", subtest \0"
1093 00000bfb * .text
1094 0000DF31 dd 8f00000bf0 pushl $L354
1095 0000DF37 fe 08 effffff6ee callf $8,_writes
1096 0000DF3E # writed( subtest );
1097 0000DF3E dd effffff6e8 pushl _subtest
1098 0000DF44 fe 08 effffff6e1 callf $8,_writed
1099 0000DF4B # }
1100 0000DF4B 40 ret#2
1101 0000DF4C .set L347,0x0
1102 0000DF4C L349:
1103 0000DF4C 11 a2 jbr L350
1104 0000DF4E .data
1105 00000a78 * .text
1106 0000DF4E .align 1
1107 0000DF4E .globl _print_addf_data
1108 0000DF4E _print_addf_data:
1109 0000DF4E 0000 .word L355
1110 0000DF50 #
1111 0000DF50 #
1112 0000DF50 #
1113 0000DF50 # /**************************************************************************
1114 0000DF50 # *
1115 0000DF50 # * PRINT THE DATA AND STORE RESULTS
1116 0000DF50 # *
1117 0000DF50 # * initial Acc = xxxxxxxx, stored = xxxxxxxx, data index = xx
1118 0000DF50 # * operand = xxxxxxxx, expected = xxxxxxxx
1119 0000DF50 # **************************************************************************/
1120 0000DF50 # print_addf_data()
1121 0000DF50 # {
1122 0000DF50 13 0095 jbr L357
1123 0000DF53 L358:
1124 0000DF53 # writes("initial Acc = ");
1125 0000DF53 .data 1
1126 00000bfb * L359:
1127 00000bfb * 696E697469616C20416363203 .ascii "initial Acc = \0"
D2000
1128 00000c0a * .text
1129 0000DF53 dd 8f00000bfb pushl $L359
1130 0000DF59 fe 08 effffff6cc callf $8,_writes
1131 0000DF60 # write32h( sgl_ld_acc );
1132 0000DF60 dd effffff6c6 pushl _sgl_ld_acc
1133 0000DF66 fe 08 effffff6bf callf $8,_write32h
1134 0000DF6D # writes(", stored = ");
1135 0000DF6D .data 1
1136 00000c0a * L360:
1137 00000c0a * 2C2020202073746F726564203 .ascii ", stored = \0"
D2000
1138 00000c19 * .text
1139 0000DF6D dd 8f00000c0a pushl $L360
1140 0000DF73 fe 08 effffff6b2 callf $8,_writes
1141 0000DF7A # write32h( sgl_st_acc );
1142 0000DF7A dd effffff6ac pushl _sgl_st_acc
1143 0000DF80 fe 08 effffff6a5 callf $8,_write32h
1144 0000DF87 # writes(", data index = ");
1145 0000DF87 .data 1
1146 00000c19 * L361:
1147 00000c19 * 2C20206461746120696E64657 .ascii ", data index = \0"
8203D2000
1148 00000c2a * .text
1149 0000DF87 dd 8f00000c19 pushl $L361
1150 0000DF8D fe 08 effffff698 callf $8,_writes
1151 0000DF94 # writed( index );
1152 0000DF94 dd effffff692 pushl _index
1153 0000DF9A fe 08 effffff68b callf $8,_writed
1154 0000DFA1 # writec('\n');
1155 0000DFA1 dd 0a pushl $10
1156 0000DFA3 fe 08 effffff682 callf $8,_writec
1157 0000DFAA # writes(" operand = ");
1158 0000DFAA .data 1
1159 00000c2a * L363:
1160 00000c2a * 202020206F706572616E64203 .ascii " operand = \0"
D2000
1161 00000c39 * .text
1162 0000DFAA dd 8f00000c2a pushl $L363
1163 0000DFB0 fe 08 effffff675 callf $8,_writes
1164 0000DFB7 # write32h( sgl_value_1 );
1165 0000DFB7 dd effffff66f pushl _sgl_value_1
1166 0000DFBD fe 08 effffff668 callf $8,_write32h
1167 0000DFC4 # writes(", expected = ");
1168 0000DFC4 .data 1
1169 00000c39 * L364:
1170 00000c39 * 2C20206578706563746564203 .ascii ", expected = \0"
D2000
1171 00000c48 * .text
1172 0000DFC4 dd 8f00000c39 pushl $L364
1173 0000DFCA fe 08 effffff65b callf $8,_writes
1174 0000DFD1 # write32h( sgl_expected );
1175 0000DFD1 dd effffff655 pushl _sgl_expected
1176 0000DFD7 fe 08 effffff64e callf $8,_write32h
1177 0000DFDE # writec('\n');
1178 0000DFDE dd 0a pushl $10
1179 0000DFE0 fe 08 effffff645 callf $8,_writec
1180 0000DFE7 # }
1181 0000DFE7 40 ret#2
1182 0000DFE8 .set L355,0x0
1183 0000DFE8 L357:
1184 0000DFE8 13 ff68 jbr L358
1185 0000DFEB .data
1186 00000a78 * .text
1187 0000DFEB 00 .align 1
1188 0000DFEC .globl _addf_er_halt
1189 0000DFEC _addf_er_halt:
1190 0000DFEC 0000 .word L365
1191 0000DFEE #
1192 0000DFEE #
1193 0000DFEE #
1194 0000DFEE # /**************************************************************************
1195 0000DFEE # *
1196 0000DFEE # * HALT ON ERROR ROUTINE
1197 0000DFEE # *
1198 0000DFEE # **************************************************************************/
1199 0000DFEE # addf_er_halt( halt_code )
1200 0000DFEE # int halt_code;
1201 0000DFEE # {
1202 0000DFEE 13 00af jbr L367
1203 0000DFF1 L368:
1204 0000DFF1 # sgl_dummy1 = halt_code; /* get the error type */
1205 0000DFF1 0d ad04 effffff633 movl 4(fp),_sgl_dummy1
1206 0000DFF9 # asm("movl _test_no,r0"); /* r0 = test number */
1207 0000DFF9 0d effffff62d 50 movl _test_no,r0
1208 0000E000 # asm("movl _subtest,r1"); /* r1 = subtest number */
1209 0000E000 0d effffff626 51 movl _subtest,r1
1210 0000E007 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1211 0000E007 0d effffff61f 52 movl _sgl_dummy1,r2
1212 0000E00E # asm("movl _cycle,r3"); /* r3 = cycle count */
1213 0000E00E 0d effffff618 53 movl _cycle,r3
1214 0000E015 # asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */
1215 0000E015 0d effffff611 54 movl _sgl_ld_acc,r4
1216 0000E01C # asm("movl _sgl_value_1,r5"); /* r5 = data added */
1217 0000E01C 0d effffff60a 55 movl _sgl_value_1,r5
1218 0000E023 # asm("movl _sgl_st_acc,r6"); /* r6 = data stored */
1219 0000E023 0d effffff603 56 movl _sgl_st_acc,r6
1220 0000E02A # if( halt_code == BAD_ACC_HLT ) {
1221 0000E02A 1d ad04 01 cmpl 4(fp),$1
1222 0000E02E 21 10 jneq L369
1223 0000E030 # asm("movl _sgl_expected,r7"); /* r7 = data expected */
1224 0000E030 0d effffff5f6 57 movl _sgl_expected,r7
1225 0000E037 # asm("movl _index,r8"); /* r8 = data index */
1226 0000E037 0d effffff5ef 58 movl _index,r8
1227 0000E03E # } else
1228 0000E03E 11 5e jbr L370
1229 0000E040 L369:
1230 0000E040 # if( halt_code == BAD_REG_HLT ) {
1231 0000E040 1d ad04 02 cmpl 4(fp),$2
1232 0000E044 21 3d jneq L371
1233 0000E046 # sgl_dummy1 = load_regs[index2];
1234 0000E046 0d effffff5e0 50 movl _index2,r0
1235 0000E04D 0d 40effffff5d8 movl _load_regs[r0],_sgl_dummy1
effffff5d3
1236 0000E059 # sgl_dummy2 = store_regs[index2];
1237 0000E059 0d effffff5cd 50 movl _index2,r0
1238 0000E060 0d 40effffff5c5 movl _store_regs[r0],_sgl_dummy2
effffff5c0
1239 0000E06C # asm("movl _index2,r7"); /* r7 = bad register # */
1240 0000E06C 0d effffff5ba 57 movl _index2,r7
1241 0000E073 # asm("movl _sgl_dummy2,r8"); /* r8 = actual value */
1242 0000E073 0d effffff5b3 58 movl _sgl_dummy2,r8
1243 0000E07A # asm("movl _sgl_dummy1,r9"); /* r9 = expected value */
1244 0000E07A 0d effffff5ac 59 movl _sgl_dummy1,r9
1245 0000E081 # } else
1246 0000E081 11 1b jbr L372
1247 0000E083 L371:
1248 0000E083 # if( halt_code == BAD_PSL_HLT ) {
1249 0000E083 1d ad04 03 cmpl 4(fp),$3
1250 0000E087 21 15 jneq L373
1251 0000E089 # asm("movl _init_psl,r7"); /* r7 = initial PSL */
1252 0000E089 0d effffff59d 57 movl _init_psl,r7
1253 0000E090 # asm("movl _psl_val,r8"); /* r8 = final PSL */
1254 0000E090 0d effffff596 58 movl _psl_val,r8
1255 0000E097 # asm("movl _exp_psl,r9"); /* r9 = expected PSL */
1256 0000E097 0d effffff58f 59 movl _exp_psl,r9
1257 0000E09E # };
1258 0000E09E L373:
1259 0000E09E L372:
1260 0000E09E L370:
1261 0000E09E # asm("halt"); /* HALT ... */
1262 0000E09E 00 halt
1263 0000E09F # }
1264 0000E09F 40 ret#2
1265 0000E0A0 .set L365,0x0
1266 0000E0A0 L367:
1267 0000E0A0 13 ff4e jbr L368
1268 0000E0A3 .data
1268 0001B6CF .data
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