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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
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1.1 root 1: 1 00000000 LL0:
2: 2 00000000 .data
3: 3 000002ec * .text
4: 4 00000000 .align 1
5: 5 00000000 .globl _reserved_address
6: 6 00000000 _reserved_address:
7: Symbol _reserved_add not found ---
8: 7 00000000 0000 .word L215
9: 8 00000002 # #include "fpp_defs.h"
10: 9 00000002 #
11: 10 00000002 #
12: 11 00000002 #
13: 12 00000002 # /****************************************************************************
14: 13 00000002 # * Floating Point Test RESERVED_ADDRESS FAULT Handler
15: 14 00000002 # *
16: 15 00000002 # * The only way to this code is via an RESERVED ADDRESS fault and the
17: 16 00000002 # * EVENT handler. The fault may or may not be expected.
18: 17 00000002 # *
19: 18 00000002 # * 13-Feb-85 JJM: removed the messages from here & made code prettier
20: 19 00000002 # ****************************************************************************/
21: 20 00000002 # reserved_address()
22: 21 00000002 # {
23: Symbol _reserved_add not found ---
24: 22 00000002 13 0228 jbr L217
25: 23 00000005 L218:
26: 24 00000005 # asm(".globl _res_addr_handler"); /* entry point */
27: 25 00000005 .globl _res_addr_handler
28: 26 00000005 # asm("_res_addr_handler:");
29: 27 00000005 _res_addr_handler:
30: 28 00000005 # asm("movl _pre_event_fp,r13"); /* set the frame pointer */
31: 29 0000BD4C 0d effffffff5 5d movl _pre_event_fp,r13
32: 30 0000BD53 # if( address_fault_expected )
33: 31 0000BD53 5d efffffffee tstl _address_fault_expected
34: 32 0000BD59 21 03 13 0166 jeql L219
35: 33 0000BD5E # {
36: 34 0000BD5E # asm("movl _post_event_sp,r14"); /* point SP to stack data */
37: 35 0000BD5E 0d efffffffe3 5e movl _post_event_sp,r14
38: 36 0000BD65 # asm("movl (sp)+,_pop_val_1"); /* pop the PC of the instr. */
39: 37 0000BD65 0d 8e efffffffdb movl (sp)+,_pop_val_1
40: 38 0000BD6C # asm("movl (sp)+,_pop_val_2"); /* pop the pushed PSL */
41: 39 0000BD6C 0d 8e efffffffd4 movl (sp)+,_pop_val_2
42: 40 0000BD73 # asm("movl _pre_event_sp,r14"); /* restore stack_pointer */
43: 41 0000BD73 0d efffffffce 5e movl _pre_event_sp,r14
44: 42 0000BD7A # /*
45: 43 0000BD7A # * check the data on the stack
46: 44 0000BD7A # */
47: 45 0000BD7A # if( (pop_val_1 != exp_pc) || /* expected PC ? */
48: 46 0000BD7A # (pop_val_2 != exp_psl) ) /* expected PSL ? */
49: 47 0000BD7A 1d efffffffc7 efffffffc2 cmpl _pop_val_1,_exp_pc
50: 48 0000BD85 21 10 jneq L9999
51: 49 0000BD87 1d efffffffba efffffffb5 cmpl _pop_val_2,_exp_psl
52: 50 0000BD92 21 03 13 012a jeql L220
53: 51 0000BD97 L9999:
54: 52 0000BD97 # {
55: 53 0000BD97 # errcnt++; /* bump the error count */
56: 54 0000BD97 6d efffffffaa incl _errcnt
57: 55 0000BD9D # if( prt_error )
58: 56 0000BD9D 5d efffffffa4 tstl _prt_error
59: 57 0000BDA3 21 03 13 00cb jeql L221
60: 58 0000BDA8 # {
61: 59 0000BDA8 # writes("\ncyle: ");
62: 60 0000BDA8 .data 1
63: 61 000002ec * L223:
64: 62 000002ec * 0A63796C653A2000 .ascii "\12cyle: \0"
65: 63 000002f4 * .text
66: 64 0000BDA8 dd 8f000002ec pushl $L223
67: 65 0000BDAE fe 08 efffffff92 callf $8,_writes
68: 66 0000BDB5 # writed( cycle );
69: 67 0000BDB5 dd efffffff8c pushl _cycle
70: 68 0000BDBB fe 08 efffffff85 callf $8,_writed
71: 69 0000BDC2 # writes(" FPP - ");
72: 70 0000BDC2 .data 1
73: 71 000002f4 * L225:
74: 72 000002f4 * 20465050202D2000 .ascii " FPP - \0"
75: 73 000002fc * .text
76: 74 0000BDC2 dd 8f000002f4 pushl $L225
77: 75 0000BDC8 fe 08 efffffff78 callf $8,_writes
78: 76 0000BDCF # writeh( test_no );
79: 77 0000BDCF dd efffffff72 pushl _test_no
80: 78 0000BDD5 fe 08 efffffff6b callf $8,_writeh
81: 79 0000BDDC # writes(" - invalid stack after Reserved Addr fault");
82: 80 0000BDDC .data 1
83: 81 000002fc * L227:
84: 82 000002fc * 202D20696E76616C696420737 .ascii " - invalid stack after Reserved Addr fault\0"
85: 461636B206166746572205265
86: 7365727665642041646472206
87: 661756C7400
88: 83 00000327 * .text
89: 84 0000BDDC dd 8f000002fc pushl $L227
90: 85 0000BDE2 fe 08 efffffff5e callf $8,_writes
91: 86 0000BDE9 # writes("\n addressing mode = ");
92: 87 0000BDE9 .data 1
93: 88 00000327 * L228:
94: 89 00000327 * 0A2061646472657373696E672 .ascii "\12 addressing mode = \0"
95: 06D6F6465203D2000
96: 90 0000033c * .text
97: 91 0000BDE9 dd 8f00000327 pushl $L228
98: 92 0000BDEF fe 08 efffffff51 callf $8,_writes
99: 93 0000BDF6 # writes( addressing_modes[addr_mode] );
100: 94 0000BDF6 0d efffffff4b 50 movl _addr_mode,r0
101: 95 0000BDFD dd 40efffffff43 pushl _addressing_modes[r0]
102: 96 0000BE04 fe 08 efffffff3c callf $8,_writes
103: 97 0000BE0B # writes("\n stack PC = ");
104: 98 0000BE0B .data 1
105: 99 0000033c * L229:
106: 100 0000033c * 0A20737461636B205043203D2 .ascii "\12 stack PC = \0"
107: 000
108: 101 0000034a * .text
109: 102 0000BE0B dd 8f0000033c pushl $L229
110: 103 0000BE11 fe 08 efffffff2f callf $8,_writes
111: 104 0000BE18 # write32h( pop_val_1 );
112: 105 0000BE18 dd efffffff29 pushl _pop_val_1
113: 106 0000BE1E fe 08 efffffff22 callf $8,_write32h
114: 107 0000BE25 # writes(", PSL = ");
115: 108 0000BE25 .data 1
116: 109 0000034a * L231:
117: 110 0000034a * 2C2050534C203D2000 .ascii ", PSL = \0"
118: 111 00000353 * .text
119: 112 0000BE25 dd 8f0000034a pushl $L231
120: 113 0000BE2B fe 08 efffffff15 callf $8,_writes
121: 114 0000BE32 # write32h( pop_val_2 );
122: 115 0000BE32 dd efffffff0f pushl _pop_val_2
123: 116 0000BE38 fe 08 efffffff08 callf $8,_write32h
124: 117 0000BE3F # writes(", exp PC = ");
125: 118 0000BE3F .data 1
126: 119 00000353 * L232:
127: 120 00000353 * 2C202020657870205043203D2 .ascii ", exp PC = \0"
128: 000
129: 121 00000361 * .text
130: 122 0000BE3F dd 8f00000353 pushl $L232
131: 123 0000BE45 fe 08 effffffefb callf $8,_writes
132: 124 0000BE4C # write32h( exp_pc );
133: 125 0000BE4C dd effffffef5 pushl _exp_pc
134: 126 0000BE52 fe 08 effffffeee callf $8,_write32h
135: 127 0000BE59 # writes(", PSL = ");
136: 128 0000BE59 .data 1
137: 129 00000361 * L233:
138: 130 00000361 * 2C202050534C203D2000 .ascii ", PSL = \0"
139: 131 0000036b * .text
140: 132 0000BE59 dd 8f00000361 pushl $L233
141: 133 0000BE5F fe 08 effffffee1 callf $8,_writes
142: 134 0000BE66 # write32h( exp_psl );
143: 135 0000BE66 dd effffffedb pushl _exp_psl
144: 136 0000BE6C fe 08 effffffed4 callf $8,_write32h
145: 137 0000BE73 # }
146: 138 0000BE73 # if ( halt_flg ) /* if halt on error */
147: 139 0000BE73 L221:
148: 140 0000BE73 5d effffffece tstl _halt_flg
149: 141 0000BE79 31 31 jeql L234
150: 142 0000BE7B # {
151: 143 0000BE7B # asm("movl _test_no,r0"); /* r0 = test number */
152: 144 0000BE7B 0d effffffec6 50 movl _test_no,r0
153: 145 0000BE82 # asm("movl $0,r1"); /* r1 = 0 (subtest number) */
154: 146 0000BE82 0d 00 51 movl $0,r1
155: 147 0000BE85 # asm("movl $1,r2"); /* r2 = error code */
156: 148 0000BE85 0d 01 52 movl $1,r2
157: 149 0000BE88 # asm("movl _cycle,r3"); /* r3 = cycle count */
158: 150 0000BE88 0d effffffeb9 53 movl _cycle,r3
159: 151 0000BE8F # asm("movl _pop_val_1,r4"); /* r4 = actual PC on stack */
160: 152 0000BE8F 0d effffffeb2 54 movl _pop_val_1,r4
161: 153 0000BE96 # asm("movl _pop_val_2,r5"); /* r5 = actual PSL on stck */
162: 154 0000BE96 0d effffffeab 55 movl _pop_val_2,r5
163: 155 0000BE9D # asm("movl _exp_pc,r6"); /* r6 = expected PC */
164: 156 0000BE9D 0d effffffea4 56 movl _exp_pc,r6
165: 157 0000BEA4 # asm("movl _exp_psl,r7"); /* r7 = expected PSL */
166: 158 0000BEA4 0d effffffe9d 57 movl _exp_psl,r7
167: 159 0000BEAB # asm("_resaddr_hlt_1:"); /* PC after the halt */
168: 160 0000BEAB _resaddr_hlt_1:
169: 161 0000BEAB # asm("halt"); /* HALT ... */
170: 162 0000BEAB 00 halt
171: 163 0000BEAC # }
172: 164 0000BEAC # if( loop_on_err )
173: 165 0000BEAC L234:
174: 166 0000BEAC 5d effffffe95 tstl _loop_on_err
175: 167 0000BEB2 31 0d jeql L235
176: 168 0000BEB4 # {
177: 169 0000BEB4 # force_loop = TRUE; /* set the forced loop flag */
178: 170 0000BEB4 0d 01 effffffe8c movl $1,_force_loop
179: 171 0000BEBB # asm("jmp *_loop_addr"); /* and go loop */
180: 172 0000BEBB 71 fffffffe86 jmp *_loop_addr
181: 173 0000BEC1 # }
182: 174 0000BEC1 # } /* end of stack data error */
183: 175 0000BEC1 L235:
184: 176 0000BEC1 # }
185: 177 0000BEC1 L220:
186: 178 0000BEC1 # else /* the address fault was not expected */
187: 179 0000BEC1 13 00a9 jbr L236
188: 180 0000BEC4 L219:
189: 181 0000BEC4 # {
190: 182 0000BEC4 # errcnt++; /* increment the error count */
191: 183 0000BEC4 6d effffffe7d incl _errcnt
192: 184 0000BECA # if( prt_error )
193: 185 0000BECA 5d effffffe77 tstl _prt_error
194: 186 0000BED0 31 63 jeql L237
195: 187 0000BED2 # {
196: 188 0000BED2 # writes("\ncyle: ");
197: 189 0000BED2 .data 1
198: 190 0000036b * L238:
199: 191 0000036b * 0A63796C653A2000 .ascii "\12cyle: \0"
200: 192 00000373 * .text
201: 193 0000BED2 dd 8f0000036b pushl $L238
202: 194 0000BED8 fe 08 effffffe68 callf $8,_writes
203: 195 0000BEDF # writed( cycle );
204: 196 0000BEDF dd effffffe62 pushl _cycle
205: 197 0000BEE5 fe 08 effffffe5b callf $8,_writed
206: 198 0000BEEC # writes(" FPP-");
207: 199 0000BEEC .data 1
208: 200 00000373 * L239:
209: 201 00000373 * 204650502D00 .ascii " FPP-\0"
210: 202 00000379 * .text
211: 203 0000BEEC dd 8f00000373 pushl $L239
212: 204 0000BEF2 fe 08 effffffe4e callf $8,_writes
213: 205 0000BEF9 # writeh( test_no );
214: 206 0000BEF9 dd effffffe48 pushl _test_no
215: 207 0000BEFF fe 08 effffffe41 callf $8,_writeh
216: 208 0000BF06 # writes(" - invalid Reserved Addr fault");
217: 209 0000BF06 .data 1
218: 210 00000379 * L240:
219: 211 00000379 * 202D20696E76616C696420526 .ascii " - invalid Reserved Addr fault\0"
220: 5736572766564204164647220
221: 6661756C7400
222: 212 00000398 * .text
223: 213 0000BF06 dd 8f00000379 pushl $L240
224: 214 0000BF0C fe 08 effffffe34 callf $8,_writes
225: 215 0000BF13 # writes("\n addressing mode = ");
226: 216 0000BF13 .data 1
227: 217 00000398 * L241:
228: 218 00000398 * 0A2061646472657373696E672 .ascii "\12 addressing mode = \0"
229: 06D6F6465203D2000
230: 219 000003ad * .text
231: 220 0000BF13 dd 8f00000398 pushl $L241
232: 221 0000BF19 fe 08 effffffe27 callf $8,_writes
233: 222 0000BF20 # writes( addressing_modes[addr_mode] );
234: 223 0000BF20 0d effffffe21 50 movl _addr_mode,r0
235: 224 0000BF27 dd 40effffffe19 pushl _addressing_modes[r0]
236: 225 0000BF2E fe 08 effffffe12 callf $8,_writes
237: 226 0000BF35 # }
238: 227 0000BF35 # if ( halt_flg ) /* if halt on error */
239: 228 0000BF35 L237:
240: 229 0000BF35 5d effffffe0c tstl _halt_flg
241: 230 0000BF3B 31 1b jeql L242
242: 231 0000BF3D # {
243: 232 0000BF3D # asm("movl _test_no,r0"); /* r0 = test number */
244: 233 0000BF3D 0d effffffe04 50 movl _test_no,r0
245: 234 0000BF44 # asm("clrl r1"); /* r1 = 0 (subtest number) */
246: 235 0000BF44 4d 51 clrl r1
247: 236 0000BF46 # asm("movl $2,r2"); /* r2 = error code */
248: 237 0000BF46 0d 02 52 movl $2,r2
249: 238 0000BF49 # asm("movl _cycle,r3"); /* r3 = cycle count */
250: 239 0000BF49 0d effffffdf8 53 movl _cycle,r3
251: 240 0000BF50 # asm("movl _addr_mode,r4"); /* r4 = addressing mode */
252: 241 0000BF50 0d effffffdf1 54 movl _addr_mode,r4
253: 242 0000BF57 # asm(".globl _resaddr_hlt_2");
254: 243 0000BF57 .globl _resaddr_hlt_2
255: 244 0000BF57 # asm("_resaddr_hlt_2:"); /* PC after the halt */
256: 245 0000BF57 _resaddr_hlt_2:
257: 246 0000BF57 # asm("halt"); /* HALT ... */
258: 247 0000BF57 00 halt
259: 248 0000BF58 # }
260: 249 0000BF58 # if( loop_on_err )
261: 250 0000BF58 L242:
262: 251 0000BF58 5d effffffde9 tstl _loop_on_err
263: 252 0000BF5E 31 0d jeql L243
264: 253 0000BF60 # {
265: 254 0000BF60 # force_loop = TRUE; /* We're going to loop */
266: 255 0000BF60 0d 01 effffffde0 movl $1,_force_loop
267: 256 0000BF67 # asm("jmp *_loop_addr"); /* loop forever */
268: 257 0000BF67 71 fffffffdda jmp *_loop_addr
269: 258 0000BF6D # };
270: 259 0000BF6D L243:
271: 260 0000BF6D # }; /* end of ELSE (unexpected fault) */
272: 261 0000BF6D L236:
273: 262 0000BF6D # asm("jmp *_next_addr"); /* go to the next mode */
274: 263 0000BF6D 71 fffffffdd4 jmp *_next_addr
275: 264 0000BF73 # }
276: 265 0000BF73 40 ret#2
277: 266 0000BF74 .set L215,0x0
278: 267 0000BF74 L217:
279: 268 0000BF74 13 fdd5 jbr L218
280: 269 0000BF77 .data
281: 270 000002ec * .text
282: 271 0000BF77 .align 1
283: 272 0000BF77 .globl _no_res_address
284: 273 0000BF77 _no_res_address:
285: 274 0000BF77 0000 .word L245
286: 275 0000BF79 #
287: 276 0000BF79 #
288: 277 0000BF79 #
289: 278 0000BF79 #
290: 279 0000BF79 #
291: 280 0000BF79 #
292: 281 0000BF79 #
293: 282 0000BF79 #
294: 283 0000BF79 # /****************************************************************************
295: 284 0000BF79 # * No RESERVED_ADDRESS FAULT Occurred routine
296: 285 0000BF79 # *
297: 286 0000BF79 # * The only way to this code is if an expected RESERVED ADDRESS Fault did
298: 287 0000BF79 # * NOT occurr.
299: 288 0000BF79 # ****************************************************************************/
300: 289 0000BF79 # no_res_address()
301: 290 0000BF79 # {
302: 291 0000BF79 13 00b2 jbr L247
303: 292 0000BF7C L248:
304: 293 0000BF7C # asm(".globl _no_res_addr_fault");
305: 294 0000BF7C .globl _no_res_addr_fault
306: 295 0000BF7C # asm("_no_res_addr_fault:"); /* start of "no fault" stuff */
307: 296 0000BF7C _no_res_addr_fault:
308: 297 0000BF7C # errcnt++; /* increment the error count */
309: 298 0000BF7C 6d effffffdc5 incl _errcnt
310: 299 0000BF82 # if( prt_error )
311: 300 0000BF82 5d effffffdbf tstl _prt_error
312: 301 0000BF88 31 63 jeql L249
313: 302 0000BF8A # {
314: 303 0000BF8A # writes("\ncyle: ");
315: 304 0000BF8A .data 1
316: 305 000003ad * L250:
317: 306 000003ad * 0A63796C653A2000 .ascii "\12cyle: \0"
318: 307 000003b5 * .text
319: 308 0000BF8A dd 8f000003ad pushl $L250
320: 309 0000BF90 fe 08 effffffdb0 callf $8,_writes
321: 310 0000BF97 # writed( cycle );
322: 311 0000BF97 dd effffffdaa pushl _cycle
323: 312 0000BF9D fe 08 effffffda3 callf $8,_writed
324: 313 0000BFA4 # writes(" FPP-");
325: 314 0000BFA4 .data 1
326: 315 000003b5 * L251:
327: 316 000003b5 * 204650502D00 .ascii " FPP-\0"
328: 317 000003bb * .text
329: 318 0000BFA4 dd 8f000003b5 pushl $L251
330: 319 0000BFAA fe 08 effffffd96 callf $8,_writes
331: 320 0000BFB1 # writeh( test_no );
332: 321 0000BFB1 dd effffffd90 pushl _test_no
333: 322 0000BFB7 fe 08 effffffd89 callf $8,_writeh
334: 323 0000BFBE # writes(" Expected Reserved Address fault did not occur");
335: 324 0000BFBE .data 1
336: 325 000003bb * L252:
337: 326 000003bb * 2020457870656374656420526 .ascii " Expected Reserved Address fault did not occur\0"
338: 5736572766564204164647265
339: 7373206661756C74206469642
340: 06E6F74206F6363757200
341: 327 000003eb * .text
342: 328 0000BFBE dd 8f000003bb pushl $L252
343: 329 0000BFC4 fe 08 effffffd7c callf $8,_writes
344: 330 0000BFCB # writes("\n Addressing Mode = ");
345: 331 0000BFCB .data 1
346: 332 000003eb * L253:
347: 333 000003eb * 0A2041646472657373696E672 .ascii "\12 Addressing Mode = \0"
348: 04D6F6465203D2000
349: 334 00000400 * .text
350: 335 0000BFCB dd 8f000003eb pushl $L253
351: 336 0000BFD1 fe 08 effffffd6f callf $8,_writes
352: 337 0000BFD8 # writes( addressing_modes[addr_mode] );
353: 338 0000BFD8 0d effffffd69 50 movl _addr_mode,r0
354: 339 0000BFDF dd 40effffffd61 pushl _addressing_modes[r0]
355: 340 0000BFE6 fe 08 effffffd5a callf $8,_writes
356: 341 0000BFED # }
357: 342 0000BFED # if ( halt_flg ) /* if halt on error */
358: 343 0000BFED L249:
359: 344 0000BFED 5d effffffd54 tstl _halt_flg
360: 345 0000BFF3 31 1b jeql L254
361: 346 0000BFF5 # {
362: 347 0000BFF5 # asm("movl _test_no,r0"); /* r0 = test number */
363: 348 0000BFF5 0d effffffd4c 50 movl _test_no,r0
364: 349 0000BFFC # asm("clrl r1"); /* r1 = 0 (subtest number) */
365: 350 0000BFFC 4d 51 clrl r1
366: 351 0000BFFE # asm("movl $3,r2"); /* r2 = error code */
367: 352 0000BFFE 0d 03 52 movl $3,r2
368: 353 0000C001 # asm("movl _cycle,r3"); /* r3 = cycle count */
369: 354 0000C001 0d effffffd40 53 movl _cycle,r3
370: 355 0000C008 # asm("movl _addr_mode,r4"); /* r4 = addressing mode */
371: 356 0000C008 0d effffffd39 54 movl _addr_mode,r4
372: 357 0000C00F # asm("_res_addr_hlt3:"); /* PC after the halt */
373: 358 0000C00F _res_addr_hlt3:
374: 359 0000C00F # asm("halt"); /* HALT ... */
375: 360 0000C00F 00 halt
376: 361 0000C010 # }
377: 362 0000C010 # if( loop_on_err )
378: 363 0000C010 L254:
379: 364 0000C010 5d effffffd31 tstl _loop_on_err
380: 365 0000C016 31 0f jeql L255
381: 366 0000C018 # {
382: 367 0000C018 # force_loop = TRUE; /* We're going to loop */
383: 368 0000C018 0d 01 effffffd28 movl $1,_force_loop
384: 369 0000C01F # asm("jmp *_loop_addr"); /* loop forever */
385: 370 0000C01F 71 fffffffd22 jmp *_loop_addr
386: 371 0000C025 # } else
387: 372 0000C025 11 06 jbr L256
388: 373 0000C027 L255:
389: 374 0000C027 # asm("jmp *_next_addr");; /* go to the next mode */
390: 375 0000C027 71 fffffffd1a jmp *_next_addr
391: 376 0000C02D L256:
392: 377 0000C02D # }
393: 378 0000C02D 40 ret#2
394: 379 0000C02E .set L245,0x0
395: 380 0000C02E L247:
396: 381 0000C02E 13 ff4b jbr L248
397: 382 0000C031 .data
398: 383 000002ec * #
399: 384 000002ec * #
400: 385 000002ec * #
401: 386 000002ec * #
402: 386 000002ec * #
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