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1.1 ! root 1: #include "fpp_defs.h" ! 2: ! 3: ! 4: ! 5: /*************************************************************************** ! 6: * ! 7: * ATANF - SINGLE PRECISION FLOATING POINT ATANF FUNCTION TEST ! 8: * ! 9: * ATANF TEST MONITOR ! 10: * ! 11: *****************************************************************************/ ! 12: atanf() ! 13: { ! 14: asm(".globl _atanf_t"); ! 15: asm("_atanf_t:"); /* entry address */ ! 16: if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */ ! 17: { ! 18: writes(" ATANF"); ! 19: } ! 20: atanf_1(); /* test square root w/ delay */ ! 21: atanf_2(); /* test square root */ ! 22: atanf_3(); /* register corruption */ ! 23: atanf_4(); /* test the PSL */ ! 24: atanf_5(); /* pipelined entry */ ! 25: atanf_6(); /* pipelined exit */ ! 26: asm("jmp *return"); /* return to the test monitor */ ! 27: } ! 28: ! 29: /*************************************************************************** ! 30: * ! 31: * SUBTEST 1 - ATANF FUNCTION ! 32: * ! 33: ***************************************************************************/ ! 34: atanf_1() ! 35: { ! 36: #define DELAY 20 /* delay 40 ticks between ATANF & STF */ ! 37: force_loop = FALSE; /* clear the LOOP flag */ ! 38: subtest = 1; ! 39: index = 0; ! 40: do ! 41: { ! 42: sgl_ld_acc = atanf_1_data[index].ld; /* get the operand */ ! 43: sgl_expected = atanf_1_data[index].exp; /* get expected results */ ! 44: sgl_dummy1 = DELAY; ! 45: /* ! 46: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 47: * The force loop flag is set after the first error. ! 48: */ ! 49: asm("_atanf_1_lp1:"); ! 50: asm("movl _sgl_ld_acc,r4"); /* set the data to load */ ! 51: asm("ldf r4"); /* load the accumulator */ ! 52: asm("movl _sgl_dummy1,r0"); /* get the delay factor */ ! 53: asm("atanf"); /* get ACC.'s atanf */ ! 54: asm("1:"); ! 55: asm("decl r0"); /* delay to let the COSF */ ! 56: asm("bgtr 1b"); /* instruction finish */ ! 57: asm("stf r5"); /* store the result */ ! 58: if( force_loop ) ! 59: asm("brb _atanf_1_lp1");; /* loop on the error */ ! 60: /* ! 61: * end error loop ! 62: */ ! 63: asm("movl r5,_sgl_st_acc"); /* save the result */ ! 64: if( sgl_st_acc != sgl_expected ) /* COMPARE the values */ ! 65: { ! 66: errcnt++; /* bump the error count */ ! 67: if ( prt_error ) ! 68: { ! 69: writes(" \n"); /* start a new print line */ ! 70: writes("cycle: "); ! 71: writed( cycle ); ! 72: writes(" ATANF test "); ! 73: writed( test_no ); ! 74: writes(", subtest 1 (delayed store) - BAD FINAL ACC\n"); ! 75: print_atanf_data(); ! 76: writes(", data index = "); ! 77: writed( index ); ! 78: writec('\n'); ! 79: writes(" Acc expected = "); ! 80: write32h( sgl_expected ); ! 81: writec('\n'); ! 82: } ! 83: if ( halt_flg ) /* halt on error? */ ! 84: atanf_er_halt( BAD_ACC_HLT ); ! 85: if ( loop_on_err ) ! 86: { ! 87: force_loop = TRUE; /* set the force loop flag */ ! 88: asm("jmp _atanf_1_lp1"); /* and loop */ ! 89: } ! 90: } /* end of compare error */ ! 91: } while( index++ < max_atanf_1_index ); ! 92: } /* end of subtest 1 */ ! 93: ! 94: ! 95: ! 96: /*************************************************************************** ! 97: * ! 98: * SUBTEST 2 - ATANF FUNCTION ! 99: * ! 100: ***************************************************************************/ ! 101: atanf_2() ! 102: { ! 103: force_loop = FALSE; /* clear the LOOP flag */ ! 104: subtest = 2; ! 105: index = 0; ! 106: do ! 107: { ! 108: sgl_ld_acc = atanf_1_data[index].ld; /* get the operand */ ! 109: sgl_expected = atanf_1_data[index].exp; /* get expected results */ ! 110: /* ! 111: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 112: * The force loop flag is set after the first error. ! 113: */ ! 114: asm("_atanf_2_lp1:"); ! 115: asm("movl _sgl_ld_acc,r4"); /* set the data to load */ ! 116: asm("ldf r4"); /* load the accumulator */ ! 117: asm("atanf"); /* get ACC.'s atanf */ ! 118: asm("stf r5"); /* store the result */ ! 119: if( force_loop ) ! 120: asm("brb _atanf_2_lp1");; /* loop on the error */ ! 121: /* ! 122: * end error loop ! 123: */ ! 124: asm("movl r5,_sgl_st_acc"); /* save the result */ ! 125: if( sgl_st_acc != sgl_expected ) /* COMPARE the values */ ! 126: { ! 127: errcnt++; /* bump the error count */ ! 128: if ( prt_error ) ! 129: { ! 130: writes(" \n"); /* start a new print line */ ! 131: writes("cycle: "); ! 132: writed( cycle ); ! 133: writes(" ATANF test "); ! 134: writed( test_no ); ! 135: writes(", subtest 2 (immediate store) - BAD FINAL ACC\n"); ! 136: print_atanf_data(); ! 137: writes(", data index = "); ! 138: writed( index ); ! 139: writec('\n'); ! 140: writes(" Acc expected = "); ! 141: write32h( sgl_expected ); ! 142: writec('\n'); ! 143: } ! 144: if ( halt_flg ) /* halt on error? */ ! 145: atanf_er_halt( BAD_ACC_HLT ); ! 146: if ( loop_on_err ) ! 147: { ! 148: force_loop = TRUE; /* set the force loop flag */ ! 149: asm("jmp _atanf_2_lp1"); /* and loop */ ! 150: } ! 151: } /* end of compare error */ ! 152: } while( index++ < max_atanf_1_index ); ! 153: } /* end of subtest 2 */ ! 154: ! 155: ! 156: ! 157: /*************************************************************************** ! 158: * ! 159: * SUBTEST 3 - REGISTER INTEGRITY WITH THE ATANF FUNCTION ! 160: * ! 161: ***************************************************************************/ ! 162: atanf_3() ! 163: { ! 164: fill_reg_buf( load_regs ); /* set reg values to load */ ! 165: force_loop = FALSE; /* clear the LOOP flag */ ! 166: subtest = 3; ! 167: index = 0; ! 168: do ! 169: { ! 170: sgl_ld_acc = atanf_1_data[index].ld; /* get the operand */ ! 171: sgl_expected = atanf_1_data[index].exp; /* get expected results */ ! 172: /* ! 173: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 174: * The force loop flag is set after the first error. ! 175: */ ! 176: asm("_atanf_3_lp1:"); ! 177: asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */ ! 178: asm("ldf _sgl_ld_acc"); /* load the accumulator */ ! 179: asm("atanf"); /* get ACC.'s atanf */ ! 180: asm("stf _sgl_st_acc"); /* store the result */ ! 181: asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */ ! 182: if( force_loop ) ! 183: asm("brb _atanf_3_lp1");; /* loop on the error */ ! 184: /* ! 185: * end error loop ! 186: */ ! 187: reg_no = 0; ! 188: regs_ok = TRUE; ! 189: while( (reg_no < 13) && (regs_ok) ) /* check 1st 12 regs */ ! 190: if( store_regs[ reg_no ] == load_regs[ reg_no ] ) ! 191: reg_no++; ! 192: else ! 193: regs_ok = FALSE; ! 194: if( !regs_ok ) ! 195: { ! 196: errcnt++; /* bump the error count */ ! 197: if ( prt_error ) ! 198: { ! 199: writes(" \n"); /* start a new print line */ ! 200: writes("cycle: "); ! 201: writed( cycle ); ! 202: writes(" ATANF test "); ! 203: writed( test_no ); ! 204: writes(", subtest 3 - A REGISTER WAS MODIFIED\n"); { ! 205: print_atanf_data(); ! 206: writec('\n'); ! 207: writes("register "); ! 208: writed( reg_no ); ! 209: writes(" = "); ! 210: write32h( load_regs[reg_no] ); ! 211: writes(", should be = "); ! 212: write32h( store_regs[reg_no] ); ! 213: writec('\n'); ! 214: } ! 215: if ( halt_flg ) /* halt on error? */ ! 216: atanf_er_halt( BAD_REG_HLT ); ! 217: if ( loop_on_err ) ! 218: { ! 219: force_loop = TRUE; /* get the force loop flag */ ! 220: asm("jmp _atanf_3_lp1"); /* and loop */ ! 221: } ! 222: } /* end of compare error */ ! 223: } /* end of while loop */ ! 224: } while( index++ < max_atanf_1_index ); ! 225: } /* end of subtest 3 */ ! 226: ! 227: ! 228: ! 229: /************************************************************************ ! 230: * ! 231: * SUBTEST 4 - Check for PSL corruption ! 232: * ! 233: ************************************************************************/ ! 234: atanf_4() ! 235: { ! 236: force_loop = FALSE; /* clear force_loop flg */ ! 237: subtest = 4; ! 238: fill_reg_buf( load_regs ); /* get patterns for regs */ ! 239: for( index = 0; index < 3; index++ ) { ! 240: sgl_ld_acc = atanf_1_data[index].ld; /* get operand 1 */ ! 241: sgl_expected = atanf_1_data[index].exp; /* get expected */ ! 242: sgl_dummy1 = status_array[index]; /* status = +, -, 0 */ ! 243: /* ! 244: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 245: * The force loop flag is set after the first error. ! 246: */ ! 247: asm("_atanf_4_lp1:"); ! 248: asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */ ! 249: asm("nop"); ! 250: asm("tstl _sgl_dummy1"); /* set the PSL status */ ! 251: asm("movpsl _init_psl"); /* save the initial PSL */ ! 252: asm("atanf"); /* do the atanf */ ! 253: asm("nop"); ! 254: asm("movpsl _psl_val"); /* save the final PSL */ ! 255: asm("stf _sgl_st_acc"); /* save the accumulator */ ! 256: if( force_loop ) ! 257: asm("brb _atanf_4_lp1");; /* loop on the error */ ! 258: /* ! 259: * Now compare the final PSL to the initial PSL -they should be the same ! 260: */ ! 261: exp_psl = init_psl; ! 262: if( psl_val != exp_psl ) { ! 263: errcnt++; /* bump the error count */ ! 264: if( prt_error ) { ! 265: writes(" \n"); /* start a new print line */ ! 266: writes("cycle: "); ! 267: writed( cycle ); ! 268: writes(" ATANF test "); ! 269: writed( test_no ); ! 270: writes(", subtest 4 - INCORRECT FINAL PSL\n"); ! 271: print_atanf_data(); /* print the operands */ ! 272: writes("\n"); ! 273: writes("initial PSL = "); ! 274: write32h( init_psl ); ! 275: writes(", final PSL = "); ! 276: write32h( psl_val ); ! 277: writes(", expected PSL = "); ! 278: write32h( exp_psl ); ! 279: writes("\n"); ! 280: } ! 281: if( halt_flg ) ! 282: atanf_er_halt( BAD_PSL_HLT ); /* halt on the error */ ! 283: if( loop_on_err ) { ! 284: force_loop = TRUE; /* set the force loop flag */ ! 285: asm("brw _atanf_4_lp1");; /* and loop on the error */ ! 286: } /* end of loop on error */ ! 287: } /* end of PSL corruption error */ ! 288: } /* end of WHILE loop */ ! 289: } /* end of subtest 4 */ ! 290: ! 291: ! 292: ! 293: /************************************************************************ ! 294: * ! 295: * SUBTEST 5 - pipelined entry test ! 296: * ! 297: ************************************************************************/ ! 298: atanf_5() ! 299: { ! 300: force_loop = FALSE; ! 301: subtest = 8; ! 302: for( index = 0; index < max_atanf_1_index; index++ ) { ! 303: sgl_ld_acc = atanf_1_data[index].ld; /* get operand 1 */ ! 304: sgl_expected = atanf_1_data[index].exp; /* get expected result */ ! 305: /* ! 306: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 307: * The force loop flag is set after the first error. ! 308: */ ! 309: asm("_atanf_5_lp1:"); ! 310: asm("movl $0,r0"); /* clear r0 */ ! 311: asm("ldf r0"); /* load the Acc. with 0.0 */ ! 312: asm("addf _sgl_ld_acc"); /* add the 1st operand */ ! 313: asm("atanf"); /* get the atanf */ ! 314: asm("stf _sgl_st_acc"); /* store the result */ ! 315: if( force_loop ) ! 316: asm("brb _atanf_5_lp1");; /* loop on the error */ ! 317: /* ! 318: * end error loop - test the results ! 319: */ ! 320: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 321: errcnt++; /* bump the error count */ ! 322: if( prt_error ) { ! 323: writes(" \n"); /* start a new print line */ ! 324: writes("cycle: "); ! 325: writed( cycle ); ! 326: writes(" ATANF test "); ! 327: writed( test_no ); ! 328: writes(", subtest 5 (Piped Entry) - BAD FINAL ACC\n"); ! 329: print_atanf_data(); ! 330: writes(", data index = "); ! 331: writed( index ); ! 332: writec('\n'); ! 333: writes(" Acc expected = "); ! 334: write32h( sgl_expected ); ! 335: writec('\n'); ! 336: } ! 337: if( halt_flg ) ! 338: atanf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 339: if( loop_on_err ) { ! 340: force_loop = TRUE; /* set the force loop flag */ ! 341: asm("brw _atanf_5_lp1");; /* and loop on the error */ ! 342: } /* end of loop on error */ ! 343: } /* end of compare error */ ! 344: } /* end of WHILE loop */ ! 345: } /* end of subtest 5 */ ! 346: ! 347: ! 348: ! 349: /************************************************************************ ! 350: * ! 351: * SUBTEST 6 - pipelined exit test ! 352: * ! 353: ************************************************************************/ ! 354: atanf_6() ! 355: { ! 356: force_loop = FALSE; ! 357: subtest = 8; ! 358: for( index = 0; index < max_atanf_1_index; index++ ) { ! 359: sgl_ld_acc = atanf_1_data[index].ld; /* get operand 1 */ ! 360: sgl_expected = atanf_1_data[index].exp; /* get expected result */ ! 361: /* ! 362: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 363: * The force loop flag is set after the first error. ! 364: */ ! 365: asm("_atanf_6_lp1:"); ! 366: asm("movl $0,r0"); /* clear r0 */ ! 367: asm("ldf _sgl_ld_acc"); /* load the Acc. */ ! 368: asm("atanf"); /* get the atanf */ ! 369: asm("addf r0"); /* add a zero to the acc */ ! 370: asm("stf _sgl_st_acc"); /* store the result */ ! 371: if( force_loop ) ! 372: asm("brb _atanf_6_lp1");; /* loop on the error */ ! 373: /* ! 374: * end error loop - test the results ! 375: */ ! 376: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 377: errcnt++; /* bump the error count */ ! 378: if( prt_error ) { ! 379: writes(" \n"); /* start a new print line */ ! 380: writes("cycle: "); ! 381: writed( cycle ); ! 382: writes(" ATANF test "); ! 383: writed( test_no ); ! 384: writes(", subtest 6 (Piped Exit) - BAD FINAL ACC\n"); ! 385: print_atanf_data(); ! 386: writes(", data index = "); ! 387: writed( index ); ! 388: writec('\n'); ! 389: writes(" Acc expected = "); ! 390: write32h( sgl_expected ); ! 391: writec('\n'); ! 392: } ! 393: if( halt_flg ) ! 394: atanf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 395: if( loop_on_err ) { ! 396: force_loop = TRUE; /* set the force loop flag */ ! 397: asm("brw _atanf_6_lp1");; /* and loop on the error */ ! 398: } /* end of loop on error */ ! 399: } /* end of compare error */ ! 400: } /* end of WHILE loop */ ! 401: } /* end of subtest 6 */ ! 402: ! 403: ! 404: /************************************************************************** ! 405: * ! 406: * PRINT THE DATA AND STORE RESULTS ! 407: * ! 408: * initial Acc = xxxxxxxx, stored = xxxxxxxx, data index = xx ! 409: * Acc expected = xxxxxxxx ! 410: **************************************************************************/ ! 411: print_atanf_data() ! 412: { ! 413: writes("initial Acc = "); ! 414: write32h( sgl_ld_acc ); ! 415: writes(", final Acc = "); ! 416: write32h( sgl_st_acc ); ! 417: } ! 418: ! 419: ! 420: ! 421: /************************************************************************** ! 422: * ! 423: * HALT ON ERROR ROUTINE ! 424: * ! 425: **************************************************************************/ ! 426: atanf_er_halt( halt_code ) ! 427: int halt_code; ! 428: { ! 429: sgl_dummy1 = halt_code; /* get the error type */ ! 430: asm("movl _test_no,r0"); /* r0 = test number */ ! 431: asm("movl _subtest,r1"); /* r1 = subtest number */ ! 432: asm("movl _sgl_dummy1,r2"); /* r2 = error code */ ! 433: asm("movl _cycle,r3"); /* r3 = cycle count */ ! 434: asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */ ! 435: asm("movl _sgl_st_acc,r5"); /* r5 = data stored */ ! 436: asm("movl _sgl_expected,r6"); /* r6 = data expected */ ! 437: asm("movl _index,r7"); /* r7 = data index */ ! 438: if( halt_code == BAD_REG_HLT ) { ! 439: sgl_dummy1 = load_regs[index2]; ! 440: sgl_dummy2 = store_regs[index2]; ! 441: asm("movl _index2,r6"); /* r6 = bad register # */ ! 442: asm("movl _sgl_dummy2,r7"); /* r7 = actual value */ ! 443: asm("movl _sgl_dummy1,r8"); /* r8 = expected value */ ! 444: } else ! 445: if( halt_code == BAD_PSL_HLT ) { ! 446: asm("movl _init_psl,r6"); /* r6 = initial PSL */ ! 447: asm("movl _psl_val,r7"); /* r7 = final PSL */ ! 448: asm("movl _exp_psl,r8"); /* r8 = expected PSL */ ! 449: }; ! 450: asm("halt"); /* HALT ... */ ! 451: }
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