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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
Return to atanf.lst CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4 |
1.1 root 1: 1 00000000 LL0:
2: 2 00000000 .data
3: 3 00000a64 * .text
4: 4 00000000 .align 1
5: 5 00000000 .globl _atanf
6: 6 00000000 _atanf:
7: 7 000234D0 0000 .word L215
8: 8 000234D2 # #include "fpp_defs.h"
9: 9 000234D2 #
10: 10 000234D2 #
11: 11 000234D2 #
12: 12 000234D2 # /***************************************************************************
13: 13 000234D2 # *
14: 14 000234D2 # * ATANF - SINGLE PRECISION FLOATING POINT ATANF FUNCTION TEST
15: 15 000234D2 # *
16: 16 000234D2 # * ATANF TEST MONITOR
17: 17 000234D2 # *
18: 18 000234D2 # *****************************************************************************/
19: 19 000234D2 # atanf()
20: 20 000234D2 # {
21: 21 000234D2 11 4f jbr L217
22: 22 000234D4 L218:
23: 23 000234D4 # asm(".globl _atanf_t");
24: 24 000234D4 .globl _atanf_t
25: 25 000234D4 # asm("_atanf_t:"); /* entry address */
26: 26 000234D4 _atanf_t:
27: 27 000234D4 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */
28: 28 000234D4 1d effffffff6 01 cmpl _cycle,$1
29: 29 000234DB 21 15 jneq L219
30: 30 000234DD 5d efffffffed tstl _prt_hdrs
31: 31 000234E3 31 0d jeql L219
32: 32 000234E5 # {
33: 33 000234E5 # writes(" ATANF");
34: 34 000234E5 .data 1
35: 35 00000a64 * L221:
36: 36 00000a64 * 204154414E4600 .ascii " ATANF\0"
37: 37 00000a6b * .text
38: 38 000234E5 dd 8f00000a64 pushl $L221
39: 39 000234EB fe 08 efffffffde callf $8,_writes
40: 40 000234F2 # }
41: 41 000234F2 # atanf_1(); /* test square root w/ delay */
42: 42 000234F2 L219:
43: 43 000234F2 fe 04 ef0000002d callf $4,_atanf_1
44: 44 000234F9 # atanf_2(); /* test square root */
45: 45 000234F9 fe 04 ef00000198 callf $4,_atanf_2
46: 46 00023500 # atanf_3(); /* register corruption */
47: 47 00023500 fe 04 ef000002f1 callf $4,_atanf_3
48: 48 00023507 # atanf_4(); /* test the PSL */
49: 49 00023507 fe 04 ef000004d4 callf $4,_atanf_4
50: 50 0002350E # atanf_5(); /* pipelined entry */
51: 51 0002350E fe 04 ef00000681 callf $4,_atanf_5
52: 52 00023515 # atanf_6(); /* pipelined exit */
53: 53 00023515 fe 04 ef000007d6 callf $4,_atanf_6
54: 54 0002351C # asm("jmp *return"); /* return to the test monitor */
55: 55 0002351C 71 ffffffffae jmp *return
56: 56 00023522 # }
57: 57 00023522 40 ret#2
58: 58 00023523 .set L215,0x0
59: 59 00023523 L217:
60: 60 00023523 11 af jbr L218
61: 61 00023525 .data
62: 62 00000a64 * .text
63: 63 00023525 00 .align 1
64: 64 00023526 .globl _atanf_1
65: 65 00023526 _atanf_1:
66: 66 00023526 0000 .word L228
67: 67 00023528 #
68: 68 00023528 # /***************************************************************************
69: 69 00023528 # *
70: 70 00023528 # * SUBTEST 1 - ATANF FUNCTION
71: 71 00023528 # *
72: 72 00023528 # ***************************************************************************/
73: 73 00023528 # atanf_1()
74: 74 00023528 # {
75: 75 00023528 13 016a jbr L230
76: 76 0002352B L231:
77: 77 0002352B # #define DELAY 20 /* delay 40 ticks between ATANF & STF */
78: 78 0002352B # force_loop = FALSE; /* clear the LOOP flag */
79: 79 0002352B 4d efffffff9f clrl _force_loop
80: 80 00023531 # subtest = 1;
81: 81 00023531 0d 01 efffffff98 movl $1,_subtest
82: 82 00023538 # index = 0;
83: 83 00023538 4d efffffff92 clrl _index
84: 84 0002353E # do
85: 85 0002353E L234:
86: 86 0002353E # {
87: 87 0002353E # sgl_ld_acc = atanf_1_data[index].ld; /* get the operand */
88: 88 0002353E 0d efffffff8c 50 movl _index,r0
89: 89 00023545 48 03 50 50 shll $3,r0,r0
90: 90 00023549 0d e000000000 efffffff7c movl _atanf_1_data(r0),_sgl_ld_acc
91: 91 00023554 # sgl_expected = atanf_1_data[index].exp; /* get expected results */
92: 92 00023554 0d efffffff76 50 movl _index,r0
93: 93 0002355B 48 03 50 50 shll $3,r0,r0
94: 94 0002355F 0d e000000004 efffffff66 movl _atanf_1_data+4(r0),_sgl_expected
95: 95 0002356A # sgl_dummy1 = DELAY;
96: 96 0002356A 0d 14 efffffff5f movl $20,_sgl_dummy1
97: 97 00023571 # /*
98: 98 00023571 # * If LOOP ON ERROR is set, this is the loop for this subtest.
99: 99 00023571 # * The force loop flag is set after the first error.
100: 100 00023571 # */
101: 101 00023571 # asm("_atanf_1_lp1:");
102: 102 00023571 _atanf_1_lp1:
103: 103 00023571 # asm("movl _sgl_ld_acc,r4"); /* set the data to load */
104: 104 00023571 0d efffffff59 54 movl _sgl_ld_acc,r4
105: 105 00023578 # asm("ldf r4"); /* load the accumulator */
106: 106 00023578 06 54 ldf r4
107: 107 0002357A # asm("movl _sgl_dummy1,r0"); /* get the delay factor */
108: 108 0002357A 0d efffffff50 50 movl _sgl_dummy1,r0
109: 109 00023581 # asm("atanf"); /* get ACC.'s atanf */
110: 110 00023581 25 atanf
111: 111 00023582 # asm("1:");
112: 112 00023582 1:
113: 113 00023582 # asm("decl r0"); /* delay to let the COSF */
114: 114 00023582 7d 50 decl r0
115: 115 00023584 # asm("bgtr 1b"); /* instruction finish */
116: 116 00023584 41 fc bgtr 1b
117: 117 00023586 # asm("stf r5"); /* store the result */
118: 118 00023586 26 55 stf r5
119: 119 00023588 # if( force_loop )
120: 120 00023588 5d efffffff42 tstl _force_loop
121: 121 0002358E 31 02 jeql L235
122: 122 00023590 # asm("brb _atanf_1_lp1");; /* loop on the error */
123: 123 00023590 11 df brb _atanf_1_lp1
124: 124 00023592 L235:
125: 125 00023592 # /*
126: 126 00023592 # * end error loop
127: 127 00023592 # */
128: 128 00023592 # asm("movl r5,_sgl_st_acc"); /* save the result */
129: 129 00023592 0d 55 efffffff37 movl r5,_sgl_st_acc
130: 130 00023599 # if( sgl_st_acc != sgl_expected ) /* COMPARE the values */
131: 131 00023599 1d efffffff31 efffffff2c cmpl _sgl_st_acc,_sgl_expected
132: 132 000235A4 21 03 13 00d2 jeql L236
133: 133 000235A9 # {
134: 134 000235A9 # errcnt++; /* bump the error count */
135: 135 000235A9 6d efffffff21 incl _errcnt
136: 136 000235AF # if ( prt_error )
137: 137 000235AF 5d efffffff1b tstl _prt_error
138: 138 000235B5 21 03 13 009b jeql L237
139: 139 000235BA # {
140: 140 000235BA # writes(" \n"); /* start a new print line */
141: 141 000235BA .data 1
142: 142 00000a6b * L238:
143: 143 00000a6b * 200A00 .ascii " \12\0"
144: 144 00000a6e * .text
145: 145 000235BA dd 8f00000a6b pushl $L238
146: 146 000235C0 fe 08 efffffff09 callf $8,_writes
147: 147 000235C7 # writes("cycle: ");
148: 148 000235C7 .data 1
149: 149 00000a6e * L239:
150: 150 00000a6e * 6379636C653A2000 .ascii "cycle: \0"
151: 151 00000a76 * .text
152: 152 000235C7 dd 8f00000a6e pushl $L239
153: 153 000235CD fe 08 effffffefc callf $8,_writes
154: 154 000235D4 # writed( cycle );
155: 155 000235D4 dd effffffef6 pushl _cycle
156: 156 000235DA fe 08 effffffeef callf $8,_writed
157: 157 000235E1 # writes(" ATANF test ");
158: 158 000235E1 .data 1
159: 159 00000a76 * L241:
160: 160 00000a76 * 2020204154414E46207465737 .ascii " ATANF test \0"
161: 42000
162: 161 00000a85 * .text
163: 162 000235E1 dd 8f00000a76 pushl $L241
164: 163 000235E7 fe 08 effffffee2 callf $8,_writes
165: 164 000235EE # writed( test_no );
166: 165 000235EE dd effffffedc pushl _test_no
167: 166 000235F4 fe 08 effffffed5 callf $8,_writed
168: 167 000235FB # writes(", subtest 1 (delayed store) - BAD FINAL ACC\n");
169: 168 000235FB .data 1
170: 169 00000a85 * L242:
171: 170 00000a85 * 2C20737562746573742031202 .ascii ", subtest 1 (delayed store) - BAD FINAL ACC\12\0"
172: 864656C617965642073746F72
173: 6529202D204241442046494E4
174: 14C204143430A00
175: 171 00000ab2 * .text
176: 172 000235FB dd 8f00000a85 pushl $L242
177: 173 00023601 fe 08 effffffec8 callf $8,_writes
178: 174 00023608 # print_atanf_data();
179: 175 00023608 fe 04 ef0000083f callf $4,_print_atanf_data
180: 176 0002360F # writes(", data index = ");
181: 177 0002360F .data 1
182: 178 00000ab2 * L244:
183: 179 00000ab2 * 2C20206461746120696E64657 .ascii ", data index = \0"
184: 8203D2000
185: 180 00000ac3 * .text
186: 181 0002360F dd 8f00000ab2 pushl $L244
187: 182 00023615 fe 08 effffffeb4 callf $8,_writes
188: 183 0002361C # writed( index );
189: 184 0002361C dd effffffeae pushl _index
190: 185 00023622 fe 08 effffffea7 callf $8,_writed
191: 186 00023629 # writec('\n');
192: 187 00023629 dd 0a pushl $10
193: 188 0002362B fe 08 effffffe9e callf $8,_writec
194: 189 00023632 # writes(" Acc expected = ");
195: 190 00023632 .data 1
196: 191 00000ac3 * L246:
197: 192 00000ac3 * 2020202020202020202020202 .ascii " Acc expected = \0"
198: 0202020202020202020416363
199: 206578706563746564203D200
200: 0
201: 193 00000ae9 * .text
202: 194 00023632 dd 8f00000ac3 pushl $L246
203: 195 00023638 fe 08 effffffe91 callf $8,_writes
204: 196 0002363F # write32h( sgl_expected );
205: 197 0002363F dd effffffe8b pushl _sgl_expected
206: 198 00023645 fe 08 effffffe84 callf $8,_write32h
207: 199 0002364C # writec('\n');
208: 200 0002364C dd 0a pushl $10
209: 201 0002364E fe 08 effffffe7b callf $8,_writec
210: 202 00023655 # }
211: 203 00023655 # if ( halt_flg ) /* halt on error? */
212: 204 00023655 L237:
213: 205 00023655 5d effffffe75 tstl _halt_flg
214: 206 0002365B 31 09 jeql L248
215: 207 0002365D # atanf_er_halt( BAD_ACC_HLT );
216: 208 0002365D dd 01 pushl $1
217: 209 0002365F fe 08 ef00000824 callf $8,_atanf_er_halt
218: 210 00023666 # if ( loop_on_err )
219: 211 00023666 L248:
220: 212 00023666 5d effffffe64 tstl _loop_on_err
221: 213 0002366C 31 0d jeql L250
222: 214 0002366E # {
223: 215 0002366E # force_loop = TRUE; /* set the force loop flag */
224: 216 0002366E 0d 01 effffffe5b movl $1,_force_loop
225: 217 00023675 # asm("jmp _atanf_1_lp1"); /* and loop */
226: 218 00023675 71 effffffef6 jmp _atanf_1_lp1
227: 219 0002367B # }
228: 220 0002367B # } /* end of compare error */
229: 221 0002367B L250:
230: 222 0002367B # } while( index++ < max_atanf_1_index );
231: 223 0002367B L236:
232: 224 0002367B L233:
233: 225 0002367B 0d effffffe4f 50 movl _index,r0
234: 226 00023682 6d effffffe48 incl _index
235: 227 00023688 1d 50 effffffe41 cmpl r0,_max_atanf_1_index
236: 228 0002368F 81 03 13 feaa jlss L234
237: 229 00023694 L232:
238: 230 00023694 # } /* end of subtest 1 */
239: 231 00023694 40 ret#2
240: 232 00023695 .set L228,0x0
241: 233 00023695 L230:
242: 234 00023695 13 fe93 jbr L231
243: 235 00023698 .data
244: 236 00000a64 * .text
245: 237 00023698 .align 1
246: 238 00023698 .globl _atanf_2
247: 239 00023698 _atanf_2:
248: 240 00023698 0000 .word L251
249: 241 0002369A #
250: 242 0002369A #
251: 243 0002369A #
252: 244 0002369A # /***************************************************************************
253: 245 0002369A # *
254: 246 0002369A # * SUBTEST 2 - ATANF FUNCTION
255: 247 0002369A # *
256: 248 0002369A # ***************************************************************************/
257: 249 0002369A # atanf_2()
258: 250 0002369A # {
259: 251 0002369A 13 0158 jbr L253
260: 252 0002369D L254:
261: 253 0002369D # force_loop = FALSE; /* clear the LOOP flag */
262: 254 0002369D 4d effffffe2d clrl _force_loop
263: 255 000236A3 # subtest = 2;
264: 256 000236A3 0d 02 effffffe26 movl $2,_subtest
265: 257 000236AA # index = 0;
266: 258 000236AA 4d effffffe20 clrl _index
267: 259 000236B0 # do
268: 260 000236B0 L257:
269: 261 000236B0 # {
270: 262 000236B0 # sgl_ld_acc = atanf_1_data[index].ld; /* get the operand */
271: 263 000236B0 0d effffffe1a 50 movl _index,r0
272: 264 000236B7 48 03 50 50 shll $3,r0,r0
273: 265 000236BB 0d e000000000 effffffe0a movl _atanf_1_data(r0),_sgl_ld_acc
274: 266 000236C6 # sgl_expected = atanf_1_data[index].exp; /* get expected results */
275: 267 000236C6 0d effffffe04 50 movl _index,r0
276: 268 000236CD 48 03 50 50 shll $3,r0,r0
277: 269 000236D1 0d e000000004 effffffdf4 movl _atanf_1_data+4(r0),_sgl_expected
278: 270 000236DC # /*
279: 271 000236DC # * If LOOP ON ERROR is set, this is the loop for this subtest.
280: 272 000236DC # * The force loop flag is set after the first error.
281: 273 000236DC # */
282: 274 000236DC # asm("_atanf_2_lp1:");
283: 275 000236DC _atanf_2_lp1:
284: 276 000236DC # asm("movl _sgl_ld_acc,r4"); /* set the data to load */
285: 277 000236DC 0d effffffdee 54 movl _sgl_ld_acc,r4
286: 278 000236E3 # asm("ldf r4"); /* load the accumulator */
287: 279 000236E3 06 54 ldf r4
288: 280 000236E5 # asm("atanf"); /* get ACC.'s atanf */
289: 281 000236E5 25 atanf
290: 282 000236E6 # asm("stf r5"); /* store the result */
291: 283 000236E6 26 55 stf r5
292: 284 000236E8 # if( force_loop )
293: 285 000236E8 5d effffffde2 tstl _force_loop
294: 286 000236EE 31 02 jeql L258
295: 287 000236F0 # asm("brb _atanf_2_lp1");; /* loop on the error */
296: 288 000236F0 11 ea brb _atanf_2_lp1
297: 289 000236F2 L258:
298: 290 000236F2 # /*
299: 291 000236F2 # * end error loop
300: 292 000236F2 # */
301: 293 000236F2 # asm("movl r5,_sgl_st_acc"); /* save the result */
302: 294 000236F2 0d 55 effffffdd7 movl r5,_sgl_st_acc
303: 295 000236F9 # if( sgl_st_acc != sgl_expected ) /* COMPARE the values */
304: 296 000236F9 1d effffffdd1 effffffdcc cmpl _sgl_st_acc,_sgl_expected
305: 297 00023704 21 03 13 00d2 jeql L259
306: 298 00023709 # {
307: 299 00023709 # errcnt++; /* bump the error count */
308: 300 00023709 6d effffffdc1 incl _errcnt
309: 301 0002370F # if ( prt_error )
310: 302 0002370F 5d effffffdbb tstl _prt_error
311: 303 00023715 21 03 13 009b jeql L260
312: 304 0002371A # {
313: 305 0002371A # writes(" \n"); /* start a new print line */
314: 306 0002371A .data 1
315: 307 00000ae9 * L261:
316: 308 00000ae9 * 200A00 .ascii " \12\0"
317: 309 00000aec * .text
318: 310 0002371A dd 8f00000ae9 pushl $L261
319: 311 00023720 fe 08 effffffda9 callf $8,_writes
320: 312 00023727 # writes("cycle: ");
321: 313 00023727 .data 1
322: 314 00000aec * L262:
323: 315 00000aec * 6379636C653A2000 .ascii "cycle: \0"
324: 316 00000af4 * .text
325: 317 00023727 dd 8f00000aec pushl $L262
326: 318 0002372D fe 08 effffffd9c callf $8,_writes
327: 319 00023734 # writed( cycle );
328: 320 00023734 dd effffffd96 pushl _cycle
329: 321 0002373A fe 08 effffffd8f callf $8,_writed
330: 322 00023741 # writes(" ATANF test ");
331: 323 00023741 .data 1
332: 324 00000af4 * L263:
333: 325 00000af4 * 2020204154414E46207465737 .ascii " ATANF test \0"
334: 42000
335: 326 00000b03 * .text
336: 327 00023741 dd 8f00000af4 pushl $L263
337: 328 00023747 fe 08 effffffd82 callf $8,_writes
338: 329 0002374E # writed( test_no );
339: 330 0002374E dd effffffd7c pushl _test_no
340: 331 00023754 fe 08 effffffd75 callf $8,_writed
341: 332 0002375B # writes(", subtest 2 (immediate store) - BAD FINAL ACC\n");
342: 333 0002375B .data 1
343: 334 00000b03 * L264:
344: 335 00000b03 * 2C20737562746573742032202 .ascii ", subtest 2 (immediate store) - BAD FINAL ACC\12\0"
345: 8696D6D656469617465207374
346: 6F726529202D2042414420464
347: 94E414C204143430A00
348: 336 00000b32 * .text
349: 337 0002375B dd 8f00000b03 pushl $L264
350: 338 00023761 fe 08 effffffd68 callf $8,_writes
351: 339 00023768 # print_atanf_data();
352: 340 00023768 fe 04 ef000006df callf $4,_print_atanf_data
353: 341 0002376F # writes(", data index = ");
354: 342 0002376F .data 1
355: 343 00000b32 * L265:
356: 344 00000b32 * 2C20206461746120696E64657 .ascii ", data index = \0"
357: 8203D2000
358: 345 00000b43 * .text
359: 346 0002376F dd 8f00000b32 pushl $L265
360: 347 00023775 fe 08 effffffd54 callf $8,_writes
361: 348 0002377C # writed( index );
362: 349 0002377C dd effffffd4e pushl _index
363: 350 00023782 fe 08 effffffd47 callf $8,_writed
364: 351 00023789 # writec('\n');
365: 352 00023789 dd 0a pushl $10
366: 353 0002378B fe 08 effffffd3e callf $8,_writec
367: 354 00023792 # writes(" Acc expected = ");
368: 355 00023792 .data 1
369: 356 00000b43 * L266:
370: 357 00000b43 * 2020202020202020202020202 .ascii " Acc expected = \0"
371: 0202020202020202020416363
372: 206578706563746564203D200
373: 0
374: 358 00000b69 * .text
375: 359 00023792 dd 8f00000b43 pushl $L266
376: 360 00023798 fe 08 effffffd31 callf $8,_writes
377: 361 0002379F # write32h( sgl_expected );
378: 362 0002379F dd effffffd2b pushl _sgl_expected
379: 363 000237A5 fe 08 effffffd24 callf $8,_write32h
380: 364 000237AC # writec('\n');
381: 365 000237AC dd 0a pushl $10
382: 366 000237AE fe 08 effffffd1b callf $8,_writec
383: 367 000237B5 # }
384: 368 000237B5 # if ( halt_flg ) /* halt on error? */
385: 369 000237B5 L260:
386: 370 000237B5 5d effffffd15 tstl _halt_flg
387: 371 000237BB 31 09 jeql L267
388: 372 000237BD # atanf_er_halt( BAD_ACC_HLT );
389: 373 000237BD dd 01 pushl $1
390: 374 000237BF fe 08 ef000006c4 callf $8,_atanf_er_halt
391: 375 000237C6 # if ( loop_on_err )
392: 376 000237C6 L267:
393: 377 000237C6 5d effffffd04 tstl _loop_on_err
394: 378 000237CC 31 0d jeql L268
395: 379 000237CE # {
396: 380 000237CE # force_loop = TRUE; /* set the force loop flag */
397: 381 000237CE 0d 01 effffffcfb movl $1,_force_loop
398: 382 000237D5 # asm("jmp _atanf_2_lp1"); /* and loop */
399: 383 000237D5 71 efffffff01 jmp _atanf_2_lp1
400: 384 000237DB # }
401: 385 000237DB # } /* end of compare error */
402: 386 000237DB L268:
403: 387 000237DB # } while( index++ < max_atanf_1_index );
404: 388 000237DB L259:
405: 389 000237DB L256:
406: 390 000237DB 0d effffffcef 50 movl _index,r0
407: 391 000237E2 6d effffffce8 incl _index
408: 392 000237E8 1d 50 effffffce1 cmpl r0,_max_atanf_1_index
409: 393 000237EF 81 03 13 febc jlss L257
410: 394 000237F4 L255:
411: 395 000237F4 # } /* end of subtest 2 */
412: 396 000237F4 40 ret#2
413: 397 000237F5 .set L251,0x0
414: 398 000237F5 L253:
415: 399 000237F5 13 fea5 jbr L254
416: 400 000237F8 .data
417: 401 00000a64 * .text
418: 402 000237F8 .align 1
419: 403 000237F8 .globl _atanf_3
420: 404 000237F8 _atanf_3:
421: 405 000237F8 0000 .word L269
422: 406 000237FA #
423: 407 000237FA #
424: 408 000237FA #
425: 409 000237FA # /***************************************************************************
426: 410 000237FA # *
427: 411 000237FA # * SUBTEST 3 - REGISTER INTEGRITY WITH THE ATANF FUNCTION
428: 412 000237FA # *
429: 413 000237FA # ***************************************************************************/
430: 414 000237FA # atanf_3()
431: 415 000237FA # {
432: 416 000237FA 13 01e1 jbr L271
433: 417 000237FD L272:
434: 418 000237FD # fill_reg_buf( load_regs ); /* set reg values to load */
435: 419 000237FD dd 8f00000000 pushl $_load_regs
436: 420 00023803 fe 08 effffffcc6 callf $8,_fill_reg_buf
437: 421 0002380A # force_loop = FALSE; /* clear the LOOP flag */
438: 422 0002380A 4d effffffcc0 clrl _force_loop
439: 423 00023810 # subtest = 3;
440: 424 00023810 0d 03 effffffcb9 movl $3,_subtest
441: 425 00023817 # index = 0;
442: 426 00023817 4d effffffcb3 clrl _index
443: 427 0002381D # do
444: 428 0002381D L276:
445: 429 0002381D # {
446: 430 0002381D # sgl_ld_acc = atanf_1_data[index].ld; /* get the operand */
447: 431 0002381D 0d effffffcad 50 movl _index,r0
448: 432 00023824 48 03 50 50 shll $3,r0,r0
449: 433 00023828 0d e000000000 effffffc9d movl _atanf_1_data(r0),_sgl_ld_acc
450: 434 00023833 # sgl_expected = atanf_1_data[index].exp; /* get expected results */
451: 435 00023833 0d effffffc97 50 movl _index,r0
452: 436 0002383A 48 03 50 50 shll $3,r0,r0
453: 437 0002383E 0d e000000004 effffffc87 movl _atanf_1_data+4(r0),_sgl_expected
454: 438 00023849 # /*
455: 439 00023849 # * If LOOP ON ERROR is set, this is the loop for this subtest.
456: 440 00023849 # * The force loop flag is set after the first error.
457: 441 00023849 # */
458: 442 00023849 # asm("_atanf_3_lp1:");
459: 443 00023849 _atanf_3_lp1:
460: 444 00023849 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
461: 445 00023849 ab 891fff effffffc7e loadr $0x1fff,_load_regs
462: 446 00023852 # asm("ldf _sgl_ld_acc"); /* load the accumulator */
463: 447 00023852 06 effffffc78 ldf _sgl_ld_acc
464: 448 00023858 # asm("atanf"); /* get ACC.'s atanf */
465: 449 00023858 25 atanf
466: 450 00023859 # asm("stf _sgl_st_acc"); /* store the result */
467: 451 00023859 26 effffffc71 stf _sgl_st_acc
468: 452 0002385F # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
469: 453 0002385F bb 891fff effffffc68 storer $0x1fff,_store_regs
470: 454 00023868 # if( force_loop )
471: 455 00023868 5d effffffc62 tstl _force_loop
472: 456 0002386E 31 02 jeql L277
473: 457 00023870 # asm("brb _atanf_3_lp1");; /* loop on the error */
474: 458 00023870 11 d7 brb _atanf_3_lp1
475: 459 00023872 L277:
476: 460 00023872 # /*
477: 461 00023872 # * end error loop
478: 462 00023872 # */
479: 463 00023872 # reg_no = 0;
480: 464 00023872 4d effffffc58 clrl _reg_no
481: 465 00023878 # regs_ok = TRUE;
482: 466 00023878 0d 01 effffffc51 movl $1,_regs_ok
483: 467 0002387F # while( (reg_no < 13) && (regs_ok) ) /* check 1st 12 regs */
484: 468 0002387F L278:
485: 469 0002387F 1d effffffc4b 0d cmpl _reg_no,$13
486: 470 00023886 81 35 jgeq L279
487: 471 00023888 5d effffffc42 tstl _regs_ok
488: 472 0002388E 31 2d jeql L279
489: 473 00023890 # if( store_regs[ reg_no ] == load_regs[ reg_no ] )
490: 474 00023890 0d effffffc3a 50 movl _reg_no,r0
491: 475 00023897 0d effffffc33 51 movl _reg_no,r1
492: 476 0002389E 1d 40effffffc2b cmpl _store_regs[r0],_load_regs[r1]
493: 41effffffc25
494: 477 000238AB 21 08 jneq L280
495: 478 000238AD # reg_no++;
496: 479 000238AD 6d effffffc1d incl _reg_no
497: 480 000238B3 # else
498: 481 000238B3 11 06 jbr L281
499: 482 000238B5 L280:
500: 483 000238B5 # regs_ok = FALSE;
501: 484 000238B5 4d effffffc15 clrl _regs_ok
502: 485 000238BB L281:
503: 486 000238BB 11 c2 jbr L278
504: 487 000238BD L279:
505: 488 000238BD # if( !regs_ok )
506: 489 000238BD 5d effffffc0d tstl _regs_ok
507: 490 000238C3 31 03 13 00fc jneq L282
508: 491 000238C8 # {
509: 492 000238C8 # errcnt++; /* bump the error count */
510: 493 000238C8 6d effffffc02 incl _errcnt
511: 494 000238CE # if ( prt_error )
512: 495 000238CE 5d effffffbfc tstl _prt_error
513: 496 000238D4 21 03 13 00eb jeql L283
514: 497 000238D9 # {
515: 498 000238D9 # writes(" \n"); /* start a new print line */
516: 499 000238D9 .data 1
517: 500 00000b69 * L284:
518: 501 00000b69 * 200A00 .ascii " \12\0"
519: 502 00000b6c * .text
520: 503 000238D9 dd 8f00000b69 pushl $L284
521: 504 000238DF fe 08 effffffbea callf $8,_writes
522: 505 000238E6 # writes("cycle: ");
523: 506 000238E6 .data 1
524: 507 00000b6c * L285:
525: 508 00000b6c * 6379636C653A2000 .ascii "cycle: \0"
526: 509 00000b74 * .text
527: 510 000238E6 dd 8f00000b6c pushl $L285
528: 511 000238EC fe 08 effffffbdd callf $8,_writes
529: 512 000238F3 # writed( cycle );
530: 513 000238F3 dd effffffbd7 pushl _cycle
531: 514 000238F9 fe 08 effffffbd0 callf $8,_writed
532: 515 00023900 # writes(" ATANF test ");
533: 516 00023900 .data 1
534: 517 00000b74 * L286:
535: 518 00000b74 * 2020204154414E46207465737 .ascii " ATANF test \0"
536: 42000
537: 519 00000b83 * .text
538: 520 00023900 dd 8f00000b74 pushl $L286
539: 521 00023906 fe 08 effffffbc3 callf $8,_writes
540: 522 0002390D # writed( test_no );
541: 523 0002390D dd effffffbbd pushl _test_no
542: 524 00023913 fe 08 effffffbb6 callf $8,_writed
543: 525 0002391A # writes(", subtest 3 - A REGISTER WAS MODIFIED\n"); {
544: 526 0002391A .data 1
545: 527 00000b83 * L287:
546: 528 00000b83 * 2C20737562746573742033202 .ascii ", subtest 3 - A REGISTER WAS MODIFIED\12\0"
547: D204120524547495354455220
548: 574153204D4F4449464945440
549: A00
550: 529 00000baa * .text
551: 530 0002391A dd 8f00000b83 pushl $L287
552: 531 00023920 fe 08 effffffba9 callf $8,_writes
553: 532 00023927 # print_atanf_data();
554: 533 00023927 fe 04 ef00000520 callf $4,_print_atanf_data
555: 534 0002392E # writec('\n');
556: 535 0002392E dd 0a pushl $10
557: 536 00023930 fe 08 effffffb99 callf $8,_writec
558: 537 00023937 # writes("register ");
559: 538 00023937 .data 1
560: 539 00000baa * L288:
561: 540 00000baa * 72656769737465722000 .ascii "register \0"
562: 541 00000bb4 * .text
563: 542 00023937 dd 8f00000baa pushl $L288
564: 543 0002393D fe 08 effffffb8c callf $8,_writes
565: 544 00023944 # writed( reg_no );
566: 545 00023944 dd effffffb86 pushl _reg_no
567: 546 0002394A fe 08 effffffb7f callf $8,_writed
568: 547 00023951 # writes(" = ");
569: 548 00023951 .data 1
570: 549 00000bb4 * L289:
571: 550 00000bb4 * 203D2000 .ascii " = \0"
572: 551 00000bb8 * .text
573: 552 00023951 dd 8f00000bb4 pushl $L289
574: 553 00023957 fe 08 effffffb72 callf $8,_writes
575: 554 0002395E # write32h( load_regs[reg_no] );
576: 555 0002395E 0d effffffb6c 50 movl _reg_no,r0
577: 556 00023965 dd 40effffffb64 pushl _load_regs[r0]
578: 557 0002396C fe 08 effffffb5d callf $8,_write32h
579: 558 00023973 # writes(", should be = ");
580: 559 00023973 .data 1
581: 560 00000bb8 * L290:
582: 561 00000bb8 * 2C202073686F756C642062652 .ascii ", should be = \0"
583: 03D2000
584: 562 00000bc8 * .text
585: 563 00023973 dd 8f00000bb8 pushl $L290
586: 564 00023979 fe 08 effffffb50 callf $8,_writes
587: 565 00023980 # write32h( store_regs[reg_no] );
588: 566 00023980 0d effffffb4a 50 movl _reg_no,r0
589: 567 00023987 dd 40effffffb42 pushl _store_regs[r0]
590: 568 0002398E fe 08 effffffb3b callf $8,_write32h
591: 569 00023995 # writec('\n');
592: 570 00023995 dd 0a pushl $10
593: 571 00023997 fe 08 effffffb32 callf $8,_writec
594: 572 0002399E # }
595: 573 0002399E # if ( halt_flg ) /* halt on error? */
596: 574 0002399E 5d effffffb2c tstl _halt_flg
597: 575 000239A4 31 09 jeql L291
598: 576 000239A6 # atanf_er_halt( BAD_REG_HLT );
599: 577 000239A6 dd 02 pushl $2
600: 578 000239A8 fe 08 ef000004db callf $8,_atanf_er_halt
601: 579 000239AF # if ( loop_on_err )
602: 580 000239AF L291:
603: 581 000239AF 5d effffffb1b tstl _loop_on_err
604: 582 000239B5 31 0d jeql L292
605: 583 000239B7 # {
606: 584 000239B7 # force_loop = TRUE; /* get the force loop flag */
607: 585 000239B7 0d 01 effffffb12 movl $1,_force_loop
608: 586 000239BE # asm("jmp _atanf_3_lp1"); /* and loop */
609: 587 000239BE 71 effffffe85 jmp _atanf_3_lp1
610: 588 000239C4 # }
611: 589 000239C4 # } /* end of compare error */
612: 590 000239C4 L292:
613: 591 000239C4 # } /* end of while loop */
614: 592 000239C4 L283:
615: 593 000239C4 # } while( index++ < max_atanf_1_index );
616: 594 000239C4 L282:
617: 595 000239C4 L275:
618: 596 000239C4 0d effffffb06 50 movl _index,r0
619: 597 000239CB 6d effffffaff incl _index
620: 598 000239D1 1d 50 effffffaf8 cmpl r0,_max_atanf_1_index
621: 599 000239D8 81 03 13 fe40 jlss L276
622: 600 000239DD L274:
623: 601 000239DD # } /* end of subtest 3 */
624: 602 000239DD 40 ret#2
625: 603 000239DE .set L269,0x0
626: 604 000239DE L271:
627: 605 000239DE 13 fe1c jbr L272
628: 606 000239E1 .data
629: 607 00000a64 * .text
630: 608 000239E1 00 .align 1
631: 609 000239E2 .globl _atanf_4
632: 610 000239E2 _atanf_4:
633: 611 000239E2 0000 .word L293
634: 612 000239E4 #
635: 613 000239E4 #
636: 614 000239E4 #
637: 615 000239E4 # /************************************************************************
638: 616 000239E4 # *
639: 617 000239E4 # * SUBTEST 4 - Check for PSL corruption
640: 618 000239E4 # *
641: 619 000239E4 # ************************************************************************/
642: 620 000239E4 # atanf_4()
643: 621 000239E4 # {
644: 622 000239E4 13 01ac jbr L295
645: 623 000239E7 L296:
646: 624 000239E7 # force_loop = FALSE; /* clear force_loop flg */
647: 625 000239E7 4d effffffae3 clrl _force_loop
648: 626 000239ED # subtest = 4;
649: 627 000239ED 0d 04 effffffadc movl $4,_subtest
650: 628 000239F4 # fill_reg_buf( load_regs ); /* get patterns for regs */
651: 629 000239F4 dd 8f00000000 pushl $_load_regs
652: 630 000239FA fe 08 effffffacf callf $8,_fill_reg_buf
653: 631 00023A01 # for( index = 0; index < 3; index++ ) {
654: 632 00023A01 4d effffffac9 clrl _index
655: 633 00023A07 L299:
656: 634 00023A07 1d effffffac3 03 cmpl _index,$3
657: 635 00023A0E 91 03 13 017f jgeq L298
658: 636 00023A13 # sgl_ld_acc = atanf_1_data[index].ld; /* get operand 1 */
659: 637 00023A13 0d effffffab7 50 movl _index,r0
660: 638 00023A1A 48 03 50 50 shll $3,r0,r0
661: 639 00023A1E 0d e000000000 effffffaa7 movl _atanf_1_data(r0),_sgl_ld_acc
662: 640 00023A29 # sgl_expected = atanf_1_data[index].exp; /* get expected */
663: 641 00023A29 0d effffffaa1 50 movl _index,r0
664: 642 00023A30 48 03 50 50 shll $3,r0,r0
665: 643 00023A34 0d e000000004 effffffa91 movl _atanf_1_data+4(r0),_sgl_expected
666: 644 00023A3F # sgl_dummy1 = status_array[index]; /* status = +, -, 0 */
667: 645 00023A3F 0d effffffa8b 50 movl _index,r0
668: 646 00023A46 0d 40effffffa83 movl _status_array[r0],_sgl_dummy1
669: effffffa7e
670: 647 00023A52 # /*
671: 648 00023A52 # * If LOOP ON ERROR is set, this is the loop for this subtest.
672: 649 00023A52 # * The force loop flag is set after the first error.
673: 650 00023A52 # */
674: 651 00023A52 # asm("_atanf_4_lp1:");
675: 652 00023A52 _atanf_4_lp1:
676: 653 00023A52 # asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */
677: 654 00023A52 06 effffffa78 ldf _sgl_ld_acc
678: 655 00023A58 # asm("nop");
679: 656 00023A58 10 nop
680: 657 00023A59 # asm("tstl _sgl_dummy1"); /* set the PSL status */
681: 658 00023A59 5d effffffa71 tstl _sgl_dummy1
682: 659 00023A5F # asm("movpsl _init_psl"); /* save the initial PSL */
683: 660 00023A5F cd effffffa6b movpsl _init_psl
684: 661 00023A65 # asm("atanf"); /* do the atanf */
685: 662 00023A65 25 atanf
686: 663 00023A66 # asm("nop");
687: 664 00023A66 10 nop
688: 665 00023A67 # asm("movpsl _psl_val"); /* save the final PSL */
689: 666 00023A67 cd effffffa63 movpsl _psl_val
690: 667 00023A6D # asm("stf _sgl_st_acc"); /* save the accumulator */
691: 668 00023A6D 26 effffffa5d stf _sgl_st_acc
692: 669 00023A73 # if( force_loop )
693: 670 00023A73 5d effffffa57 tstl _force_loop
694: 671 00023A79 31 02 jeql L300
695: 672 00023A7B # asm("brb _atanf_4_lp1");; /* loop on the error */
696: 673 00023A7B 11 d5 brb _atanf_4_lp1
697: 674 00023A7D L300:
698: 675 00023A7D # /*
699: 676 00023A7D # * Now compare the final PSL to the initial PSL -they should be the same
700: 677 00023A7D # */
701: 678 00023A7D # exp_psl = init_psl;
702: 679 00023A7D 0d effffffa4d effffffa48 movl _init_psl,_exp_psl
703: 680 00023A88 # if( psl_val != exp_psl ) {
704: 681 00023A88 1d effffffa42 effffffa3d cmpl _psl_val,_exp_psl
705: 682 00023A93 21 03 13 00f1 jeql L301
706: 683 00023A98 # errcnt++; /* bump the error count */
707: 684 00023A98 6d effffffa32 incl _errcnt
708: 685 00023A9E # if( prt_error ) {
709: 686 00023A9E 5d effffffa2c tstl _prt_error
710: 687 00023AA4 21 03 13 00bd jeql L302
711: 688 00023AA9 # writes(" \n"); /* start a new print line */
712: 689 00023AA9 .data 1
713: 690 00000bc8 * L303:
714: 691 00000bc8 * 200A00 .ascii " \12\0"
715: 692 00000bcb * .text
716: 693 00023AA9 dd 8f00000bc8 pushl $L303
717: 694 00023AAF fe 08 effffffa1a callf $8,_writes
718: 695 00023AB6 # writes("cycle: ");
719: 696 00023AB6 .data 1
720: 697 00000bcb * L304:
721: 698 00000bcb * 6379636C653A2000 .ascii "cycle: \0"
722: 699 00000bd3 * .text
723: 700 00023AB6 dd 8f00000bcb pushl $L304
724: 701 00023ABC fe 08 effffffa0d callf $8,_writes
725: 702 00023AC3 # writed( cycle );
726: 703 00023AC3 dd effffffa07 pushl _cycle
727: 704 00023AC9 fe 08 effffffa00 callf $8,_writed
728: 705 00023AD0 # writes(" ATANF test ");
729: 706 00023AD0 .data 1
730: 707 00000bd3 * L305:
731: 708 00000bd3 * 2020204154414E46207465737 .ascii " ATANF test \0"
732: 42000
733: 709 00000be2 * .text
734: 710 00023AD0 dd 8f00000bd3 pushl $L305
735: 711 00023AD6 fe 08 effffff9f3 callf $8,_writes
736: 712 00023ADD # writed( test_no );
737: 713 00023ADD dd effffff9ed pushl _test_no
738: 714 00023AE3 fe 08 effffff9e6 callf $8,_writed
739: 715 00023AEA # writes(", subtest 4 - INCORRECT FINAL PSL\n");
740: 716 00023AEA .data 1
741: 717 00000be2 * L306:
742: 718 00000be2 * 2C20737562746573742034202 .ascii ", subtest 4 - INCORRECT FINAL PSL\12\0"
743: D20494E434F52524543542046
744: 494E414C2050534C0A00
745: 719 00000c05 * .text
746: 720 00023AEA dd 8f00000be2 pushl $L306
747: 721 00023AF0 fe 08 effffff9d9 callf $8,_writes
748: 722 00023AF7 # print_atanf_data(); /* print the operands */
749: 723 00023AF7 fe 04 ef00000350 callf $4,_print_atanf_data
750: 724 00023AFE # writes("\n");
751: 725 00023AFE .data 1
752: 726 00000c05 * L307:
753: 727 00000c05 * 0A00 .ascii "\12\0"
754: 728 00000c07 * .text
755: 729 00023AFE dd 8f00000c05 pushl $L307
756: 730 00023B04 fe 08 effffff9c5 callf $8,_writes
757: 731 00023B0B # writes("initial PSL = ");
758: 732 00023B0B .data 1
759: 733 00000c07 * L308:
760: 734 00000c07 * 696E697469616C2050534C203 .ascii "initial PSL = \0"
761: D2000
762: 735 00000c16 * .text
763: 736 00023B0B dd 8f00000c07 pushl $L308
764: 737 00023B11 fe 08 effffff9b8 callf $8,_writes
765: 738 00023B18 # write32h( init_psl );
766: 739 00023B18 dd effffff9b2 pushl _init_psl
767: 740 00023B1E fe 08 effffff9ab callf $8,_write32h
768: 741 00023B25 # writes(", final PSL = ");
769: 742 00023B25 .data 1
770: 743 00000c16 * L309:
771: 744 00000c16 * 2C202066696E616C2050534C2 .ascii ", final PSL = \0"
772: 03D2000
773: 745 00000c26 * .text
774: 746 00023B25 dd 8f00000c16 pushl $L309
775: 747 00023B2B fe 08 effffff99e callf $8,_writes
776: 748 00023B32 # write32h( psl_val );
777: 749 00023B32 dd effffff998 pushl _psl_val
778: 750 00023B38 fe 08 effffff991 callf $8,_write32h
779: 751 00023B3F # writes(", expected PSL = ");
780: 752 00023B3F .data 1
781: 753 00000c26 * L310:
782: 754 00000c26 * 2C20206578706563746564205 .ascii ", expected PSL = \0"
783: 0534C203D2000
784: 755 00000c39 * .text
785: 756 00023B3F dd 8f00000c26 pushl $L310
786: 757 00023B45 fe 08 effffff984 callf $8,_writes
787: 758 00023B4C # write32h( exp_psl );
788: 759 00023B4C dd effffff97e pushl _exp_psl
789: 760 00023B52 fe 08 effffff977 callf $8,_write32h
790: 761 00023B59 # writes("\n");
791: 762 00023B59 .data 1
792: 763 00000c39 * L311:
793: 764 00000c39 * 0A00 .ascii "\12\0"
794: 765 00000c3b * .text
795: 766 00023B59 dd 8f00000c39 pushl $L311
796: 767 00023B5F fe 08 effffff96a callf $8,_writes
797: 768 00023B66 # }
798: 769 00023B66 # if( halt_flg )
799: 770 00023B66 L302:
800: 771 00023B66 5d effffff964 tstl _halt_flg
801: 772 00023B6C 31 09 jeql L312
802: 773 00023B6E # atanf_er_halt( BAD_PSL_HLT ); /* halt on the error */
803: 774 00023B6E dd 03 pushl $3
804: 775 00023B70 fe 08 ef00000313 callf $8,_atanf_er_halt
805: 776 00023B77 # if( loop_on_err ) {
806: 777 00023B77 L312:
807: 778 00023B77 5d effffff953 tstl _loop_on_err
808: 779 00023B7D 31 0a jeql L313
809: 780 00023B7F # force_loop = TRUE; /* set the force loop flag */
810: 781 00023B7F 0d 01 effffff94a movl $1,_force_loop
811: 782 00023B86 # asm("brw _atanf_4_lp1");; /* and loop on the error */
812: 783 00023B86 13 fec9 brw _atanf_4_lp1
813: 784 00023B89 # } /* end of loop on error */
814: 785 00023B89 # } /* end of PSL corruption error */
815: 786 00023B89 L313:
816: 787 00023B89 # } /* end of WHILE loop */
817: 788 00023B89 L301:
818: 789 00023B89 L297:
819: 790 00023B89 6d effffff941 incl _index
820: 791 00023B8F 13 fe75 jbr L299
821: 792 00023B92 L298:
822: 793 00023B92 # } /* end of subtest 4 */
823: 794 00023B92 40 ret#2
824: 795 00023B93 .set L293,0x0
825: 796 00023B93 L295:
826: 797 00023B93 13 fe51 jbr L296
827: 798 00023B96 .data
828: 799 00000a64 * .text
829: 800 00023B96 .align 1
830: 801 00023B96 .globl _atanf_5
831: 802 00023B96 _atanf_5:
832: 803 00023B96 0000 .word L314
833: 804 00023B98 #
834: 805 00023B98 #
835: 806 00023B98 #
836: 807 00023B98 # /************************************************************************
837: 808 00023B98 # *
838: 809 00023B98 # * SUBTEST 5 - pipelined entry test
839: 810 00023B98 # *
840: 811 00023B98 # ************************************************************************/
841: 812 00023B98 # atanf_5()
842: 813 00023B98 # {
843: 814 00023B98 13 0154 jbr L316
844: 815 00023B9B L317:
845: 816 00023B9B # force_loop = FALSE;
846: 817 00023B9B 4d effffff92f clrl _force_loop
847: 818 00023BA1 # subtest = 8;
848: 819 00023BA1 0d 08 effffff928 movl $8,_subtest
849: 820 00023BA8 # for( index = 0; index < max_atanf_1_index; index++ ) {
850: 821 00023BA8 4d effffff922 clrl _index
851: 822 00023BAE L320:
852: 823 00023BAE 1d effffff91c effffff917 cmpl _index,_max_atanf_1_index
853: 824 00023BB9 91 03 13 0130 jgeq L319
854: 825 00023BBE # sgl_ld_acc = atanf_1_data[index].ld; /* get operand 1 */
855: 826 00023BBE 0d effffff90c 50 movl _index,r0
856: 827 00023BC5 48 03 50 50 shll $3,r0,r0
857: 828 00023BC9 0d e000000000 effffff8fc movl _atanf_1_data(r0),_sgl_ld_acc
858: 829 00023BD4 # sgl_expected = atanf_1_data[index].exp; /* get expected result */
859: 830 00023BD4 0d effffff8f6 50 movl _index,r0
860: 831 00023BDB 48 03 50 50 shll $3,r0,r0
861: 832 00023BDF 0d e000000004 effffff8e6 movl _atanf_1_data+4(r0),_sgl_expected
862: 833 00023BEA # /*
863: 834 00023BEA # * If LOOP ON ERROR is set, this is the loop for this subtest.
864: 835 00023BEA # * The force loop flag is set after the first error.
865: 836 00023BEA # */
866: 837 00023BEA # asm("_atanf_5_lp1:");
867: 838 00023BEA _atanf_5_lp1:
868: 839 00023BEA # asm("movl $0,r0"); /* clear r0 */
869: 840 00023BEA 0d 00 50 movl $0,r0
870: 841 00023BED # asm("ldf r0"); /* load the Acc. with 0.0 */
871: 842 00023BED 06 50 ldf r0
872: 843 00023BEF # asm("addf _sgl_ld_acc"); /* add the 1st operand */
873: 844 00023BEF c6 effffff8db addf _sgl_ld_acc
874: 845 00023BF5 # asm("atanf"); /* get the atanf */
875: 846 00023BF5 25 atanf
876: 847 00023BF6 # asm("stf _sgl_st_acc"); /* store the result */
877: 848 00023BF6 26 effffff8d4 stf _sgl_st_acc
878: 849 00023BFC # if( force_loop )
879: 850 00023BFC 5d effffff8ce tstl _force_loop
880: 851 00023C02 31 02 jeql L321
881: 852 00023C04 # asm("brb _atanf_5_lp1");; /* loop on the error */
882: 853 00023C04 11 e4 brb _atanf_5_lp1
883: 854 00023C06 L321:
884: 855 00023C06 # /*
885: 856 00023C06 # * end error loop - test the results
886: 857 00023C06 # */
887: 858 00023C06 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
888: 859 00023C06 1d effffff8c4 effffff8bf cmpl _sgl_st_acc,_sgl_expected
889: 860 00023C11 21 03 13 00cf jeql L322
890: 861 00023C16 # errcnt++; /* bump the error count */
891: 862 00023C16 6d effffff8b4 incl _errcnt
892: 863 00023C1C # if( prt_error ) {
893: 864 00023C1C 5d effffff8ae tstl _prt_error
894: 865 00023C22 21 03 13 009b jeql L323
895: 866 00023C27 # writes(" \n"); /* start a new print line */
896: 867 00023C27 .data 1
897: 868 00000c3b * L324:
898: 869 00000c3b * 200A00 .ascii " \12\0"
899: 870 00000c3e * .text
900: 871 00023C27 dd 8f00000c3b pushl $L324
901: 872 00023C2D fe 08 effffff89c callf $8,_writes
902: 873 00023C34 # writes("cycle: ");
903: 874 00023C34 .data 1
904: 875 00000c3e * L325:
905: 876 00000c3e * 6379636C653A2000 .ascii "cycle: \0"
906: 877 00000c46 * .text
907: 878 00023C34 dd 8f00000c3e pushl $L325
908: 879 00023C3A fe 08 effffff88f callf $8,_writes
909: 880 00023C41 # writed( cycle );
910: 881 00023C41 dd effffff889 pushl _cycle
911: 882 00023C47 fe 08 effffff882 callf $8,_writed
912: 883 00023C4E # writes(" ATANF test ");
913: 884 00023C4E .data 1
914: 885 00000c46 * L326:
915: 886 00000c46 * 2020204154414E46207465737 .ascii " ATANF test \0"
916: 42000
917: 887 00000c55 * .text
918: 888 00023C4E dd 8f00000c46 pushl $L326
919: 889 00023C54 fe 08 effffff875 callf $8,_writes
920: 890 00023C5B # writed( test_no );
921: 891 00023C5B dd effffff86f pushl _test_no
922: 892 00023C61 fe 08 effffff868 callf $8,_writed
923: 893 00023C68 # writes(", subtest 5 (Piped Entry) - BAD FINAL ACC\n");
924: 894 00023C68 .data 1
925: 895 00000c55 * L327:
926: 896 00000c55 * 2C20737562746573742035202 .ascii ", subtest 5 (Piped Entry) - BAD FINAL ACC\12\0"
927: 8506970656420456E74727929
928: 202D204241442046494E414C2
929: 04143430A00
930: 897 00000c80 * .text
931: 898 00023C68 dd 8f00000c55 pushl $L327
932: 899 00023C6E fe 08 effffff85b callf $8,_writes
933: 900 00023C75 # print_atanf_data();
934: 901 00023C75 fe 04 ef000001d2 callf $4,_print_atanf_data
935: 902 00023C7C # writes(", data index = ");
936: 903 00023C7C .data 1
937: 904 00000c80 * L328:
938: 905 00000c80 * 2C20206461746120696E64657 .ascii ", data index = \0"
939: 8203D2000
940: 906 00000c91 * .text
941: 907 00023C7C dd 8f00000c80 pushl $L328
942: 908 00023C82 fe 08 effffff847 callf $8,_writes
943: 909 00023C89 # writed( index );
944: 910 00023C89 dd effffff841 pushl _index
945: 911 00023C8F fe 08 effffff83a callf $8,_writed
946: 912 00023C96 # writec('\n');
947: 913 00023C96 dd 0a pushl $10
948: 914 00023C98 fe 08 effffff831 callf $8,_writec
949: 915 00023C9F # writes(" Acc expected = ");
950: 916 00023C9F .data 1
951: 917 00000c91 * L329:
952: 918 00000c91 * 2020202020202020202020202 .ascii " Acc expected = \0"
953: 0202020202020202020416363
954: 206578706563746564203D200
955: 0
956: 919 00000cb7 * .text
957: 920 00023C9F dd 8f00000c91 pushl $L329
958: 921 00023CA5 fe 08 effffff824 callf $8,_writes
959: 922 00023CAC # write32h( sgl_expected );
960: 923 00023CAC dd effffff81e pushl _sgl_expected
961: 924 00023CB2 fe 08 effffff817 callf $8,_write32h
962: 925 00023CB9 # writec('\n');
963: 926 00023CB9 dd 0a pushl $10
964: 927 00023CBB fe 08 effffff80e callf $8,_writec
965: 928 00023CC2 # }
966: 929 00023CC2 # if( halt_flg )
967: 930 00023CC2 L323:
968: 931 00023CC2 5d effffff808 tstl _halt_flg
969: 932 00023CC8 31 09 jeql L330
970: 933 00023CCA # atanf_er_halt( BAD_ACC_HLT ); /* halt on the error */
971: 934 00023CCA dd 01 pushl $1
972: 935 00023CCC fe 08 ef000001b7 callf $8,_atanf_er_halt
973: 936 00023CD3 # if( loop_on_err ) {
974: 937 00023CD3 L330:
975: 938 00023CD3 5d effffff7f7 tstl _loop_on_err
976: 939 00023CD9 31 0a jeql L331
977: 940 00023CDB # force_loop = TRUE; /* set the force loop flag */
978: 941 00023CDB 0d 01 effffff7ee movl $1,_force_loop
979: 942 00023CE2 # asm("brw _atanf_5_lp1");; /* and loop on the error */
980: 943 00023CE2 13 ff05 brw _atanf_5_lp1
981: 944 00023CE5 # } /* end of loop on error */
982: 945 00023CE5 # } /* end of compare error */
983: 946 00023CE5 L331:
984: 947 00023CE5 # } /* end of WHILE loop */
985: 948 00023CE5 L322:
986: 949 00023CE5 L318:
987: 950 00023CE5 6d effffff7e5 incl _index
988: 951 00023CEB 13 fec0 jbr L320
989: 952 00023CEE L319:
990: 953 00023CEE # } /* end of subtest 5 */
991: 954 00023CEE 40 ret#2
992: 955 00023CEF .set L314,0x0
993: 956 00023CEF L316:
994: 957 00023CEF 13 fea9 jbr L317
995: 958 00023CF2 .data
996: 959 00000a64 * .text
997: 960 00023CF2 .align 1
998: 961 00023CF2 .globl _atanf_6
999: 962 00023CF2 _atanf_6:
1000: 963 00023CF2 0000 .word L332
1001: 964 00023CF4 #
1002: 965 00023CF4 #
1003: 966 00023CF4 #
1004: 967 00023CF4 # /************************************************************************
1005: 968 00023CF4 # *
1006: 969 00023CF4 # * SUBTEST 6 - pipelined exit test
1007: 970 00023CF4 # *
1008: 971 00023CF4 # ************************************************************************/
1009: 972 00023CF4 # atanf_6()
1010: 973 00023CF4 # {
1011: 974 00023CF4 13 0154 jbr L334
1012: 975 00023CF7 L335:
1013: 976 00023CF7 # force_loop = FALSE;
1014: 977 00023CF7 4d effffff7d3 clrl _force_loop
1015: 978 00023CFD # subtest = 8;
1016: 979 00023CFD 0d 08 effffff7cc movl $8,_subtest
1017: 980 00023D04 # for( index = 0; index < max_atanf_1_index; index++ ) {
1018: 981 00023D04 4d effffff7c6 clrl _index
1019: 982 00023D0A L338:
1020: 983 00023D0A 1d effffff7c0 effffff7bb cmpl _index,_max_atanf_1_index
1021: 984 00023D15 91 03 13 0130 jgeq L337
1022: 985 00023D1A # sgl_ld_acc = atanf_1_data[index].ld; /* get operand 1 */
1023: 986 00023D1A 0d effffff7b0 50 movl _index,r0
1024: 987 00023D21 48 03 50 50 shll $3,r0,r0
1025: 988 00023D25 0d e000000000 effffff7a0 movl _atanf_1_data(r0),_sgl_ld_acc
1026: 989 00023D30 # sgl_expected = atanf_1_data[index].exp; /* get expected result */
1027: 990 00023D30 0d effffff79a 50 movl _index,r0
1028: 991 00023D37 48 03 50 50 shll $3,r0,r0
1029: 992 00023D3B 0d e000000004 effffff78a movl _atanf_1_data+4(r0),_sgl_expected
1030: 993 00023D46 # /*
1031: 994 00023D46 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1032: 995 00023D46 # * The force loop flag is set after the first error.
1033: 996 00023D46 # */
1034: 997 00023D46 # asm("_atanf_6_lp1:");
1035: 998 00023D46 _atanf_6_lp1:
1036: 999 00023D46 # asm("movl $0,r0"); /* clear r0 */
1037: 1000 00023D46 0d 00 50 movl $0,r0
1038: 1001 00023D49 # asm("ldf _sgl_ld_acc"); /* load the Acc. */
1039: 1002 00023D49 06 effffff781 ldf _sgl_ld_acc
1040: 1003 00023D4F # asm("atanf"); /* get the atanf */
1041: 1004 00023D4F 25 atanf
1042: 1005 00023D50 # asm("addf r0"); /* add a zero to the acc */
1043: 1006 00023D50 c6 50 addf r0
1044: 1007 00023D52 # asm("stf _sgl_st_acc"); /* store the result */
1045: 1008 00023D52 26 effffff778 stf _sgl_st_acc
1046: 1009 00023D58 # if( force_loop )
1047: 1010 00023D58 5d effffff772 tstl _force_loop
1048: 1011 00023D5E 31 02 jeql L339
1049: 1012 00023D60 # asm("brb _atanf_6_lp1");; /* loop on the error */
1050: 1013 00023D60 11 e4 brb _atanf_6_lp1
1051: 1014 00023D62 L339:
1052: 1015 00023D62 # /*
1053: 1016 00023D62 # * end error loop - test the results
1054: 1017 00023D62 # */
1055: 1018 00023D62 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
1056: 1019 00023D62 1d effffff768 effffff763 cmpl _sgl_st_acc,_sgl_expected
1057: 1020 00023D6D 21 03 13 00cf jeql L340
1058: 1021 00023D72 # errcnt++; /* bump the error count */
1059: 1022 00023D72 6d effffff758 incl _errcnt
1060: 1023 00023D78 # if( prt_error ) {
1061: 1024 00023D78 5d effffff752 tstl _prt_error
1062: 1025 00023D7E 21 03 13 009b jeql L341
1063: 1026 00023D83 # writes(" \n"); /* start a new print line */
1064: 1027 00023D83 .data 1
1065: 1028 00000cb7 * L342:
1066: 1029 00000cb7 * 200A00 .ascii " \12\0"
1067: 1030 00000cba * .text
1068: 1031 00023D83 dd 8f00000cb7 pushl $L342
1069: 1032 00023D89 fe 08 effffff740 callf $8,_writes
1070: 1033 00023D90 # writes("cycle: ");
1071: 1034 00023D90 .data 1
1072: 1035 00000cba * L343:
1073: 1036 00000cba * 6379636C653A2000 .ascii "cycle: \0"
1074: 1037 00000cc2 * .text
1075: 1038 00023D90 dd 8f00000cba pushl $L343
1076: 1039 00023D96 fe 08 effffff733 callf $8,_writes
1077: 1040 00023D9D # writed( cycle );
1078: 1041 00023D9D dd effffff72d pushl _cycle
1079: 1042 00023DA3 fe 08 effffff726 callf $8,_writed
1080: 1043 00023DAA # writes(" ATANF test ");
1081: 1044 00023DAA .data 1
1082: 1045 00000cc2 * L344:
1083: 1046 00000cc2 * 2020204154414E46207465737 .ascii " ATANF test \0"
1084: 42000
1085: 1047 00000cd1 * .text
1086: 1048 00023DAA dd 8f00000cc2 pushl $L344
1087: 1049 00023DB0 fe 08 effffff719 callf $8,_writes
1088: 1050 00023DB7 # writed( test_no );
1089: 1051 00023DB7 dd effffff713 pushl _test_no
1090: 1052 00023DBD fe 08 effffff70c callf $8,_writed
1091: 1053 00023DC4 # writes(", subtest 6 (Piped Exit) - BAD FINAL ACC\n");
1092: 1054 00023DC4 .data 1
1093: 1055 00000cd1 * L345:
1094: 1056 00000cd1 * 2C20737562746573742036202 .ascii ", subtest 6 (Piped Exit) - BAD FINAL ACC\12\0"
1095: 8506970656420457869742920
1096: 2D204241442046494E414C204
1097: 143430A00
1098: 1057 00000cfb * .text
1099: 1058 00023DC4 dd 8f00000cd1 pushl $L345
1100: 1059 00023DCA fe 08 effffff6ff callf $8,_writes
1101: 1060 00023DD1 # print_atanf_data();
1102: 1061 00023DD1 fe 04 ef00000076 callf $4,_print_atanf_data
1103: 1062 00023DD8 # writes(", data index = ");
1104: 1063 00023DD8 .data 1
1105: 1064 00000cfb * L346:
1106: 1065 00000cfb * 2C20206461746120696E64657 .ascii ", data index = \0"
1107: 8203D2000
1108: 1066 00000d0c * .text
1109: 1067 00023DD8 dd 8f00000cfb pushl $L346
1110: 1068 00023DDE fe 08 effffff6eb callf $8,_writes
1111: 1069 00023DE5 # writed( index );
1112: 1070 00023DE5 dd effffff6e5 pushl _index
1113: 1071 00023DEB fe 08 effffff6de callf $8,_writed
1114: 1072 00023DF2 # writec('\n');
1115: 1073 00023DF2 dd 0a pushl $10
1116: 1074 00023DF4 fe 08 effffff6d5 callf $8,_writec
1117: 1075 00023DFB # writes(" Acc expected = ");
1118: 1076 00023DFB .data 1
1119: 1077 00000d0c * L347:
1120: 1078 00000d0c * 2020202020202020202020202 .ascii " Acc expected = \0"
1121: 0202020202020202020416363
1122: 206578706563746564203D200
1123: 0
1124: 1079 00000d32 * .text
1125: 1080 00023DFB dd 8f00000d0c pushl $L347
1126: 1081 00023E01 fe 08 effffff6c8 callf $8,_writes
1127: 1082 00023E08 # write32h( sgl_expected );
1128: 1083 00023E08 dd effffff6c2 pushl _sgl_expected
1129: 1084 00023E0E fe 08 effffff6bb callf $8,_write32h
1130: 1085 00023E15 # writec('\n');
1131: 1086 00023E15 dd 0a pushl $10
1132: 1087 00023E17 fe 08 effffff6b2 callf $8,_writec
1133: 1088 00023E1E # }
1134: 1089 00023E1E # if( halt_flg )
1135: 1090 00023E1E L341:
1136: 1091 00023E1E 5d effffff6ac tstl _halt_flg
1137: 1092 00023E24 31 09 jeql L348
1138: 1093 00023E26 # atanf_er_halt( BAD_ACC_HLT ); /* halt on the error */
1139: 1094 00023E26 dd 01 pushl $1
1140: 1095 00023E28 fe 08 ef0000005b callf $8,_atanf_er_halt
1141: 1096 00023E2F # if( loop_on_err ) {
1142: 1097 00023E2F L348:
1143: 1098 00023E2F 5d effffff69b tstl _loop_on_err
1144: 1099 00023E35 31 0a jeql L349
1145: 1100 00023E37 # force_loop = TRUE; /* set the force loop flag */
1146: 1101 00023E37 0d 01 effffff692 movl $1,_force_loop
1147: 1102 00023E3E # asm("brw _atanf_6_lp1");; /* and loop on the error */
1148: 1103 00023E3E 13 ff05 brw _atanf_6_lp1
1149: 1104 00023E41 # } /* end of loop on error */
1150: 1105 00023E41 # } /* end of compare error */
1151: 1106 00023E41 L349:
1152: 1107 00023E41 # } /* end of WHILE loop */
1153: 1108 00023E41 L340:
1154: 1109 00023E41 L336:
1155: 1110 00023E41 6d effffff689 incl _index
1156: 1111 00023E47 13 fec0 jbr L338
1157: 1112 00023E4A L337:
1158: 1113 00023E4A # } /* end of subtest 6 */
1159: 1114 00023E4A 40 ret#2
1160: 1115 00023E4B .set L332,0x0
1161: 1116 00023E4B L334:
1162: 1117 00023E4B 13 fea9 jbr L335
1163: 1118 00023E4E .data
1164: 1119 00000a64 * .text
1165: 1120 00023E4E .align 1
1166: 1121 00023E4E .globl _print_atanf_data
1167: 1122 00023E4E _print_atanf_data:
1168: 1123 00023E4E 0000 .word L350
1169: 1124 00023E50 #
1170: 1125 00023E50 #
1171: 1126 00023E50 # /**************************************************************************
1172: 1127 00023E50 # *
1173: 1128 00023E50 # * PRINT THE DATA AND STORE RESULTS
1174: 1129 00023E50 # *
1175: 1130 00023E50 # * initial Acc = xxxxxxxx, stored = xxxxxxxx, data index = xx
1176: 1131 00023E50 # * Acc expected = xxxxxxxx
1177: 1132 00023E50 # **************************************************************************/
1178: 1133 00023E50 # print_atanf_data()
1179: 1134 00023E50 # {
1180: 1135 00023E50 11 35 jbr L352
1181: 1136 00023E52 L353:
1182: 1137 00023E52 # writes("initial Acc = ");
1183: 1138 00023E52 .data 1
1184: 1139 00000d32 * L354:
1185: 1140 00000d32 * 696E697469616C20416363203 .ascii "initial Acc = \0"
1186: D2000
1187: 1141 00000d41 * .text
1188: 1142 00023E52 dd 8f00000d32 pushl $L354
1189: 1143 00023E58 fe 08 effffff671 callf $8,_writes
1190: 1144 00023E5F # write32h( sgl_ld_acc );
1191: 1145 00023E5F dd effffff66b pushl _sgl_ld_acc
1192: 1146 00023E65 fe 08 effffff664 callf $8,_write32h
1193: 1147 00023E6C # writes(", final Acc = ");
1194: 1148 00023E6C .data 1
1195: 1149 00000d41 * L355:
1196: 1150 00000d41 * 2C202066696E616C204163632 .ascii ", final Acc = \0"
1197: 03D2000
1198: 1151 00000d51 * .text
1199: 1152 00023E6C dd 8f00000d41 pushl $L355
1200: 1153 00023E72 fe 08 effffff657 callf $8,_writes
1201: 1154 00023E79 # write32h( sgl_st_acc );
1202: 1155 00023E79 dd effffff651 pushl _sgl_st_acc
1203: 1156 00023E7F fe 08 effffff64a callf $8,_write32h
1204: 1157 00023E86 # }
1205: 1158 00023E86 40 ret#2
1206: 1159 00023E87 .set L350,0x0
1207: 1160 00023E87 L352:
1208: 1161 00023E87 11 c9 jbr L353
1209: 1162 00023E89 .data
1210: 1163 00000a64 * .text
1211: 1164 00023E89 00 .align 1
1212: 1165 00023E8A .globl _atanf_er_halt
1213: 1166 00023E8A _atanf_er_halt:
1214: 1167 00023E8A 0000 .word L356
1215: 1168 00023E8C #
1216: 1169 00023E8C #
1217: 1170 00023E8C #
1218: 1171 00023E8C # /**************************************************************************
1219: 1172 00023E8C # *
1220: 1173 00023E8C # * HALT ON ERROR ROUTINE
1221: 1174 00023E8C # *
1222: 1175 00023E8C # **************************************************************************/
1223: 1176 00023E8C # atanf_er_halt( halt_code )
1224: 1177 00023E8C # int halt_code;
1225: 1178 00023E8C # {
1226: 1179 00023E8C 13 00a0 jbr L358
1227: 1180 00023E8F L359:
1228: 1181 00023E8F # sgl_dummy1 = halt_code; /* get the error type */
1229: 1182 00023E8F 0d ad04 effffff639 movl 4(fp),_sgl_dummy1
1230: 1183 00023E97 # asm("movl _test_no,r0"); /* r0 = test number */
1231: 1184 00023E97 0d effffff633 50 movl _test_no,r0
1232: 1185 00023E9E # asm("movl _subtest,r1"); /* r1 = subtest number */
1233: 1186 00023E9E 0d effffff62c 51 movl _subtest,r1
1234: 1187 00023EA5 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1235: 1188 00023EA5 0d effffff625 52 movl _sgl_dummy1,r2
1236: 1189 00023EAC # asm("movl _cycle,r3"); /* r3 = cycle count */
1237: 1190 00023EAC 0d effffff61e 53 movl _cycle,r3
1238: 1191 00023EB3 # asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */
1239: 1192 00023EB3 0d effffff617 54 movl _sgl_ld_acc,r4
1240: 1193 00023EBA # asm("movl _sgl_st_acc,r5"); /* r5 = data stored */
1241: 1194 00023EBA 0d effffff610 55 movl _sgl_st_acc,r5
1242: 1195 00023EC1 # asm("movl _sgl_expected,r6"); /* r6 = data expected */
1243: 1196 00023EC1 0d effffff609 56 movl _sgl_expected,r6
1244: 1197 00023EC8 # asm("movl _index,r7"); /* r7 = data index */
1245: 1198 00023EC8 0d effffff602 57 movl _index,r7
1246: 1199 00023ECF # if( halt_code == BAD_REG_HLT ) {
1247: 1200 00023ECF 1d ad04 02 cmpl 4(fp),$2
1248: 1201 00023ED3 21 3d jneq L360
1249: 1202 00023ED5 # sgl_dummy1 = load_regs[index2];
1250: 1203 00023ED5 0d effffff5f5 50 movl _index2,r0
1251: 1204 00023EDC 0d 40effffff5ed movl _load_regs[r0],_sgl_dummy1
1252: effffff5e8
1253: 1205 00023EE8 # sgl_dummy2 = store_regs[index2];
1254: 1206 00023EE8 0d effffff5e2 50 movl _index2,r0
1255: 1207 00023EEF 0d 40effffff5da movl _store_regs[r0],_sgl_dummy2
1256: effffff5d5
1257: 1208 00023EFB # asm("movl _index2,r6"); /* r6 = bad register # */
1258: 1209 00023EFB 0d effffff5cf 56 movl _index2,r6
1259: 1210 00023F02 # asm("movl _sgl_dummy2,r7"); /* r7 = actual value */
1260: 1211 00023F02 0d effffff5c8 57 movl _sgl_dummy2,r7
1261: 1212 00023F09 # asm("movl _sgl_dummy1,r8"); /* r8 = expected value */
1262: 1213 00023F09 0d effffff5c1 58 movl _sgl_dummy1,r8
1263: 1214 00023F10 # } else
1264: 1215 00023F10 11 1b jbr L361
1265: 1216 00023F12 L360:
1266: 1217 00023F12 # if( halt_code == BAD_PSL_HLT ) {
1267: 1218 00023F12 1d ad04 03 cmpl 4(fp),$3
1268: 1219 00023F16 21 15 jneq L362
1269: 1220 00023F18 # asm("movl _init_psl,r6"); /* r6 = initial PSL */
1270: 1221 00023F18 0d effffff5b2 56 movl _init_psl,r6
1271: 1222 00023F1F # asm("movl _psl_val,r7"); /* r7 = final PSL */
1272: 1223 00023F1F 0d effffff5ab 57 movl _psl_val,r7
1273: 1224 00023F26 # asm("movl _exp_psl,r8"); /* r8 = expected PSL */
1274: 1225 00023F26 0d effffff5a4 58 movl _exp_psl,r8
1275: 1226 00023F2D # };
1276: 1227 00023F2D L362:
1277: 1228 00023F2D L361:
1278: 1229 00023F2D # asm("halt"); /* HALT ... */
1279: 1230 00023F2D 00 halt
1280: 1231 00023F2E # }
1281: 1232 00023F2E 40 ret#2
1282: 1233 00023F2F .set L356,0x0
1283: 1234 00023F2F L358:
1284: 1235 00023F2F 13 ff5d jbr L359
1285: 1236 00023F32 .data
1286: 1236 00047402 .data
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